1 //===-- MipsInstrInfo.h - Mips Instruction Information ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Mips implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef MIPSINSTRUCTIONINFO_H
15 #define MIPSINSTRUCTIONINFO_H
18 #include "MipsAnalyzeImmediate.h"
19 #include "MipsRegisterInfo.h"
20 #include "llvm/Support/ErrorHandling.h"
21 #include "llvm/Target/TargetInstrInfo.h"
23 #define GET_INSTRINFO_HEADER
24 #include "MipsGenInstrInfo.inc"
28 class MipsInstrInfo : public MipsGenInstrInfo {
30 MipsTargetMachine &TM;
34 explicit MipsInstrInfo(MipsTargetMachine &TM, unsigned UncondBrOpc);
37 virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
38 MachineBasicBlock *&FBB,
39 SmallVectorImpl<MachineOperand> &Cond,
40 bool AllowModify) const;
42 virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
44 virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
45 MachineBasicBlock *FBB,
46 const SmallVectorImpl<MachineOperand> &Cond,
50 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
52 virtual MachineInstr* emitFrameIndexDebugValue(MachineFunction &MF,
53 int FrameIx, uint64_t Offset,
57 /// Insert nop instruction when hazard condition is found
58 virtual void insertNoop(MachineBasicBlock &MBB,
59 MachineBasicBlock::iterator MI) const;
61 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
62 /// such, whenever a client has an instance of instruction info, it should
63 /// always be able to get register info as well (through this method).
65 virtual const MipsRegisterInfo &getRegisterInfo() const = 0;
67 virtual unsigned GetOppositeBranchOpc(unsigned Opc) const = 0;
69 /// Return the number of bytes of code the specified instruction may be.
70 unsigned GetInstSizeInBytes(const MachineInstr *MI) const;
73 bool isZeroImm(const MachineOperand &op) const;
75 MachineMemOperand *GetMemOperand(MachineBasicBlock &MBB, int FI,
79 virtual unsigned GetAnalyzableBrOpc(unsigned Opc) const = 0;
81 void AnalyzeCondBr(const MachineInstr *Inst, unsigned Opc,
82 MachineBasicBlock *&BB,
83 SmallVectorImpl<MachineOperand> &Cond) const;
85 void BuildCondBr(MachineBasicBlock &MBB, MachineBasicBlock *TBB, DebugLoc DL,
86 const SmallVectorImpl<MachineOperand>& Cond) const;
90 /// Emit a series of instructions to load an immediate. All instructions
91 /// except for the last one are emitted. The function returns the number of
92 /// MachineInstrs generated. The opcode-immediate pair of the last
93 /// instruction is returned in LastInst, if it is not 0.
95 loadImmediate(int64_t Imm, bool IsN64, const TargetInstrInfo &TII,
96 MachineBasicBlock& MBB, MachineBasicBlock::iterator II,
97 DebugLoc DL, bool LastInstrIsADDiu,
98 MipsAnalyzeImmediate::Inst *LastInst);