1 //===-- MipsISelLowering.h - Mips DAG Lowering Interface --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that Mips uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef MipsISELLOWERING_H
16 #define MipsISELLOWERING_H
18 #include "llvm/CodeGen/SelectionDAG.h"
19 #include "llvm/Target/TargetLowering.h"
21 #include "MipsSubtarget.h"
26 // Start the numbering from where ISD NodeType finishes.
27 FIRST_NUMBER = ISD::BUILTIN_OP_END,
29 // Jump and link (call)
32 // Get the Higher 16 bits from a 32-bit immediate
33 // No relation with Mips Hi register
36 // Get the Lower 16 bits from a 32-bit immediate
37 // No relation with Mips Lo register
40 // Handle gp_rel (small data/bss sections) relocation.
43 // Select CC Pseudo Instruction
46 // Floating Point Select CC Pseudo Instruction
49 // Floating Point Branch Conditional
52 // Floating Point Compare
55 // Floating Point Rounding
69 //===--------------------------------------------------------------------===//
70 // TargetLowering Implementation
71 //===--------------------------------------------------------------------===//
73 class MipsTargetLowering : public TargetLowering {
75 explicit MipsTargetLowering(MipsTargetMachine &TM);
77 /// LowerOperation - Provide custom lowering hooks for some operations.
78 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
80 /// getTargetNodeName - This method returns the name of a target specific
82 virtual const char *getTargetNodeName(unsigned Opcode) const;
84 /// getSetCCResultType - get the ISD::SETCC result ValueType
85 MVT::SimpleValueType getSetCCResultType(EVT VT) const;
87 /// getFunctionAlignment - Return the Log2 alignment of this function.
88 virtual unsigned getFunctionAlignment(const Function *F) const;
90 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
93 const MipsSubtarget *Subtarget;
96 // Lower Operand helpers
97 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
98 CallingConv::ID CallConv, bool isVarArg,
99 const SmallVectorImpl<ISD::InputArg> &Ins,
100 DebugLoc dl, SelectionDAG &DAG,
101 SmallVectorImpl<SDValue> &InVals) const;
103 // Lower Operand specifics
104 SDValue LowerANDOR(SDValue Op, SelectionDAG &DAG) const;
105 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const;
106 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
107 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
108 SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const;
109 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
110 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
111 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
112 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG) const;
113 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
114 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
117 LowerFormalArguments(SDValue Chain,
118 CallingConv::ID CallConv, bool isVarArg,
119 const SmallVectorImpl<ISD::InputArg> &Ins,
120 DebugLoc dl, SelectionDAG &DAG,
121 SmallVectorImpl<SDValue> &InVals) const;
124 LowerCall(SDValue Chain, SDValue Callee,
125 CallingConv::ID CallConv, bool isVarArg,
127 const SmallVectorImpl<ISD::OutputArg> &Outs,
128 const SmallVectorImpl<SDValue> &OutVals,
129 const SmallVectorImpl<ISD::InputArg> &Ins,
130 DebugLoc dl, SelectionDAG &DAG,
131 SmallVectorImpl<SDValue> &InVals) const;
134 LowerReturn(SDValue Chain,
135 CallingConv::ID CallConv, bool isVarArg,
136 const SmallVectorImpl<ISD::OutputArg> &Outs,
137 const SmallVectorImpl<SDValue> &OutVals,
138 DebugLoc dl, SelectionDAG &DAG) const;
140 virtual MachineBasicBlock *
141 EmitInstrWithCustomInserter(MachineInstr *MI,
142 MachineBasicBlock *MBB) const;
144 // Inline asm support
145 ConstraintType getConstraintType(const std::string &Constraint) const;
147 /// Examine constraint string and operand type and determine a weight value.
148 /// The operand object must already have been set up with the operand type.
149 ConstraintWeight getSingleConstraintMatchWeight(
150 AsmOperandInfo &info, const char *constraint) const;
152 std::pair<unsigned, const TargetRegisterClass*>
153 getRegForInlineAsmConstraint(const std::string &Constraint,
156 std::vector<unsigned>
157 getRegClassForInlineAsmConstraint(const std::string &Constraint,
160 virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
162 /// isFPImmLegal - Returns true if the target can instruction select the
163 /// specified FP immediate natively. If false, the legalizer will
164 /// materialize the FP immediate as a load from a constant pool.
165 virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const;
169 #endif // MipsISELLOWERING_H