1 //===-- MipsISelDAGToDAG.cpp - A dag to dag inst selector for Mips --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the MIPS target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "mips-isel"
16 #include "MipsISelLowering.h"
17 #include "MipsMachineFunction.h"
18 #include "MipsRegisterInfo.h"
19 #include "MipsSubtarget.h"
20 #include "MipsTargetMachine.h"
21 #include "llvm/GlobalValue.h"
22 #include "llvm/Instructions.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/Support/CFG.h"
25 #include "llvm/Type.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFunction.h"
28 #include "llvm/CodeGen/MachineFrameInfo.h"
29 #include "llvm/CodeGen/MachineInstrBuilder.h"
30 #include "llvm/CodeGen/MachineRegisterInfo.h"
31 #include "llvm/CodeGen/SelectionDAGISel.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/Compiler.h"
34 #include "llvm/Support/Debug.h"
40 //===----------------------------------------------------------------------===//
41 // Instruction Selector Implementation
42 //===----------------------------------------------------------------------===//
44 //===----------------------------------------------------------------------===//
45 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
46 // instructions for SelectionDAG operations.
47 //===----------------------------------------------------------------------===//
50 class VISIBILITY_HIDDEN MipsDAGToDAGISel : public SelectionDAGISel {
52 /// TM - Keep a reference to MipsTargetMachine.
53 MipsTargetMachine &TM;
55 /// MipsLowering - This object fully describes how to lower LLVM code to an
56 /// Mips-specific SelectionDAG.
57 MipsTargetLowering MipsLowering;
59 /// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
60 /// make the right decision when generating code for different targets.
61 const MipsSubtarget &Subtarget;
64 MipsDAGToDAGISel(MipsTargetMachine &tm) : SelectionDAGISel(MipsLowering),
65 TM(tm), MipsLowering(*TM.getTargetLowering()),
66 Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
68 virtual void InstructionSelect(SelectionDAG &SD);
71 virtual const char *getPassName() const {
72 return "MIPS DAG->DAG Pattern Instruction Selection";
77 // Include the pieces autogenerated from the target description.
78 #include "MipsGenDAGISel.inc"
80 SDOperand getGlobalBaseReg();
81 SDNode *Select(SDOperand N);
84 bool SelectAddr(SDOperand Op, SDOperand N,
85 SDOperand &Base, SDOperand &Offset);
88 // getI32Imm - Return a target constant with the specified
89 // value, of type i32.
90 inline SDOperand getI32Imm(unsigned Imm) {
91 return CurDAG->getTargetConstant(Imm, MVT::i32);
102 /// InstructionSelect - This callback is invoked by
103 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
104 void MipsDAGToDAGISel::
105 InstructionSelect(SelectionDAG &SD)
108 // Codegen the basic block.
110 DOUT << "===== Instruction selection begins:\n";
114 // Select target instructions for the DAG.
115 SD.setRoot(SelectRoot(SD.getRoot()));
118 DOUT << "===== Instruction selection ends:\n";
121 SD.RemoveDeadNodes();
124 /// getGlobalBaseReg - Output the instructions required to put the
125 /// GOT address into a register.
126 SDOperand MipsDAGToDAGISel::getGlobalBaseReg() {
127 MachineFunction* MF = BB->getParent();
129 for(MachineRegisterInfo::livein_iterator ii = MF->getRegInfo().livein_begin(),
130 ee = MF->getRegInfo().livein_end(); ii != ee; ++ii)
131 if (ii->first == Mips::GP) {
135 assert(GP && "GOT PTR not in liveins");
136 return CurDAG->getCopyFromReg(CurDAG->getEntryNode(),
140 /// ComplexPattern used on MipsInstrInfo
141 /// Used on Mips Load/Store instructions
142 bool MipsDAGToDAGISel::
143 SelectAddr(SDOperand Op, SDOperand Addr, SDOperand &Offset, SDOperand &Base)
145 // if Address is FI, get the TargetFrameIndex.
146 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
147 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
148 Offset = CurDAG->getTargetConstant(0, MVT::i32);
152 // on PIC code Load GA
153 if (TM.getRelocationModel() == Reloc::PIC_) {
154 if ((Addr.getOpcode() == ISD::TargetGlobalAddress) ||
155 (Addr.getOpcode() == ISD::TargetJumpTable)){
156 Base = CurDAG->getRegister(Mips::GP, MVT::i32);
161 if ((Addr.getOpcode() == ISD::TargetExternalSymbol ||
162 Addr.getOpcode() == ISD::TargetGlobalAddress))
166 // Operand is a result from an ADD.
167 if (Addr.getOpcode() == ISD::ADD) {
168 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
169 if (Predicate_immSExt16(CN)) {
171 // If the first operand is a FI, get the TargetFI Node
172 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>
173 (Addr.getOperand(0))) {
174 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
176 Base = Addr.getOperand(0);
179 Offset = CurDAG->getTargetConstant(CN->getValue(), MVT::i32);
186 Offset = CurDAG->getTargetConstant(0, MVT::i32);
190 /// Select instructions not customized! Used for
191 /// expanded, promoted and normal instructions
192 SDNode* MipsDAGToDAGISel::
195 SDNode *Node = N.Val;
196 unsigned Opcode = Node->getOpcode();
198 // Dump information about the Node being selected
200 DOUT << std::string(Indent, ' ') << "Selecting: ";
201 DEBUG(Node->dump(CurDAG));
206 // If we have a custom node, we already have selected!
207 if (Opcode >= ISD::BUILTIN_OP_END && Opcode < MipsISD::FIRST_NUMBER) {
209 DOUT << std::string(Indent-2, ' ') << "== ";
210 DEBUG(Node->dump(CurDAG));
218 // Instruction Selection not handled by the auto-generated
219 // tablegen selection should be handled here.
227 SDOperand InFlag = Node->getOperand(2), CmpLHS;
228 unsigned Opc = InFlag.getOpcode(), MOp;
230 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
231 (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
232 "(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
234 if (Opcode == ISD::ADDE) {
235 CmpLHS = InFlag.getValue(0);
238 CmpLHS = InFlag.getOperand(0);
242 SDOperand Ops[] = { CmpLHS, InFlag.getOperand(1) };
244 SDOperand LHS = Node->getOperand(0);
245 SDOperand RHS = Node->getOperand(1);
249 MVT VT = LHS.getValueType();
250 SDNode *Carry = CurDAG->getTargetNode(Mips::SLTu, VT, Ops, 2);
251 SDNode *AddCarry = CurDAG->getTargetNode(Mips::ADDu, VT,
252 SDOperand(Carry,0), RHS);
254 return CurDAG->SelectNodeTo(N.Val, MOp, VT, MVT::Flag,
255 LHS, SDOperand(AddCarry,0));
258 /// Mul/Div with two results
262 case ISD::UMUL_LOHI: {
263 SDOperand Op1 = Node->getOperand(0);
264 SDOperand Op2 = Node->getOperand(1);
269 if (Opcode == ISD::UMUL_LOHI || Opcode == ISD::SMUL_LOHI)
270 Op = (Opcode == ISD::UMUL_LOHI ? Mips::MULTu : Mips::MULT);
272 Op = (Opcode == ISD::UDIVREM ? Mips::DIVu : Mips::DIV);
274 SDNode *Node = CurDAG->getTargetNode(Op, MVT::Flag, Op1, Op2);
276 SDOperand InFlag = SDOperand(Node, 0);
277 SDNode *Lo = CurDAG->getTargetNode(Mips::MFLO, MVT::i32, MVT::Flag, InFlag);
279 InFlag = SDOperand(Lo,1);
280 SDNode *Hi = CurDAG->getTargetNode(Mips::MFHI, MVT::i32, InFlag);
282 if (!N.getValue(0).use_empty())
283 ReplaceUses(N.getValue(0), SDOperand(Lo,0));
285 if (!N.getValue(1).use_empty())
286 ReplaceUses(N.getValue(1), SDOperand(Hi,0));
295 SDOperand MulOp1 = Node->getOperand(0);
296 SDOperand MulOp2 = Node->getOperand(1);
297 AddToISelQueue(MulOp1);
298 AddToISelQueue(MulOp2);
300 unsigned MulOp = (Opcode == ISD::MULHU ? Mips::MULTu : Mips::MULT);
301 SDNode *MulNode = CurDAG->getTargetNode(MulOp, MVT::Flag, MulOp1, MulOp2);
303 SDOperand InFlag = SDOperand(MulNode, 0);
305 if (MulOp == ISD::MUL)
306 return CurDAG->getTargetNode(Mips::MFLO, MVT::i32, InFlag);
308 return CurDAG->getTargetNode(Mips::MFHI, MVT::i32, InFlag);
311 /// Div/Rem operations
316 SDOperand Op1 = Node->getOperand(0);
317 SDOperand Op2 = Node->getOperand(1);
322 if (Opcode == ISD::SDIV || Opcode == ISD::UDIV) {
323 Op = (Opcode == ISD::SDIV ? Mips::DIV : Mips::DIVu);
326 Op = (Opcode == ISD::SREM ? Mips::DIV : Mips::DIVu);
329 SDNode *Node = CurDAG->getTargetNode(Op, MVT::Flag, Op1, Op2);
331 SDOperand InFlag = SDOperand(Node, 0);
332 return CurDAG->getTargetNode(MOp, MVT::i32, InFlag);
335 // Get target GOT address.
336 case ISD::GLOBAL_OFFSET_TABLE: {
337 SDOperand Result = getGlobalBaseReg();
338 ReplaceUses(N, Result);
342 /// Handle direct and indirect calls when using PIC. On PIC, when
343 /// GOT is smaller than about 64k (small code) the GA target is
344 /// loaded with only one instruction. Otherwise GA's target must
345 /// be loaded with 3 instructions.
346 case MipsISD::JmpLink: {
347 if (TM.getRelocationModel() == Reloc::PIC_) {
348 //bool isCodeLarge = (TM.getCodeModel() == CodeModel::Large);
349 SDOperand Chain = Node->getOperand(0);
350 SDOperand Callee = Node->getOperand(1);
351 AddToISelQueue(Chain);
352 SDOperand T9Reg = CurDAG->getRegister(Mips::T9, MVT::i32);
353 SDOperand InFlag(0, 0);
355 if ( (isa<GlobalAddressSDNode>(Callee)) ||
356 (isa<ExternalSymbolSDNode>(Callee)) )
358 /// Direct call for global addresses and external symbols
359 SDOperand GPReg = CurDAG->getRegister(Mips::GP, MVT::i32);
361 // Use load to get GOT target
362 SDOperand Ops[] = { Callee, GPReg, Chain };
363 SDOperand Load = SDOperand(CurDAG->getTargetNode(Mips::LW, MVT::i32,
364 MVT::Other, Ops, 3), 0);
365 Chain = Load.getValue(1);
366 AddToISelQueue(Chain);
368 // Call target must be on T9
369 Chain = CurDAG->getCopyToReg(Chain, T9Reg, Load, InFlag);
372 Chain = CurDAG->getCopyToReg(Chain, T9Reg, Callee, InFlag);
374 AddToISelQueue(Chain);
376 // Emit Jump and Link Register
377 SDNode *ResNode = CurDAG->getTargetNode(Mips::JALR, MVT::Other,
378 MVT::Flag, T9Reg, Chain);
379 Chain = SDOperand(ResNode, 0);
380 InFlag = SDOperand(ResNode, 1);
381 ReplaceUses(SDOperand(Node, 0), Chain);
382 ReplaceUses(SDOperand(Node, 1), InFlag);
388 // Select the default instruction
389 SDNode *ResNode = SelectCode(N);
392 DOUT << std::string(Indent-2, ' ') << "=> ";
393 if (ResNode == NULL || ResNode == N.Val)
394 DEBUG(N.Val->dump(CurDAG));
396 DEBUG(ResNode->dump(CurDAG));
404 /// createMipsISelDag - This pass converts a legalized DAG into a
405 /// MIPS-specific DAG, ready for instruction scheduling.
406 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
407 return new MipsDAGToDAGISel(TM);