1 //===-- MipsastISel.cpp - Mips FastISel implementation
2 //---------------------===//
4 #include "llvm/CodeGen/FunctionLoweringInfo.h"
5 #include "llvm/CodeGen/FastISel.h"
6 #include "llvm/CodeGen/MachineInstrBuilder.h"
7 #include "llvm/IR/GlobalAlias.h"
8 #include "llvm/IR/GlobalVariable.h"
9 #include "llvm/Target/TargetInstrInfo.h"
10 #include "llvm/Target/TargetLibraryInfo.h"
11 #include "MipsRegisterInfo.h"
12 #include "MipsISelLowering.h"
13 #include "MipsMachineFunction.h"
14 #include "MipsSubtarget.h"
20 // All possible address modes.
21 typedef struct Address {
22 enum { RegBase, FrameIndexBase } BaseType;
31 // Innocuous defaults for our address.
32 Address() : BaseType(RegBase), Offset(0) { Base.Reg = 0; }
35 class MipsFastISel final : public FastISel {
37 /// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
38 /// make the right decision when generating code for different targets.
39 const MipsSubtarget *Subtarget;
41 const TargetMachine &TM;
42 const TargetInstrInfo &TII;
43 const TargetLowering &TLI;
44 MipsFunctionInfo *MFI;
46 // Convenience variables to avoid some queries.
52 explicit MipsFastISel(FunctionLoweringInfo &funcInfo,
53 const TargetLibraryInfo *libInfo)
54 : FastISel(funcInfo, libInfo),
55 M(const_cast<Module &>(*funcInfo.Fn->getParent())),
56 TM(funcInfo.MF->getTarget()), TII(*TM.getInstrInfo()),
57 TLI(*TM.getTargetLowering()) {
58 Subtarget = &TM.getSubtarget<MipsSubtarget>();
59 MFI = funcInfo.MF->getInfo<MipsFunctionInfo>();
60 Context = &funcInfo.Fn->getContext();
61 TargetSupported = ((Subtarget->getRelocationModel() == Reloc::PIC_) &&
62 (Subtarget->hasMips32r2() && (Subtarget->isABI_O32())));
65 bool TargetSelectInstruction(const Instruction *I) override;
66 unsigned TargetMaterializeConstant(const Constant *C) override;
68 bool ComputeAddress(const Value *Obj, Address &Addr);
71 bool EmitStore(MVT VT, unsigned SrcReg, Address &Addr,
72 unsigned Alignment = 0);
73 bool SelectRet(const Instruction *I);
74 bool SelectStore(const Instruction *I);
76 bool isTypeLegal(Type *Ty, MVT &VT);
77 bool isLoadTypeLegal(Type *Ty, MVT &VT);
79 unsigned MaterializeFP(const ConstantFP *CFP, MVT VT);
80 unsigned MaterializeGV(const GlobalValue *GV, MVT VT);
81 unsigned MaterializeInt(const Constant *C, MVT VT);
82 unsigned Materialize32BitInt(int64_t Imm, const TargetRegisterClass *RC);
85 bool MipsFastISel::isTypeLegal(Type *Ty, MVT &VT) {
86 EVT evt = TLI.getValueType(Ty, true);
87 // Only handle simple types.
88 if (evt == MVT::Other || !evt.isSimple())
90 VT = evt.getSimpleVT();
92 // Handle all legal types, i.e. a register that will directly hold this
94 return TLI.isTypeLegal(VT);
97 bool MipsFastISel::isLoadTypeLegal(Type *Ty, MVT &VT) {
98 if (isTypeLegal(Ty, VT))
100 // We will extend this in a later patch:
101 // If this is a type than can be sign or zero-extended to a basic operation
102 // go ahead and accept it now.
106 bool MipsFastISel::ComputeAddress(const Value *Obj, Address &Addr) {
107 // This construct looks a big awkward but it is how other ports handle this
108 // and as this function is more fully completed, these cases which
109 // return false will have additional code in them.
111 if (isa<Instruction>(Obj))
113 else if (isa<ConstantExpr>(Obj))
115 Addr.Base.Reg = getRegForValue(Obj);
116 return Addr.Base.Reg != 0;
119 // Materialize a constant into a register, and return the register
120 // number (or zero if we failed to handle it).
121 unsigned MipsFastISel::TargetMaterializeConstant(const Constant *C) {
122 EVT CEVT = TLI.getValueType(C->getType(), true);
124 // Only handle simple types.
125 if (!CEVT.isSimple())
127 MVT VT = CEVT.getSimpleVT();
129 if (const ConstantFP *CFP = dyn_cast<ConstantFP>(C))
130 return MaterializeFP(CFP, VT);
131 else if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
132 return MaterializeGV(GV, VT);
133 else if (isa<ConstantInt>(C))
134 return MaterializeInt(C, VT);
139 bool MipsFastISel::EmitStore(MVT VT, unsigned SrcReg, Address &Addr,
140 unsigned Alignment) {
142 // more cases will be handled here in following patches.
146 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::SW))
148 .addReg(Addr.Base.Reg)
149 .addImm(Addr.Offset);
153 bool MipsFastISel::SelectStore(const Instruction *I) {
154 Value *Op0 = I->getOperand(0);
157 // Atomic stores need special handling.
158 if (cast<StoreInst>(I)->isAtomic())
161 // Verify we have a legal type before going any further.
163 if (!isLoadTypeLegal(I->getOperand(0)->getType(), VT))
166 // Get the value to be stored into a register.
167 SrcReg = getRegForValue(Op0);
171 // See if we can handle this address.
173 if (!ComputeAddress(I->getOperand(1), Addr))
176 if (!EmitStore(VT, SrcReg, Addr, cast<StoreInst>(I)->getAlignment()))
181 bool MipsFastISel::SelectRet(const Instruction *I) {
182 const ReturnInst *Ret = cast<ReturnInst>(I);
184 if (!FuncInfo.CanLowerReturn)
186 if (Ret->getNumOperands() > 0) {
189 unsigned RetOpc = Mips::RetRA;
190 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(RetOpc));
194 bool MipsFastISel::TargetSelectInstruction(const Instruction *I) {
195 if (!TargetSupported)
197 switch (I->getOpcode()) {
200 case Instruction::Store:
201 return SelectStore(I);
202 case Instruction::Ret:
209 unsigned MipsFastISel::MaterializeFP(const ConstantFP *CFP, MVT VT) {
213 unsigned MipsFastISel::MaterializeGV(const GlobalValue *GV, MVT VT) {
214 // For now 32-bit only.
217 const TargetRegisterClass *RC = &Mips::GPR32RegClass;
218 unsigned DestReg = createResultReg(RC);
219 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
220 bool IsThreadLocal = GVar && GVar->isThreadLocal();
221 // TLS not supported at this time.
224 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::LW), DestReg)
225 .addReg(MFI->getGlobalBaseReg())
226 .addGlobalAddress(GV, 0, MipsII::MO_GOT);
229 unsigned MipsFastISel::MaterializeInt(const Constant *C, MVT VT) {
230 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8 && VT != MVT::i1)
232 const TargetRegisterClass *RC = &Mips::GPR32RegClass;
233 const ConstantInt *CI = cast<ConstantInt>(C);
235 if (CI->isNegative())
236 Imm = CI->getSExtValue();
238 Imm = CI->getZExtValue();
239 return Materialize32BitInt(Imm, RC);
242 unsigned MipsFastISel::Materialize32BitInt(int64_t Imm,
243 const TargetRegisterClass *RC) {
244 unsigned ResultReg = createResultReg(RC);
246 if (isInt<16>(Imm)) {
247 unsigned Opc = Mips::ADDiu;
248 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
252 } else if (isUInt<16>(Imm)) {
253 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::ORi),
259 unsigned Lo = Imm & 0xFFFF;
260 unsigned Hi = (Imm >> 16) & 0xFFFF;
262 // Both Lo and Hi have nonzero bits.
263 unsigned TmpReg = createResultReg(RC);
264 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::LUi),
266 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::ORi),
272 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::LUi),
273 ResultReg).addImm(Hi);
279 FastISel *Mips::createFastISel(FunctionLoweringInfo &funcInfo,
280 const TargetLibraryInfo *libInfo) {
281 return new MipsFastISel(funcInfo, libInfo);