1 //===-- DelaySlotFiller.cpp - Mips delay slot filler ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Simple pass to fills delay slots with useful instructions.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "delay-slot-filler"
17 #include "MipsTargetMachine.h"
18 #include "llvm/CodeGen/MachineFunctionPass.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Target/TargetMachine.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetRegisterInfo.h"
24 #include "llvm/ADT/SmallSet.h"
25 #include "llvm/ADT/Statistic.h"
29 STATISTIC(FilledSlots, "Number of delay slots filled");
30 STATISTIC(UsefulSlots, "Number of delay slots filled with instructions that"
33 static cl::opt<bool> EnableDelaySlotFiller(
34 "enable-mips-delay-filler",
36 cl::desc("Fill the Mips delay slots useful instructions."),
40 struct Filler : public MachineFunctionPass {
43 const TargetInstrInfo *TII;
46 Filler(TargetMachine &tm)
47 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
49 virtual const char *getPassName() const {
50 return "Mips Delay Slot Filler";
53 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
54 bool runOnMachineFunction(MachineFunction &F) {
56 for (MachineFunction::iterator FI = F.begin(), FE = F.end();
58 Changed |= runOnMachineBasicBlock(*FI);
62 bool isDelayFiller(MachineBasicBlock &MBB,
63 MachineBasicBlock::iterator candidate);
65 void insertCallUses(MachineBasicBlock::iterator MI,
66 SmallSet<unsigned, 32>& RegDefs,
67 SmallSet<unsigned, 32>& RegUses);
69 void insertDefsUses(MachineBasicBlock::iterator MI,
70 SmallSet<unsigned, 32>& RegDefs,
71 SmallSet<unsigned, 32>& RegUses);
73 bool IsRegInSet(SmallSet<unsigned, 32>& RegSet,
76 bool delayHasHazard(MachineBasicBlock::iterator candidate,
77 bool &sawLoad, bool &sawStore,
78 SmallSet<unsigned, 32> &RegDefs,
79 SmallSet<unsigned, 32> &RegUses);
82 findDelayInstr(MachineBasicBlock &MBB, MachineBasicBlock::iterator slot,
83 MachineBasicBlock::iterator &Filler);
88 } // end of anonymous namespace
90 /// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
91 /// We assume there is only one delay slot per delayed instruction.
93 runOnMachineBasicBlock(MachineBasicBlock &MBB) {
95 for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I)
96 if (I->getDesc().hasDelaySlot()) {
100 MachineBasicBlock::iterator D;
102 if (EnableDelaySlotFiller && findDelayInstr(MBB, I, D)) {
103 MBB.splice(llvm::next(I), &MBB, D);
107 BuildMI(MBB, llvm::next(I), I->getDebugLoc(), TII->get(Mips::NOP));
109 ++I; // Skip instruction that has just been moved to delay slot.
115 /// createMipsDelaySlotFillerPass - Returns a pass that fills in delay
116 /// slots in Mips MachineFunctions
117 FunctionPass *llvm::createMipsDelaySlotFillerPass(MipsTargetMachine &tm) {
118 return new Filler(tm);
121 bool Filler::findDelayInstr(MachineBasicBlock &MBB,
122 MachineBasicBlock::iterator slot,
123 MachineBasicBlock::iterator &Filler) {
124 SmallSet<unsigned, 32> RegDefs;
125 SmallSet<unsigned, 32> RegUses;
126 bool sawLoad = false;
127 bool sawStore = false;
129 MachineBasicBlock::iterator I = slot;
131 // Call's delay filler can def some of call's uses.
132 if (slot->getDesc().isCall())
133 insertCallUses(slot, RegDefs, RegUses);
135 insertDefsUses(slot, RegDefs, RegUses);
140 done = (I == MBB.begin());
146 if (I->isDebugValue())
149 if (I->hasUnmodeledSideEffects()
152 || isDelayFiller(MBB, I)
153 || I->getDesc().isPseudo()
156 // ERET, DERET or WAIT, PAUSE. Need to add these to instruction
161 if (delayHasHazard(I, sawLoad, sawStore, RegDefs, RegUses)) {
162 insertDefsUses(I, RegDefs, RegUses);
173 bool Filler::delayHasHazard(MachineBasicBlock::iterator candidate,
176 SmallSet<unsigned, 32> &RegDefs,
177 SmallSet<unsigned, 32> &RegUses) {
178 if (candidate->isImplicitDef() || candidate->isKill())
181 // Loads or stores cannot be moved past a store to the delay slot
182 // and stores cannot be moved past a load.
183 if (candidate->getDesc().mayLoad()) {
189 if (candidate->getDesc().mayStore()) {
197 for (unsigned i = 0, e = candidate->getNumOperands(); i!= e; ++i) {
198 const MachineOperand &MO = candidate->getOperand(i);
202 unsigned Reg = MO.getReg();
205 // check whether Reg is defined or used before delay slot.
206 if (IsRegInSet(RegDefs, Reg) || IsRegInSet(RegUses, Reg))
210 // check whether Reg is defined before delay slot.
211 if (IsRegInSet(RegDefs, Reg))
218 void Filler::insertCallUses(MachineBasicBlock::iterator MI,
219 SmallSet<unsigned, 32>& RegDefs,
220 SmallSet<unsigned, 32>& RegUses) {
221 switch(MI->getOpcode()) {
222 default: llvm_unreachable("Unknown opcode.");
227 assert(MI->getNumOperands() >= 1);
228 const MachineOperand &Reg = MI->getOperand(0);
229 assert(Reg.isReg() && "JALR first operand is not a register.");
230 RegUses.insert(Reg.getReg());
236 // Insert Defs and Uses of MI into the sets RegDefs and RegUses.
237 void Filler::insertDefsUses(MachineBasicBlock::iterator MI,
238 SmallSet<unsigned, 32>& RegDefs,
239 SmallSet<unsigned, 32>& RegUses) {
240 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
241 const MachineOperand &MO = MI->getOperand(i);
245 unsigned Reg = MO.getReg();
255 //returns true if the Reg or its alias is in the RegSet.
256 bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) {
257 if (RegSet.count(Reg))
259 // check Aliased Registers
260 for (const unsigned *Alias = TM.getRegisterInfo()->getAliasSet(Reg);
262 if (RegSet.count(*Alias))
268 // return true if the candidate is a delay filler.
269 bool Filler::isDelayFiller(MachineBasicBlock &MBB,
270 MachineBasicBlock::iterator candidate) {
271 if (candidate == MBB.begin())
273 const MCInstrDesc &prevdesc = (--candidate)->getDesc();
274 return prevdesc.hasDelaySlot();