1 //===-- DelaySlotFiller.cpp - Mips Delay Slot Filler ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Simple pass to fills delay slots with useful instructions.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "delay-slot-filler"
17 #include "MipsTargetMachine.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/Support/CommandLine.h"
23 #include "llvm/Target/TargetInstrInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetRegisterInfo.h"
29 STATISTIC(FilledSlots, "Number of delay slots filled");
30 STATISTIC(UsefulSlots, "Number of delay slots filled with instructions that"
33 static cl::opt<bool> DisableDelaySlotFiller(
34 "disable-mips-delay-filler",
36 cl::desc("Disable the delay slot filler, which attempts to fill the Mips"
37 "delay slots with useful instructions."),
40 // This option can be used to silence complaints by machine verifier passes.
41 static cl::opt<bool> SkipDelaySlotFiller(
42 "skip-mips-delay-filler",
44 cl::desc("Skip MIPS' delay slot filling pass."),
48 class Filler : public MachineFunctionPass {
50 Filler(TargetMachine &tm)
51 : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
53 virtual const char *getPassName() const {
54 return "Mips Delay Slot Filler";
57 bool runOnMachineFunction(MachineFunction &F) {
58 if (SkipDelaySlotFiller)
62 for (MachineFunction::iterator FI = F.begin(), FE = F.end();
64 Changed |= runOnMachineBasicBlock(*FI);
69 typedef MachineBasicBlock::instr_iterator InstrIter;
70 typedef MachineBasicBlock::reverse_instr_iterator ReverseInstrIter;
72 bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
74 bool isDelayFiller(MachineBasicBlock &MBB,
77 void insertCallUses(InstrIter MI,
78 SmallSet<unsigned, 32> &RegDefs,
79 SmallSet<unsigned, 32> &RegUses);
81 void insertDefsUses(InstrIter MI,
82 SmallSet<unsigned, 32> &RegDefs,
83 SmallSet<unsigned, 32> &RegUses);
85 bool IsRegInSet(SmallSet<unsigned, 32> &RegSet,
88 bool delayHasHazard(InstrIter candidate,
89 bool &sawLoad, bool &sawStore,
90 SmallSet<unsigned, 32> &RegDefs,
91 SmallSet<unsigned, 32> &RegUses);
94 findDelayInstr(MachineBasicBlock &MBB, InstrIter slot,
98 const TargetInstrInfo *TII;
104 } // end of anonymous namespace
106 /// runOnMachineBasicBlock - Fill in delay slots for the given basic block.
107 /// We assume there is only one delay slot per delayed instruction.
109 runOnMachineBasicBlock(MachineBasicBlock &MBB) {
110 bool Changed = false;
111 LastFiller = MBB.instr_end();
113 for (InstrIter I = MBB.instr_begin(); I != MBB.instr_end(); ++I) {
114 if (!I->hasDelaySlot())
119 InstrIter InstrWithSlot = I;
122 // Delay slot filling is disabled at -O0.
123 if (!DisableDelaySlotFiller && (TM.getOptLevel() != CodeGenOpt::None) &&
124 findDelayInstr(MBB, I, D)) {
125 MBB.splice(llvm::next(I), &MBB, D);
128 BuildMI(MBB, llvm::next(I), I->getDebugLoc(), TII->get(Mips::NOP));
130 // Record the filler instruction that filled the delay slot.
131 // The instruction after it will be visited in the next iteration.
134 // Bundle the delay slot filler to InstrWithSlot so that the machine
135 // verifier doesn't expect this instruction to be a terminator.
136 MIBundleBuilder(MBB, InstrWithSlot, llvm::next(LastFiller));
142 /// createMipsDelaySlotFillerPass - Returns a pass that fills in delay
143 /// slots in Mips MachineFunctions
144 FunctionPass *llvm::createMipsDelaySlotFillerPass(MipsTargetMachine &tm) {
145 return new Filler(tm);
148 bool Filler::findDelayInstr(MachineBasicBlock &MBB,
151 SmallSet<unsigned, 32> RegDefs;
152 SmallSet<unsigned, 32> RegUses;
154 insertDefsUses(slot, RegDefs, RegUses);
156 bool sawLoad = false;
157 bool sawStore = false;
159 for (ReverseInstrIter I(slot); I != MBB.instr_rend(); ++I) {
161 if (I->isDebugValue())
164 // Convert to forward iterator.
165 InstrIter FI(llvm::next(I).base());
167 if (I->hasUnmodeledSideEffects()
174 // ERET, DERET or WAIT, PAUSE. Need to add these to instruction
179 if (delayHasHazard(FI, sawLoad, sawStore, RegDefs, RegUses)) {
180 insertDefsUses(FI, RegDefs, RegUses);
191 bool Filler::delayHasHazard(InstrIter candidate,
192 bool &sawLoad, bool &sawStore,
193 SmallSet<unsigned, 32> &RegDefs,
194 SmallSet<unsigned, 32> &RegUses) {
195 if (candidate->isImplicitDef() || candidate->isKill())
198 // Loads or stores cannot be moved past a store to the delay slot
199 // and stores cannot be moved past a load.
200 if (candidate->mayLoad()) {
206 if (candidate->mayStore()) {
214 assert((!candidate->isCall() && !candidate->isReturn()) &&
215 "Cannot put calls or returns in delay slot.");
217 for (unsigned i = 0, e = candidate->getNumOperands(); i!= e; ++i) {
218 const MachineOperand &MO = candidate->getOperand(i);
221 if (!MO.isReg() || !(Reg = MO.getReg()))
225 // check whether Reg is defined or used before delay slot.
226 if (IsRegInSet(RegDefs, Reg) || IsRegInSet(RegUses, Reg))
230 // check whether Reg is defined before delay slot.
231 if (IsRegInSet(RegDefs, Reg))
238 // Helper function for getting a MachineOperand's register number and adding it
239 // to RegDefs or RegUses.
240 static void insertDefUse(const MachineOperand &MO,
241 SmallSet<unsigned, 32> &RegDefs,
242 SmallSet<unsigned, 32> &RegUses,
243 unsigned ExcludedReg = 0) {
246 if (!MO.isReg() || !(Reg = MO.getReg()) || (Reg == ExcludedReg))
255 // Insert Defs and Uses of MI into the sets RegDefs and RegUses.
256 void Filler::insertDefsUses(InstrIter MI,
257 SmallSet<unsigned, 32> &RegDefs,
258 SmallSet<unsigned, 32> &RegUses) {
259 unsigned I, E = MI->getDesc().getNumOperands();
261 for (I = 0; I != E; ++I)
262 insertDefUse(MI->getOperand(I), RegDefs, RegUses);
264 // If MI is a call, add RA to RegDefs to prevent users of RA from going into
267 RegDefs.insert(Mips::RA);
271 // Return if MI is a return.
275 // Examine the implicit operands. Exclude register AT which is in the list of
276 // clobbered registers of branch instructions.
277 E = MI->getNumOperands();
279 insertDefUse(MI->getOperand(I), RegDefs, RegUses, Mips::AT);
282 //returns true if the Reg or its alias is in the RegSet.
283 bool Filler::IsRegInSet(SmallSet<unsigned, 32> &RegSet, unsigned Reg) {
284 // Check Reg and all aliased Registers.
285 for (MCRegAliasIterator AI(Reg, TM.getRegisterInfo(), true);
287 if (RegSet.count(*AI))