1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target streamer methods.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCELF.h"
21 #include "llvm/MC/MCSectionELF.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/ELF.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/FormattedStream.h"
31 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
32 : MCTargetStreamer(S), canHaveModuleDirective(true) {}
33 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
34 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
35 void MipsTargetStreamer::emitDirectiveSetMips16() {}
36 void MipsTargetStreamer::emitDirectiveSetNoMips16() {}
37 void MipsTargetStreamer::emitDirectiveSetReorder() {}
38 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
39 void MipsTargetStreamer::emitDirectiveSetMacro() {}
40 void MipsTargetStreamer::emitDirectiveSetNoMacro() {}
41 void MipsTargetStreamer::emitDirectiveSetAt() {}
42 void MipsTargetStreamer::emitDirectiveSetNoAt() {}
43 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
44 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
45 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
46 void MipsTargetStreamer::emitDirectiveNaN2008() {}
47 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
48 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
49 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
50 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
51 unsigned ReturnReg) {}
52 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
53 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
55 void MipsTargetStreamer::emitDirectiveSetMips1() {}
56 void MipsTargetStreamer::emitDirectiveSetMips2() {}
57 void MipsTargetStreamer::emitDirectiveSetMips3() {}
58 void MipsTargetStreamer::emitDirectiveSetMips4() {}
59 void MipsTargetStreamer::emitDirectiveSetMips5() {}
60 void MipsTargetStreamer::emitDirectiveSetMips32() {}
61 void MipsTargetStreamer::emitDirectiveSetMips32R2() {}
62 void MipsTargetStreamer::emitDirectiveSetMips32R6() {}
63 void MipsTargetStreamer::emitDirectiveSetMips64() {}
64 void MipsTargetStreamer::emitDirectiveSetMips64R2() {}
65 void MipsTargetStreamer::emitDirectiveSetMips64R6() {}
66 void MipsTargetStreamer::emitDirectiveSetDsp() {}
67 void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
68 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
69 const MCSymbol &Sym, bool IsReg) {
71 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
73 if (!Enabled && !IsO32ABI)
74 report_fatal_error("+nooddspreg is only valid for O32");
77 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
78 formatted_raw_ostream &OS)
79 : MipsTargetStreamer(S), OS(OS) {}
81 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
82 OS << "\t.set\tmicromips\n";
83 setCanHaveModuleDir(false);
86 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
87 OS << "\t.set\tnomicromips\n";
88 setCanHaveModuleDir(false);
91 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
92 OS << "\t.set\tmips16\n";
93 setCanHaveModuleDir(false);
96 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
97 OS << "\t.set\tnomips16\n";
98 setCanHaveModuleDir(false);
101 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
102 OS << "\t.set\treorder\n";
103 setCanHaveModuleDir(false);
106 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
107 OS << "\t.set\tnoreorder\n";
108 setCanHaveModuleDir(false);
111 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
112 OS << "\t.set\tmacro\n";
113 setCanHaveModuleDir(false);
116 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
117 OS << "\t.set\tnomacro\n";
118 setCanHaveModuleDir(false);
121 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
122 OS << "\t.set\tat\n";
123 setCanHaveModuleDir(false);
126 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
127 OS << "\t.set\tnoat\n";
128 setCanHaveModuleDir(false);
131 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
132 OS << "\t.end\t" << Name << '\n';
135 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
136 OS << "\t.ent\t" << Symbol.getName() << '\n';
139 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
141 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
143 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
144 OS << "\t.nan\tlegacy\n";
147 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
148 OS << "\t.option\tpic0\n";
151 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
152 OS << "\t.option\tpic2\n";
155 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
156 unsigned ReturnReg) {
158 << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
160 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
163 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
164 OS << "\t.set\tmips1\n";
165 setCanHaveModuleDir(false);
168 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
169 OS << "\t.set\tmips2\n";
170 setCanHaveModuleDir(false);
173 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
174 OS << "\t.set\tmips3\n";
175 setCanHaveModuleDir(false);
178 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
179 OS << "\t.set\tmips4\n";
180 setCanHaveModuleDir(false);
183 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
184 OS << "\t.set\tmips5\n";
185 setCanHaveModuleDir(false);
188 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
189 OS << "\t.set\tmips32\n";
190 setCanHaveModuleDir(false);
193 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
194 OS << "\t.set\tmips32r2\n";
195 setCanHaveModuleDir(false);
198 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
199 OS << "\t.set\tmips32r6\n";
200 setCanHaveModuleDir(false);
203 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
204 OS << "\t.set\tmips64\n";
205 setCanHaveModuleDir(false);
208 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
209 OS << "\t.set\tmips64r2\n";
210 setCanHaveModuleDir(false);
213 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
214 OS << "\t.set\tmips64r6\n";
215 setCanHaveModuleDir(false);
218 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
219 OS << "\t.set\tdsp\n";
220 setCanHaveModuleDir(false);
222 // Print a 32 bit hex number with all numbers.
223 static void printHex32(unsigned Value, raw_ostream &OS) {
225 for (int i = 7; i >= 0; i--)
226 OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
229 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
230 int CPUTopSavedRegOff) {
232 printHex32(CPUBitmask, OS);
233 OS << ',' << CPUTopSavedRegOff << '\n';
236 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
237 int FPUTopSavedRegOff) {
239 printHex32(FPUBitmask, OS);
240 OS << "," << FPUTopSavedRegOff << '\n';
243 void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
245 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
246 setCanHaveModuleDir(false);
249 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
253 OS << "\t.cpsetup\t$"
254 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
258 << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
264 OS << Sym.getName() << "\n";
265 setCanHaveModuleDir(false);
268 void MipsTargetAsmStreamer::emitDirectiveModuleFP(
269 MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
270 MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
272 StringRef ModuleValue;
273 OS << "\t.module\tfp=";
274 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
277 void MipsTargetAsmStreamer::emitDirectiveSetFp(
278 MipsABIFlagsSection::FpABIKind Value) {
279 StringRef ModuleValue;
281 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
284 void MipsTargetAsmStreamer::emitMipsAbiFlags() {
285 // No action required for text output.
288 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
290 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
292 OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
295 // This part is for ELF object output.
296 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
297 const MCSubtargetInfo &STI)
298 : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
299 MCAssembler &MCA = getStreamer().getAssembler();
300 uint64_t Features = STI.getFeatureBits();
301 Triple T(STI.getTargetTriple());
302 Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
306 // Update e_header flags
310 if (Features & Mips::FeatureMips64r6)
311 EFlags |= ELF::EF_MIPS_ARCH_64R6;
312 else if (Features & Mips::FeatureMips64r2)
313 EFlags |= ELF::EF_MIPS_ARCH_64R2;
314 else if (Features & Mips::FeatureMips64)
315 EFlags |= ELF::EF_MIPS_ARCH_64;
316 else if (Features & Mips::FeatureMips5)
317 EFlags |= ELF::EF_MIPS_ARCH_5;
318 else if (Features & Mips::FeatureMips4)
319 EFlags |= ELF::EF_MIPS_ARCH_4;
320 else if (Features & Mips::FeatureMips3)
321 EFlags |= ELF::EF_MIPS_ARCH_3;
322 else if (Features & Mips::FeatureMips32r6)
323 EFlags |= ELF::EF_MIPS_ARCH_32R6;
324 else if (Features & Mips::FeatureMips32r2)
325 EFlags |= ELF::EF_MIPS_ARCH_32R2;
326 else if (Features & Mips::FeatureMips32)
327 EFlags |= ELF::EF_MIPS_ARCH_32;
328 else if (Features & Mips::FeatureMips2)
329 EFlags |= ELF::EF_MIPS_ARCH_2;
331 EFlags |= ELF::EF_MIPS_ARCH_1;
334 // N64 does not require any ABI bits.
335 if (Features & Mips::FeatureO32)
336 EFlags |= ELF::EF_MIPS_ABI_O32;
337 else if (Features & Mips::FeatureN32)
338 EFlags |= ELF::EF_MIPS_ABI2;
340 if (Features & Mips::FeatureGP64Bit) {
341 if (Features & Mips::FeatureO32)
342 EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
343 } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
344 EFlags |= ELF::EF_MIPS_32BITMODE;
347 if (Features & Mips::FeatureNaN2008)
348 EFlags |= ELF::EF_MIPS_NAN2008;
350 // -mabicalls and -mplt are not implemented but we should act as if they were
352 EFlags |= ELF::EF_MIPS_CPIC;
353 if (Features & Mips::FeatureN64)
354 EFlags |= ELF::EF_MIPS_PIC;
356 MCA.setELFHeaderEFlags(EFlags);
359 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
360 if (!isMicroMipsEnabled())
362 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
363 uint8_t Type = MCELF::GetType(Data);
364 if (Type != ELF::STT_FUNC)
367 // The "other" values are stored in the last 6 bits of the second byte
368 // The traditional defines for STO values assume the full byte and thus
369 // the shift to pack it.
370 MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
373 void MipsTargetELFStreamer::finish() {
374 MCAssembler &MCA = getStreamer().getAssembler();
375 const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
377 // .bss, .text and .data are always at least 16-byte aligned.
378 MCSectionData &TextSectionData =
379 MCA.getOrCreateSectionData(*OFI.getTextSection());
380 MCSectionData &DataSectionData =
381 MCA.getOrCreateSectionData(*OFI.getDataSection());
382 MCSectionData &BSSSectionData =
383 MCA.getOrCreateSectionData(*OFI.getBSSSection());
385 TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment()));
386 DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
387 BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
389 // Emit all the option records.
390 // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
392 MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
393 MEF.EmitMipsOptionRecords();
398 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
399 const MCExpr *Value) {
400 // If on rhs is micromips symbol then mark Symbol as microMips.
401 if (Value->getKind() != MCExpr::SymbolRef)
403 const MCSymbol &RhsSym =
404 static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
405 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
406 uint8_t Type = MCELF::GetType(Data);
407 if ((Type != ELF::STT_FUNC) ||
408 !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
411 MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
412 // The "other" values are stored in the last 6 bits of the second byte.
413 // The traditional defines for STO values assume the full byte and thus
414 // the shift to pack it.
415 MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
418 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
419 return static_cast<MCELFStreamer &>(Streamer);
422 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
423 MicroMipsEnabled = true;
425 MCAssembler &MCA = getStreamer().getAssembler();
426 unsigned Flags = MCA.getELFHeaderEFlags();
427 Flags |= ELF::EF_MIPS_MICROMIPS;
428 MCA.setELFHeaderEFlags(Flags);
431 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
432 MicroMipsEnabled = false;
433 setCanHaveModuleDir(false);
436 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
437 MCAssembler &MCA = getStreamer().getAssembler();
438 unsigned Flags = MCA.getELFHeaderEFlags();
439 Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
440 MCA.setELFHeaderEFlags(Flags);
441 setCanHaveModuleDir(false);
444 void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
446 setCanHaveModuleDir(false);
449 void MipsTargetELFStreamer::emitDirectiveSetReorder() {
451 setCanHaveModuleDir(false);
454 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
455 MCAssembler &MCA = getStreamer().getAssembler();
456 unsigned Flags = MCA.getELFHeaderEFlags();
457 Flags |= ELF::EF_MIPS_NOREORDER;
458 MCA.setELFHeaderEFlags(Flags);
459 setCanHaveModuleDir(false);
462 void MipsTargetELFStreamer::emitDirectiveSetMacro() {
464 setCanHaveModuleDir(false);
467 void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
469 setCanHaveModuleDir(false);
472 void MipsTargetELFStreamer::emitDirectiveSetAt() {
474 setCanHaveModuleDir(false);
477 void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
479 setCanHaveModuleDir(false);
482 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
486 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
490 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
491 MCAssembler &MCA = getStreamer().getAssembler();
492 unsigned Flags = MCA.getELFHeaderEFlags();
493 Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
494 MCA.setELFHeaderEFlags(Flags);
497 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
498 MCAssembler &MCA = getStreamer().getAssembler();
499 unsigned Flags = MCA.getELFHeaderEFlags();
500 Flags |= ELF::EF_MIPS_NAN2008;
501 MCA.setELFHeaderEFlags(Flags);
504 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
505 MCAssembler &MCA = getStreamer().getAssembler();
506 unsigned Flags = MCA.getELFHeaderEFlags();
507 Flags &= ~ELF::EF_MIPS_NAN2008;
508 MCA.setELFHeaderEFlags(Flags);
511 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
512 MCAssembler &MCA = getStreamer().getAssembler();
513 unsigned Flags = MCA.getELFHeaderEFlags();
514 // This option overrides other PIC options like -KPIC.
516 Flags &= ~ELF::EF_MIPS_PIC;
517 MCA.setELFHeaderEFlags(Flags);
520 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
521 MCAssembler &MCA = getStreamer().getAssembler();
522 unsigned Flags = MCA.getELFHeaderEFlags();
524 // NOTE: We are following the GAS behaviour here which means the directive
525 // 'pic2' also sets the CPIC bit in the ELF header. This is different from
526 // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
527 // EF_MIPS_CPIC to be mutually exclusive.
528 Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
529 MCA.setELFHeaderEFlags(Flags);
532 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
533 unsigned ReturnReg) {
537 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
538 int CPUTopSavedRegOff) {
542 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
543 int FPUTopSavedRegOff) {
547 void MipsTargetELFStreamer::emitDirectiveSetMips1() {
548 setCanHaveModuleDir(false);
551 void MipsTargetELFStreamer::emitDirectiveSetMips2() {
552 setCanHaveModuleDir(false);
555 void MipsTargetELFStreamer::emitDirectiveSetMips3() {
556 setCanHaveModuleDir(false);
559 void MipsTargetELFStreamer::emitDirectiveSetMips4() {
560 setCanHaveModuleDir(false);
563 void MipsTargetELFStreamer::emitDirectiveSetMips5() {
564 setCanHaveModuleDir(false);
567 void MipsTargetELFStreamer::emitDirectiveSetMips32() {
568 setCanHaveModuleDir(false);
571 void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
572 setCanHaveModuleDir(false);
575 void MipsTargetELFStreamer::emitDirectiveSetMips32R6() {
576 setCanHaveModuleDir(false);
579 void MipsTargetELFStreamer::emitDirectiveSetMips64() {
580 setCanHaveModuleDir(false);
583 void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
584 setCanHaveModuleDir(false);
587 void MipsTargetELFStreamer::emitDirectiveSetMips64R6() {
588 setCanHaveModuleDir(false);
591 void MipsTargetELFStreamer::emitDirectiveSetDsp() {
592 setCanHaveModuleDir(false);
595 void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
597 // This directive expands to:
598 // lui $gp, %hi(_gp_disp)
599 // addui $gp, $gp, %lo(_gp_disp)
600 // addu $gp, $gp, $reg
601 // when support for position independent code is enabled.
602 if (!Pic || (isN32() || isN64()))
605 // There's a GNU extension controlled by -mno-shared that allows
606 // locally-binding symbols to be accessed using absolute addresses.
607 // This is currently not supported. When supported -mno-shared makes
608 // .cpload expand to:
609 // lui $gp, %hi(__gnu_local_gp)
610 // addiu $gp, $gp, %lo(__gnu_local_gp)
612 StringRef SymName("_gp_disp");
613 MCAssembler &MCA = getStreamer().getAssembler();
614 MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
615 MCA.getOrCreateSymbolData(*GP_Disp);
618 TmpInst.setOpcode(Mips::LUi);
619 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
620 const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
621 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
622 TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
623 getStreamer().EmitInstruction(TmpInst, STI);
627 TmpInst.setOpcode(Mips::ADDiu);
628 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
629 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
630 const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
631 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
632 TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
633 getStreamer().EmitInstruction(TmpInst, STI);
637 TmpInst.setOpcode(Mips::ADDu);
638 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
639 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
640 TmpInst.addOperand(MCOperand::CreateReg(RegNo));
641 getStreamer().EmitInstruction(TmpInst, STI);
643 setCanHaveModuleDir(false);
646 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
650 // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
651 if (!Pic || !(isN32() || isN64()))
654 MCAssembler &MCA = getStreamer().getAssembler();
657 // Either store the old $gp in a register or on the stack
659 // move $save, $gpreg
660 Inst.setOpcode(Mips::DADDu);
661 Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
662 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
663 Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
665 // sd $gpreg, offset($sp)
666 Inst.setOpcode(Mips::SD);
667 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
668 Inst.addOperand(MCOperand::CreateReg(Mips::SP));
669 Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
671 getStreamer().EmitInstruction(Inst, STI);
674 const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
675 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
676 const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
677 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
678 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
679 Inst.setOpcode(Mips::LUi);
680 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
681 Inst.addOperand(MCOperand::CreateExpr(HiExpr));
682 getStreamer().EmitInstruction(Inst, STI);
685 // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
686 Inst.setOpcode(Mips::ADDiu);
687 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
688 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
689 Inst.addOperand(MCOperand::CreateExpr(LoExpr));
690 getStreamer().EmitInstruction(Inst, STI);
693 // daddu $gp, $gp, $funcreg
694 Inst.setOpcode(Mips::DADDu);
695 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
696 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
697 Inst.addOperand(MCOperand::CreateReg(RegNo));
698 getStreamer().EmitInstruction(Inst, STI);
700 setCanHaveModuleDir(false);
703 void MipsTargetELFStreamer::emitMipsAbiFlags() {
704 MCAssembler &MCA = getStreamer().getAssembler();
705 MCContext &Context = MCA.getContext();
706 MCStreamer &OS = getStreamer();
707 const MCSectionELF *Sec =
708 Context.getELFSection(".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS,
709 ELF::SHF_ALLOC, SectionKind::getMetadata(), 24, "");
710 MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
711 ABIShndxSD.setAlignment(8);
712 OS.SwitchSection(Sec);
714 OS << ABIFlagsSection;
717 void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
719 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
721 ABIFlagsSection.OddSPReg = Enabled;