1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target streamer methods.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCELF.h"
21 #include "llvm/MC/MCSectionELF.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/ELF.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/FormattedStream.h"
31 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
32 : MCTargetStreamer(S), canHaveModuleDirective(true) {}
33 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
34 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
35 void MipsTargetStreamer::emitDirectiveSetMips16() {}
36 void MipsTargetStreamer::emitDirectiveSetNoMips16() {}
37 void MipsTargetStreamer::emitDirectiveSetReorder() {}
38 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
39 void MipsTargetStreamer::emitDirectiveSetMacro() {}
40 void MipsTargetStreamer::emitDirectiveSetNoMacro() {}
41 void MipsTargetStreamer::emitDirectiveSetMsa() { setCanHaveModuleDir(false); }
42 void MipsTargetStreamer::emitDirectiveSetNoMsa() { setCanHaveModuleDir(false); }
43 void MipsTargetStreamer::emitDirectiveSetAt() {}
44 void MipsTargetStreamer::emitDirectiveSetNoAt() {}
45 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
46 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
47 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
48 void MipsTargetStreamer::emitDirectiveNaN2008() {}
49 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
50 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
51 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
52 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
53 unsigned ReturnReg) {}
54 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
55 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
57 void MipsTargetStreamer::emitDirectiveSetMips1() {}
58 void MipsTargetStreamer::emitDirectiveSetMips2() {}
59 void MipsTargetStreamer::emitDirectiveSetMips3() {}
60 void MipsTargetStreamer::emitDirectiveSetMips4() {}
61 void MipsTargetStreamer::emitDirectiveSetMips5() {}
62 void MipsTargetStreamer::emitDirectiveSetMips32() {}
63 void MipsTargetStreamer::emitDirectiveSetMips32R2() {}
64 void MipsTargetStreamer::emitDirectiveSetMips32R6() {}
65 void MipsTargetStreamer::emitDirectiveSetMips64() {}
66 void MipsTargetStreamer::emitDirectiveSetMips64R2() {}
67 void MipsTargetStreamer::emitDirectiveSetMips64R6() {}
68 void MipsTargetStreamer::emitDirectiveSetDsp() {}
69 void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
70 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
71 const MCSymbol &Sym, bool IsReg) {
73 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
75 if (!Enabled && !IsO32ABI)
76 report_fatal_error("+nooddspreg is only valid for O32");
79 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
80 formatted_raw_ostream &OS)
81 : MipsTargetStreamer(S), OS(OS) {}
83 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
84 OS << "\t.set\tmicromips\n";
85 setCanHaveModuleDir(false);
88 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
89 OS << "\t.set\tnomicromips\n";
90 setCanHaveModuleDir(false);
93 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
94 OS << "\t.set\tmips16\n";
95 setCanHaveModuleDir(false);
98 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
99 OS << "\t.set\tnomips16\n";
100 setCanHaveModuleDir(false);
103 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
104 OS << "\t.set\treorder\n";
105 setCanHaveModuleDir(false);
108 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
109 OS << "\t.set\tnoreorder\n";
110 setCanHaveModuleDir(false);
113 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
114 OS << "\t.set\tmacro\n";
115 setCanHaveModuleDir(false);
118 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
119 OS << "\t.set\tnomacro\n";
120 setCanHaveModuleDir(false);
123 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
124 OS << "\t.set\tmsa\n";
125 MipsTargetStreamer::emitDirectiveSetMsa();
128 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
129 OS << "\t.set\tnomsa\n";
130 MipsTargetStreamer::emitDirectiveSetNoMsa();
133 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
134 OS << "\t.set\tat\n";
135 setCanHaveModuleDir(false);
138 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
139 OS << "\t.set\tnoat\n";
140 setCanHaveModuleDir(false);
143 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
144 OS << "\t.end\t" << Name << '\n';
147 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
148 OS << "\t.ent\t" << Symbol.getName() << '\n';
151 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
153 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
155 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
156 OS << "\t.nan\tlegacy\n";
159 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
160 OS << "\t.option\tpic0\n";
163 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
164 OS << "\t.option\tpic2\n";
167 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
168 unsigned ReturnReg) {
170 << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
172 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
175 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
176 OS << "\t.set\tmips1\n";
177 setCanHaveModuleDir(false);
180 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
181 OS << "\t.set\tmips2\n";
182 setCanHaveModuleDir(false);
185 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
186 OS << "\t.set\tmips3\n";
187 setCanHaveModuleDir(false);
190 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
191 OS << "\t.set\tmips4\n";
192 setCanHaveModuleDir(false);
195 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
196 OS << "\t.set\tmips5\n";
197 setCanHaveModuleDir(false);
200 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
201 OS << "\t.set\tmips32\n";
202 setCanHaveModuleDir(false);
205 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
206 OS << "\t.set\tmips32r2\n";
207 setCanHaveModuleDir(false);
210 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
211 OS << "\t.set\tmips32r6\n";
212 setCanHaveModuleDir(false);
215 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
216 OS << "\t.set\tmips64\n";
217 setCanHaveModuleDir(false);
220 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
221 OS << "\t.set\tmips64r2\n";
222 setCanHaveModuleDir(false);
225 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
226 OS << "\t.set\tmips64r6\n";
227 setCanHaveModuleDir(false);
230 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
231 OS << "\t.set\tdsp\n";
232 setCanHaveModuleDir(false);
234 // Print a 32 bit hex number with all numbers.
235 static void printHex32(unsigned Value, raw_ostream &OS) {
237 for (int i = 7; i >= 0; i--)
238 OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
241 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
242 int CPUTopSavedRegOff) {
244 printHex32(CPUBitmask, OS);
245 OS << ',' << CPUTopSavedRegOff << '\n';
248 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
249 int FPUTopSavedRegOff) {
251 printHex32(FPUBitmask, OS);
252 OS << "," << FPUTopSavedRegOff << '\n';
255 void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
257 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
258 setCanHaveModuleDir(false);
261 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
265 OS << "\t.cpsetup\t$"
266 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
270 << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
276 OS << Sym.getName() << "\n";
277 setCanHaveModuleDir(false);
280 void MipsTargetAsmStreamer::emitDirectiveModuleFP(
281 MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
282 MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
284 StringRef ModuleValue;
285 OS << "\t.module\tfp=";
286 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
289 void MipsTargetAsmStreamer::emitDirectiveSetFp(
290 MipsABIFlagsSection::FpABIKind Value) {
291 StringRef ModuleValue;
293 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
296 void MipsTargetAsmStreamer::emitMipsAbiFlags() {
297 // No action required for text output.
300 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
302 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
304 OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
307 // This part is for ELF object output.
308 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
309 const MCSubtargetInfo &STI)
310 : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
311 MCAssembler &MCA = getStreamer().getAssembler();
312 uint64_t Features = STI.getFeatureBits();
313 Triple T(STI.getTargetTriple());
314 Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
318 // Update e_header flags
322 if (Features & Mips::FeatureMips64r6)
323 EFlags |= ELF::EF_MIPS_ARCH_64R6;
324 else if (Features & Mips::FeatureMips64r2)
325 EFlags |= ELF::EF_MIPS_ARCH_64R2;
326 else if (Features & Mips::FeatureMips64)
327 EFlags |= ELF::EF_MIPS_ARCH_64;
328 else if (Features & Mips::FeatureMips5)
329 EFlags |= ELF::EF_MIPS_ARCH_5;
330 else if (Features & Mips::FeatureMips4)
331 EFlags |= ELF::EF_MIPS_ARCH_4;
332 else if (Features & Mips::FeatureMips3)
333 EFlags |= ELF::EF_MIPS_ARCH_3;
334 else if (Features & Mips::FeatureMips32r6)
335 EFlags |= ELF::EF_MIPS_ARCH_32R6;
336 else if (Features & Mips::FeatureMips32r2)
337 EFlags |= ELF::EF_MIPS_ARCH_32R2;
338 else if (Features & Mips::FeatureMips32)
339 EFlags |= ELF::EF_MIPS_ARCH_32;
340 else if (Features & Mips::FeatureMips2)
341 EFlags |= ELF::EF_MIPS_ARCH_2;
343 EFlags |= ELF::EF_MIPS_ARCH_1;
346 // N64 does not require any ABI bits.
347 if (Features & Mips::FeatureO32)
348 EFlags |= ELF::EF_MIPS_ABI_O32;
349 else if (Features & Mips::FeatureN32)
350 EFlags |= ELF::EF_MIPS_ABI2;
352 if (Features & Mips::FeatureGP64Bit) {
353 if (Features & Mips::FeatureO32)
354 EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
355 } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
356 EFlags |= ELF::EF_MIPS_32BITMODE;
359 if (Features & Mips::FeatureNaN2008)
360 EFlags |= ELF::EF_MIPS_NAN2008;
362 // -mabicalls and -mplt are not implemented but we should act as if they were
364 EFlags |= ELF::EF_MIPS_CPIC;
365 if (Features & Mips::FeatureN64)
366 EFlags |= ELF::EF_MIPS_PIC;
368 MCA.setELFHeaderEFlags(EFlags);
371 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
372 if (!isMicroMipsEnabled())
374 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
375 uint8_t Type = MCELF::GetType(Data);
376 if (Type != ELF::STT_FUNC)
379 // The "other" values are stored in the last 6 bits of the second byte
380 // The traditional defines for STO values assume the full byte and thus
381 // the shift to pack it.
382 MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
385 void MipsTargetELFStreamer::finish() {
386 MCAssembler &MCA = getStreamer().getAssembler();
387 const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
389 // .bss, .text and .data are always at least 16-byte aligned.
390 MCSectionData &TextSectionData =
391 MCA.getOrCreateSectionData(*OFI.getTextSection());
392 MCSectionData &DataSectionData =
393 MCA.getOrCreateSectionData(*OFI.getDataSection());
394 MCSectionData &BSSSectionData =
395 MCA.getOrCreateSectionData(*OFI.getBSSSection());
397 TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment()));
398 DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
399 BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
401 // Emit all the option records.
402 // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
404 MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
405 MEF.EmitMipsOptionRecords();
410 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
411 const MCExpr *Value) {
412 // If on rhs is micromips symbol then mark Symbol as microMips.
413 if (Value->getKind() != MCExpr::SymbolRef)
415 const MCSymbol &RhsSym =
416 static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
417 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
418 uint8_t Type = MCELF::GetType(Data);
419 if ((Type != ELF::STT_FUNC) ||
420 !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
423 MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
424 // The "other" values are stored in the last 6 bits of the second byte.
425 // The traditional defines for STO values assume the full byte and thus
426 // the shift to pack it.
427 MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
430 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
431 return static_cast<MCELFStreamer &>(Streamer);
434 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
435 MicroMipsEnabled = true;
437 MCAssembler &MCA = getStreamer().getAssembler();
438 unsigned Flags = MCA.getELFHeaderEFlags();
439 Flags |= ELF::EF_MIPS_MICROMIPS;
440 MCA.setELFHeaderEFlags(Flags);
443 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
444 MicroMipsEnabled = false;
445 setCanHaveModuleDir(false);
448 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
449 MCAssembler &MCA = getStreamer().getAssembler();
450 unsigned Flags = MCA.getELFHeaderEFlags();
451 Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
452 MCA.setELFHeaderEFlags(Flags);
453 setCanHaveModuleDir(false);
456 void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
458 setCanHaveModuleDir(false);
461 void MipsTargetELFStreamer::emitDirectiveSetReorder() {
463 setCanHaveModuleDir(false);
466 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
467 MCAssembler &MCA = getStreamer().getAssembler();
468 unsigned Flags = MCA.getELFHeaderEFlags();
469 Flags |= ELF::EF_MIPS_NOREORDER;
470 MCA.setELFHeaderEFlags(Flags);
471 setCanHaveModuleDir(false);
474 void MipsTargetELFStreamer::emitDirectiveSetMacro() {
476 setCanHaveModuleDir(false);
479 void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
481 setCanHaveModuleDir(false);
484 void MipsTargetELFStreamer::emitDirectiveSetAt() {
486 setCanHaveModuleDir(false);
489 void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
491 setCanHaveModuleDir(false);
494 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
498 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
502 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
503 MCAssembler &MCA = getStreamer().getAssembler();
504 unsigned Flags = MCA.getELFHeaderEFlags();
505 Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
506 MCA.setELFHeaderEFlags(Flags);
509 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
510 MCAssembler &MCA = getStreamer().getAssembler();
511 unsigned Flags = MCA.getELFHeaderEFlags();
512 Flags |= ELF::EF_MIPS_NAN2008;
513 MCA.setELFHeaderEFlags(Flags);
516 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
517 MCAssembler &MCA = getStreamer().getAssembler();
518 unsigned Flags = MCA.getELFHeaderEFlags();
519 Flags &= ~ELF::EF_MIPS_NAN2008;
520 MCA.setELFHeaderEFlags(Flags);
523 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
524 MCAssembler &MCA = getStreamer().getAssembler();
525 unsigned Flags = MCA.getELFHeaderEFlags();
526 // This option overrides other PIC options like -KPIC.
528 Flags &= ~ELF::EF_MIPS_PIC;
529 MCA.setELFHeaderEFlags(Flags);
532 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
533 MCAssembler &MCA = getStreamer().getAssembler();
534 unsigned Flags = MCA.getELFHeaderEFlags();
536 // NOTE: We are following the GAS behaviour here which means the directive
537 // 'pic2' also sets the CPIC bit in the ELF header. This is different from
538 // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
539 // EF_MIPS_CPIC to be mutually exclusive.
540 Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
541 MCA.setELFHeaderEFlags(Flags);
544 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
545 unsigned ReturnReg) {
549 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
550 int CPUTopSavedRegOff) {
554 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
555 int FPUTopSavedRegOff) {
559 void MipsTargetELFStreamer::emitDirectiveSetMips1() {
560 setCanHaveModuleDir(false);
563 void MipsTargetELFStreamer::emitDirectiveSetMips2() {
564 setCanHaveModuleDir(false);
567 void MipsTargetELFStreamer::emitDirectiveSetMips3() {
568 setCanHaveModuleDir(false);
571 void MipsTargetELFStreamer::emitDirectiveSetMips4() {
572 setCanHaveModuleDir(false);
575 void MipsTargetELFStreamer::emitDirectiveSetMips5() {
576 setCanHaveModuleDir(false);
579 void MipsTargetELFStreamer::emitDirectiveSetMips32() {
580 setCanHaveModuleDir(false);
583 void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
584 setCanHaveModuleDir(false);
587 void MipsTargetELFStreamer::emitDirectiveSetMips32R6() {
588 setCanHaveModuleDir(false);
591 void MipsTargetELFStreamer::emitDirectiveSetMips64() {
592 setCanHaveModuleDir(false);
595 void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
596 setCanHaveModuleDir(false);
599 void MipsTargetELFStreamer::emitDirectiveSetMips64R6() {
600 setCanHaveModuleDir(false);
603 void MipsTargetELFStreamer::emitDirectiveSetDsp() {
604 setCanHaveModuleDir(false);
607 void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
609 // This directive expands to:
610 // lui $gp, %hi(_gp_disp)
611 // addui $gp, $gp, %lo(_gp_disp)
612 // addu $gp, $gp, $reg
613 // when support for position independent code is enabled.
614 if (!Pic || (isN32() || isN64()))
617 // There's a GNU extension controlled by -mno-shared that allows
618 // locally-binding symbols to be accessed using absolute addresses.
619 // This is currently not supported. When supported -mno-shared makes
620 // .cpload expand to:
621 // lui $gp, %hi(__gnu_local_gp)
622 // addiu $gp, $gp, %lo(__gnu_local_gp)
624 StringRef SymName("_gp_disp");
625 MCAssembler &MCA = getStreamer().getAssembler();
626 MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
627 MCA.getOrCreateSymbolData(*GP_Disp);
630 TmpInst.setOpcode(Mips::LUi);
631 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
632 const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
633 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
634 TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
635 getStreamer().EmitInstruction(TmpInst, STI);
639 TmpInst.setOpcode(Mips::ADDiu);
640 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
641 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
642 const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
643 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
644 TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
645 getStreamer().EmitInstruction(TmpInst, STI);
649 TmpInst.setOpcode(Mips::ADDu);
650 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
651 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
652 TmpInst.addOperand(MCOperand::CreateReg(RegNo));
653 getStreamer().EmitInstruction(TmpInst, STI);
655 setCanHaveModuleDir(false);
658 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
662 // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
663 if (!Pic || !(isN32() || isN64()))
666 MCAssembler &MCA = getStreamer().getAssembler();
669 // Either store the old $gp in a register or on the stack
671 // move $save, $gpreg
672 Inst.setOpcode(Mips::DADDu);
673 Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
674 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
675 Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
677 // sd $gpreg, offset($sp)
678 Inst.setOpcode(Mips::SD);
679 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
680 Inst.addOperand(MCOperand::CreateReg(Mips::SP));
681 Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
683 getStreamer().EmitInstruction(Inst, STI);
686 const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
687 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
688 const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
689 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
690 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
691 Inst.setOpcode(Mips::LUi);
692 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
693 Inst.addOperand(MCOperand::CreateExpr(HiExpr));
694 getStreamer().EmitInstruction(Inst, STI);
697 // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
698 Inst.setOpcode(Mips::ADDiu);
699 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
700 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
701 Inst.addOperand(MCOperand::CreateExpr(LoExpr));
702 getStreamer().EmitInstruction(Inst, STI);
705 // daddu $gp, $gp, $funcreg
706 Inst.setOpcode(Mips::DADDu);
707 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
708 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
709 Inst.addOperand(MCOperand::CreateReg(RegNo));
710 getStreamer().EmitInstruction(Inst, STI);
712 setCanHaveModuleDir(false);
715 void MipsTargetELFStreamer::emitMipsAbiFlags() {
716 MCAssembler &MCA = getStreamer().getAssembler();
717 MCContext &Context = MCA.getContext();
718 MCStreamer &OS = getStreamer();
719 const MCSectionELF *Sec =
720 Context.getELFSection(".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS,
721 ELF::SHF_ALLOC, SectionKind::getMetadata(), 24, "");
722 MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
723 ABIShndxSD.setAlignment(8);
724 OS.SwitchSection(Sec);
726 OS << ABIFlagsSection;
729 void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
731 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
733 ABIFlagsSection.OddSPReg = Enabled;