1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target streamer methods.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsMCTargetDesc.h"
16 #include "MipsTargetObjectFile.h"
17 #include "MipsTargetStreamer.h"
18 #include "llvm/MC/MCContext.h"
19 #include "llvm/MC/MCELF.h"
20 #include "llvm/MC/MCSectionELF.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/MC/MCSymbol.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/ELF.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/FormattedStream.h"
30 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
31 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
32 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
33 void MipsTargetStreamer::emitDirectiveSetMips16() {}
34 void MipsTargetStreamer::emitDirectiveSetNoMips16() {}
35 void MipsTargetStreamer::emitDirectiveSetReorder() {}
36 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
37 void MipsTargetStreamer::emitDirectiveSetMacro() {}
38 void MipsTargetStreamer::emitDirectiveSetNoMacro() {}
39 void MipsTargetStreamer::emitDirectiveSetAt() {}
40 void MipsTargetStreamer::emitDirectiveSetNoAt() {}
41 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
42 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
43 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
44 void MipsTargetStreamer::emitDirectiveNaN2008() {}
45 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
46 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
47 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
48 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
49 unsigned ReturnReg) {}
50 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
51 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
53 void MipsTargetStreamer::emitDirectiveSetMips32R2() {}
54 void MipsTargetStreamer::emitDirectiveSetMips64() {}
55 void MipsTargetStreamer::emitDirectiveSetMips64R2() {}
56 void MipsTargetStreamer::emitDirectiveSetDsp() {}
57 void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
58 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
59 const MCSymbol &Sym, bool IsReg) {
62 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
63 formatted_raw_ostream &OS)
64 : MipsTargetStreamer(S), OS(OS) {}
66 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
67 OS << "\t.set\tmicromips\n";
70 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
71 OS << "\t.set\tnomicromips\n";
74 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
75 OS << "\t.set\tmips16\n";
78 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
79 OS << "\t.set\tnomips16\n";
82 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
83 OS << "\t.set\treorder\n";
86 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
87 OS << "\t.set\tnoreorder\n";
90 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
91 OS << "\t.set\tmacro\n";
94 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
95 OS << "\t.set\tnomacro\n";
98 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
102 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
103 OS << "\t.set\tnoat\n";
106 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
107 OS << "\t.end\t" << Name << '\n';
110 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
111 OS << "\t.ent\t" << Symbol.getName() << '\n';
114 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
116 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
118 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
119 OS << "\t.nan\tlegacy\n";
122 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
123 OS << "\t.option\tpic0\n";
126 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
127 OS << "\t.option\tpic2\n";
130 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
131 unsigned ReturnReg) {
133 << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
135 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
138 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
139 OS << "\t.set\tmips32r2\n";
142 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
143 OS << "\t.set\tmips64\n";
146 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
147 OS << "\t.set\tmips64r2\n";
150 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
151 OS << "\t.set\tdsp\n";
153 // Print a 32 bit hex number with all numbers.
154 static void printHex32(unsigned Value, raw_ostream &OS) {
156 for (int i = 7; i >= 0; i--)
157 OS.write_hex((Value & (0xF << (i*4))) >> (i*4));
160 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
161 int CPUTopSavedRegOff) {
163 printHex32(CPUBitmask, OS);
164 OS << ',' << CPUTopSavedRegOff << '\n';
167 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
168 int FPUTopSavedRegOff) {
170 printHex32(FPUBitmask, OS);
171 OS << "," << FPUTopSavedRegOff << '\n';
174 void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
176 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
179 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
183 OS << "\t.cpsetup\t$"
184 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
188 << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
194 OS << Sym.getName() << "\n";
197 // This part is for ELF object output.
198 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
199 const MCSubtargetInfo &STI)
200 : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
201 MCAssembler &MCA = getStreamer().getAssembler();
202 uint64_t Features = STI.getFeatureBits();
203 Triple T(STI.getTargetTriple());
204 Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
208 // Update e_header flags
212 if (Features & Mips::FeatureMips64r6)
213 EFlags |= ELF::EF_MIPS_ARCH_64R6;
214 else if (Features & Mips::FeatureMips64r2)
215 EFlags |= ELF::EF_MIPS_ARCH_64R2;
216 else if (Features & Mips::FeatureMips64)
217 EFlags |= ELF::EF_MIPS_ARCH_64;
218 else if (Features & Mips::FeatureMips5)
219 EFlags |= ELF::EF_MIPS_ARCH_5;
220 else if (Features & Mips::FeatureMips4)
221 EFlags |= ELF::EF_MIPS_ARCH_4;
222 else if (Features & Mips::FeatureMips3)
223 EFlags |= ELF::EF_MIPS_ARCH_3;
224 else if (Features & Mips::FeatureMips32r6)
225 EFlags |= ELF::EF_MIPS_ARCH_32R6;
226 else if (Features & Mips::FeatureMips32r2)
227 EFlags |= ELF::EF_MIPS_ARCH_32R2;
228 else if (Features & Mips::FeatureMips32)
229 EFlags |= ELF::EF_MIPS_ARCH_32;
230 else if (Features & Mips::FeatureMips2)
231 EFlags |= ELF::EF_MIPS_ARCH_2;
233 EFlags |= ELF::EF_MIPS_ARCH_1;
235 if (T.isArch64Bit()) {
236 if (Features & Mips::FeatureN32)
237 EFlags |= ELF::EF_MIPS_ABI2;
238 else if (Features & Mips::FeatureO32) {
239 EFlags |= ELF::EF_MIPS_ABI_O32;
240 EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
242 // No need to set any bit for N64 which is the default ABI at the moment
243 // for 64-bit Mips architectures.
245 if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
246 EFlags |= ELF::EF_MIPS_32BITMODE;
249 EFlags |= ELF::EF_MIPS_ABI_O32;
253 if (Features & Mips::FeatureNaN2008)
254 EFlags |= ELF::EF_MIPS_NAN2008;
256 MCA.setELFHeaderEFlags(EFlags);
259 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
260 if (!isMicroMipsEnabled())
262 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
263 uint8_t Type = MCELF::GetType(Data);
264 if (Type != ELF::STT_FUNC)
267 // The "other" values are stored in the last 6 bits of the second byte
268 // The traditional defines for STO values assume the full byte and thus
269 // the shift to pack it.
270 MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
273 void MipsTargetELFStreamer::finish() {
274 MCAssembler &MCA = getStreamer().getAssembler();
275 MCContext &Context = MCA.getContext();
276 MCStreamer &OS = getStreamer();
277 Triple T(STI.getTargetTriple());
278 uint64_t Features = STI.getFeatureBits();
280 if (T.isArch64Bit() && (Features & Mips::FeatureN64)) {
281 const MCSectionELF *Sec = Context.getELFSection(
282 ".MIPS.options", ELF::SHT_MIPS_OPTIONS,
283 ELF::SHF_ALLOC | ELF::SHF_MIPS_NOSTRIP, SectionKind::getMetadata());
284 OS.SwitchSection(Sec);
286 OS.EmitIntValue(1, 1); // kind
287 OS.EmitIntValue(40, 1); // size
288 OS.EmitIntValue(0, 2); // section
289 OS.EmitIntValue(0, 4); // info
290 OS.EmitIntValue(0, 4); // ri_gprmask
291 OS.EmitIntValue(0, 4); // pad
292 OS.EmitIntValue(0, 4); // ri_cpr[0]mask
293 OS.EmitIntValue(0, 4); // ri_cpr[1]mask
294 OS.EmitIntValue(0, 4); // ri_cpr[2]mask
295 OS.EmitIntValue(0, 4); // ri_cpr[3]mask
296 OS.EmitIntValue(0, 8); // ri_gp_value
298 const MCSectionELF *Sec =
299 Context.getELFSection(".reginfo", ELF::SHT_MIPS_REGINFO, ELF::SHF_ALLOC,
300 SectionKind::getMetadata());
301 OS.SwitchSection(Sec);
303 OS.EmitIntValue(0, 4); // ri_gprmask
304 OS.EmitIntValue(0, 4); // ri_cpr[0]mask
305 OS.EmitIntValue(0, 4); // ri_cpr[1]mask
306 OS.EmitIntValue(0, 4); // ri_cpr[2]mask
307 OS.EmitIntValue(0, 4); // ri_cpr[3]mask
308 OS.EmitIntValue(0, 4); // ri_gp_value
312 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
313 const MCExpr *Value) {
314 // If on rhs is micromips symbol then mark Symbol as microMips.
315 if (Value->getKind() != MCExpr::SymbolRef)
317 const MCSymbol &RhsSym =
318 static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
319 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
320 uint8_t Type = MCELF::GetType(Data);
321 if ((Type != ELF::STT_FUNC)
322 || !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
325 MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
326 // The "other" values are stored in the last 6 bits of the second byte.
327 // The traditional defines for STO values assume the full byte and thus
328 // the shift to pack it.
329 MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
332 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
333 return static_cast<MCELFStreamer &>(Streamer);
336 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
337 MicroMipsEnabled = true;
339 MCAssembler &MCA = getStreamer().getAssembler();
340 unsigned Flags = MCA.getELFHeaderEFlags();
341 Flags |= ELF::EF_MIPS_MICROMIPS;
342 MCA.setELFHeaderEFlags(Flags);
345 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
346 MicroMipsEnabled = false;
349 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
350 MCAssembler &MCA = getStreamer().getAssembler();
351 unsigned Flags = MCA.getELFHeaderEFlags();
352 Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
353 MCA.setELFHeaderEFlags(Flags);
356 void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
360 void MipsTargetELFStreamer::emitDirectiveSetReorder() {
364 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
365 MCAssembler &MCA = getStreamer().getAssembler();
366 unsigned Flags = MCA.getELFHeaderEFlags();
367 Flags |= ELF::EF_MIPS_NOREORDER;
368 MCA.setELFHeaderEFlags(Flags);
371 void MipsTargetELFStreamer::emitDirectiveSetMacro() {
375 void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
379 void MipsTargetELFStreamer::emitDirectiveSetAt() {
383 void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
387 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
391 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
395 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
396 MCAssembler &MCA = getStreamer().getAssembler();
397 unsigned Flags = MCA.getELFHeaderEFlags();
398 Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
399 MCA.setELFHeaderEFlags(Flags);
402 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
403 MCAssembler &MCA = getStreamer().getAssembler();
404 unsigned Flags = MCA.getELFHeaderEFlags();
405 Flags |= ELF::EF_MIPS_NAN2008;
406 MCA.setELFHeaderEFlags(Flags);
409 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
410 MCAssembler &MCA = getStreamer().getAssembler();
411 unsigned Flags = MCA.getELFHeaderEFlags();
412 Flags &= ~ELF::EF_MIPS_NAN2008;
413 MCA.setELFHeaderEFlags(Flags);
416 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
417 MCAssembler &MCA = getStreamer().getAssembler();
418 unsigned Flags = MCA.getELFHeaderEFlags();
419 // This option overrides other PIC options like -KPIC.
421 Flags &= ~ELF::EF_MIPS_PIC;
422 MCA.setELFHeaderEFlags(Flags);
425 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
426 MCAssembler &MCA = getStreamer().getAssembler();
427 unsigned Flags = MCA.getELFHeaderEFlags();
429 // NOTE: We are following the GAS behaviour here which means the directive
430 // 'pic2' also sets the CPIC bit in the ELF header. This is different from
431 // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
432 // EF_MIPS_CPIC to be mutually exclusive.
433 Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
434 MCA.setELFHeaderEFlags(Flags);
437 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
438 unsigned ReturnReg) {
442 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
443 int CPUTopSavedRegOff) {
447 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
448 int FPUTopSavedRegOff) {
452 void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
453 // No action required for ELF output.
456 void MipsTargetELFStreamer::emitDirectiveSetMips64() {
457 // No action required for ELF output.
460 void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
461 // No action required for ELF output.
464 void MipsTargetELFStreamer::emitDirectiveSetDsp() {
465 // No action required for ELF output.
468 void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
470 // This directive expands to:
471 // lui $gp, %hi(_gp_disp)
472 // addui $gp, $gp, %lo(_gp_disp)
473 // addu $gp, $gp, $reg
474 // when support for position independent code is enabled.
475 if (!Pic || (isN32() || isN64()))
478 // There's a GNU extension controlled by -mno-shared that allows
479 // locally-binding symbols to be accessed using absolute addresses.
480 // This is currently not supported. When supported -mno-shared makes
481 // .cpload expand to:
482 // lui $gp, %hi(__gnu_local_gp)
483 // addiu $gp, $gp, %lo(__gnu_local_gp)
485 StringRef SymName("_gp_disp");
486 MCAssembler &MCA = getStreamer().getAssembler();
487 MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
488 MCA.getOrCreateSymbolData(*GP_Disp);
491 TmpInst.setOpcode(Mips::LUi);
492 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
493 const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
494 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
495 TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
496 getStreamer().EmitInstruction(TmpInst, STI);
500 TmpInst.setOpcode(Mips::ADDiu);
501 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
502 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
503 const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
504 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
505 TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
506 getStreamer().EmitInstruction(TmpInst, STI);
510 TmpInst.setOpcode(Mips::ADDu);
511 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
512 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
513 TmpInst.addOperand(MCOperand::CreateReg(RegNo));
514 getStreamer().EmitInstruction(TmpInst, STI);
517 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
521 // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
522 if (!Pic || !(isN32() || isN64()))
525 MCAssembler &MCA = getStreamer().getAssembler();
528 // Either store the old $gp in a register or on the stack
530 // move $save, $gpreg
531 Inst.setOpcode(Mips::DADDu);
532 Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
533 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
534 Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
536 // sd $gpreg, offset($sp)
537 Inst.setOpcode(Mips::SD);
538 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
539 Inst.addOperand(MCOperand::CreateReg(Mips::SP));
540 Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
542 getStreamer().EmitInstruction(Inst, STI);
545 const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
546 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
547 const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
548 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
549 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
550 Inst.setOpcode(Mips::LUi);
551 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
552 Inst.addOperand(MCOperand::CreateExpr(HiExpr));
553 getStreamer().EmitInstruction(Inst, STI);
556 // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
557 Inst.setOpcode(Mips::ADDiu);
558 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
559 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
560 Inst.addOperand(MCOperand::CreateExpr(LoExpr));
561 getStreamer().EmitInstruction(Inst, STI);
564 // daddu $gp, $gp, $funcreg
565 Inst.setOpcode(Mips::DADDu);
566 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
567 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
568 Inst.addOperand(MCOperand::CreateReg(RegNo));
569 getStreamer().EmitInstruction(Inst, STI);