lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp

   1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file provides Mips specific target descriptions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "InstPrinter/MipsInstPrinter.h"
  15 #include "MipsMCAsmInfo.h"
  16 #include "MipsMCNaCl.h"
  17 #include "MipsMCTargetDesc.h"
  18 #include "MipsTargetStreamer.h"
  19 #include "llvm/ADT/Triple.h"
  20 #include "llvm/MC/MCCodeGenInfo.h"
  21 #include "llvm/MC/MCELFStreamer.h"
  22 #include "llvm/MC/MCInstrInfo.h"
  23 #include "llvm/MC/MCRegisterInfo.h"
  24 #include "llvm/MC/MCSubtargetInfo.h"
  25 #include "llvm/MC/MCSymbol.h"
  26 #include "llvm/MC/MachineLocation.h"
  27 #include "llvm/Support/CommandLine.h"
  28 #include "llvm/Support/ErrorHandling.h"
  29 #include "llvm/Support/FormattedStream.h"
  30 #include "llvm/Support/TargetRegistry.h"
  31
  32 #define GET_INSTRINFO_MC_DESC
  33 #include "MipsGenInstrInfo.inc"
  34
  35 #define GET_SUBTARGETINFO_MC_DESC
  36 #include "MipsGenSubtargetInfo.inc"
  37
  38 #define GET_REGINFO_MC_DESC
  39 #include "MipsGenRegisterInfo.inc"
  40
  41 using namespace llvm;
  42
  43 /// Select the Mips CPU for the given triple and cpu name.
  44 /// FIXME: Merge with the copy in MipsSubtarget.cpp
  45 static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) {
  46   if (CPU.empty() || CPU == "generic") {
  47     Triple TheTriple(TT);
  48     if (TheTriple.getArch() == Triple::mips ||
  49         TheTriple.getArch() == Triple::mipsel)
  50       CPU = "mips32";
  51     else
  52       CPU = "mips64";
  53   }
  54   return CPU;
  55 }
  56
  57 static MCInstrInfo *createMipsMCInstrInfo() {
  58   MCInstrInfo *X = new MCInstrInfo();
  59   InitMipsMCInstrInfo(X);
  60   return X;
  61 }
  62
  63 static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
  64   MCRegisterInfo *X = new MCRegisterInfo();
  65   InitMipsMCRegisterInfo(X, Mips::RA);
  66   return X;
  67 }
  68
  69 static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
  70                                                   StringRef FS) {
  71   CPU = selectMipsCPU(TT, CPU);
  72   MCSubtargetInfo *X = new MCSubtargetInfo();
  73   InitMipsMCSubtargetInfo(X, TT, CPU, FS);
  74   return X;
  75 }
  76
  77 static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
  78   MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
  79
  80   unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
  81   MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, SP, 0);
  82   MAI->addInitialFrameState(Inst);
  83
  84   return MAI;
  85 }
  86
  87 static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
  88                                               CodeModel::Model CM,
  89                                               CodeGenOpt::Level OL) {
  90   MCCodeGenInfo *X = new MCCodeGenInfo();
  91   if (CM == CodeModel::JITDefault)
  92     RM = Reloc::Static;
  93   else if (RM == Reloc::Default)
  94     RM = Reloc::PIC_;
  95   X->InitMCCodeGenInfo(RM, CM, OL);
  96   return X;
  97 }
  98
  99 static MCInstPrinter *createMipsMCInstPrinter(const Target &T,
 100                                               unsigned SyntaxVariant,
 101                                               const MCAsmInfo &MAI,
 102                                               const MCInstrInfo &MII,
 103                                               const MCRegisterInfo &MRI,
 104                                               const MCSubtargetInfo &STI) {
 105   return new MipsInstPrinter(MAI, MII, MRI);
 106 }
 107
 108 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
 109                                     MCContext &Context, MCAsmBackend &MAB,
 110                                     raw_ostream &OS, MCCodeEmitter *Emitter,
 111                                     const MCSubtargetInfo &STI,
 112                                     bool RelaxAll, bool NoExecStack) {
 113   MCStreamer *S;
 114   if (!Triple(TT).isOSNaCl())
 115     S = createELFStreamer(Context, MAB, OS, Emitter, RelaxAll, NoExecStack);
 116   else
 117     S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, RelaxAll,
 118                                   NoExecStack);
 119   new MipsTargetELFStreamer(*S, STI);
 120   return S;
 121 }
 122
 123 static MCStreamer *
 124 createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
 125                     bool isVerboseAsm, bool useCFI, bool useDwarfDirectory,
 126                     MCInstPrinter *InstPrint, MCCodeEmitter *CE,
 127                     MCAsmBackend *TAB, bool ShowInst) {
 128   MCStreamer *S =
 129       llvm::createAsmStreamer(Ctx, OS, isVerboseAsm, useCFI, useDwarfDirectory,
 130                               InstPrint, CE, TAB, ShowInst);
 131   new MipsTargetAsmStreamer(*S, OS);
 132   return S;
 133 }
 134
 135 extern "C" void LLVMInitializeMipsTargetMC() {
 136   // Register the MC asm info.
 137   RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
 138   RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
 139   RegisterMCAsmInfoFn A(TheMips64Target, createMipsMCAsmInfo);
 140   RegisterMCAsmInfoFn B(TheMips64elTarget, createMipsMCAsmInfo);
 141
 142   // Register the MC codegen info.
 143   TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget,
 144                                         createMipsMCCodeGenInfo);
 145   TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget,
 146                                         createMipsMCCodeGenInfo);
 147   TargetRegistry::RegisterMCCodeGenInfo(TheMips64Target,
 148                                         createMipsMCCodeGenInfo);
 149   TargetRegistry::RegisterMCCodeGenInfo(TheMips64elTarget,
 150                                         createMipsMCCodeGenInfo);
 151
 152   // Register the MC instruction info.
 153   TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
 154   TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo);
 155   TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo);
 156   TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget,
 157                                       createMipsMCInstrInfo);
 158
 159   // Register the MC register info.
 160   TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
 161   TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
 162   TargetRegistry::RegisterMCRegInfo(TheMips64Target, createMipsMCRegisterInfo);
 163   TargetRegistry::RegisterMCRegInfo(TheMips64elTarget,
 164                                     createMipsMCRegisterInfo);
 165
 166   // Register the MC Code Emitter
 167   TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget,
 168                                         createMipsMCCodeEmitterEB);
 169   TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
 170                                         createMipsMCCodeEmitterEL);
 171   TargetRegistry::RegisterMCCodeEmitter(TheMips64Target,
 172                                         createMipsMCCodeEmitterEB);
 173   TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget,
 174                                         createMipsMCCodeEmitterEL);
 175
 176   // Register the object streamer.
 177   TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer);
 178   TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer);
 179   TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer);
 180   TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget,
 181                                            createMCStreamer);
 182
 183   // Register the asm streamer.
 184   TargetRegistry::RegisterAsmStreamer(TheMipsTarget, createMCAsmStreamer);
 185   TargetRegistry::RegisterAsmStreamer(TheMipselTarget, createMCAsmStreamer);
 186   TargetRegistry::RegisterAsmStreamer(TheMips64Target, createMCAsmStreamer);
 187   TargetRegistry::RegisterAsmStreamer(TheMips64elTarget, createMCAsmStreamer);
 188
 189   // Register the asm backend.
 190   TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
 191                                        createMipsAsmBackendEB32);
 192   TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
 193                                        createMipsAsmBackendEL32);
 194   TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
 195                                        createMipsAsmBackendEB64);
 196   TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
 197                                        createMipsAsmBackendEL64);
 198
 199   // Register the MC subtarget info.
 200   TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
 201                                           createMipsMCSubtargetInfo);
 202   TargetRegistry::RegisterMCSubtargetInfo(TheMipselTarget,
 203                                           createMipsMCSubtargetInfo);
 204   TargetRegistry::RegisterMCSubtargetInfo(TheMips64Target,
 205                                           createMipsMCSubtargetInfo);
 206   TargetRegistry::RegisterMCSubtargetInfo(TheMips64elTarget,
 207                                           createMipsMCSubtargetInfo);
 208
 209   // Register the MCInstPrinter.
 210   TargetRegistry::RegisterMCInstPrinter(TheMipsTarget,
 211                                         createMipsMCInstPrinter);
 212   TargetRegistry::RegisterMCInstPrinter(TheMipselTarget,
 213                                         createMipsMCInstPrinter);
 214   TargetRegistry::RegisterMCInstPrinter(TheMips64Target,
 215                                         createMipsMCInstPrinter);
 216   TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget,
 217                                         createMipsMCInstPrinter);
 218 }