1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCAsmInfo.h"
17 #include "MipsMCNaCl.h"
18 #include "MipsMCTargetDesc.h"
19 #include "MipsTargetStreamer.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/MC/MCCodeGenInfo.h"
22 #include "llvm/MC/MCELFStreamer.h"
23 #include "llvm/MC/MCInstrInfo.h"
24 #include "llvm/MC/MCRegisterInfo.h"
25 #include "llvm/MC/MCSubtargetInfo.h"
26 #include "llvm/MC/MCSymbol.h"
27 #include "llvm/MC/MachineLocation.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Support/FormattedStream.h"
31 #include "llvm/Support/TargetRegistry.h"
35 #define GET_INSTRINFO_MC_DESC
36 #include "MipsGenInstrInfo.inc"
38 #define GET_SUBTARGETINFO_MC_DESC
39 #include "MipsGenSubtargetInfo.inc"
41 #define GET_REGINFO_MC_DESC
42 #include "MipsGenRegisterInfo.inc"
44 /// Select the Mips CPU for the given triple and cpu name.
45 /// FIXME: Merge with the copy in MipsSubtarget.cpp
46 StringRef MIPS_MC::selectMipsCPU(const Triple &TT, StringRef CPU) {
47 if (CPU.empty() || CPU == "generic") {
48 if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel)
56 static MCInstrInfo *createMipsMCInstrInfo() {
57 MCInstrInfo *X = new MCInstrInfo();
58 InitMipsMCInstrInfo(X);
62 static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
63 MCRegisterInfo *X = new MCRegisterInfo();
64 InitMipsMCRegisterInfo(X, Mips::RA);
68 static MCSubtargetInfo *createMipsMCSubtargetInfo(const Triple &TT,
69 StringRef CPU, StringRef FS) {
70 CPU = MIPS_MC::selectMipsCPU(TT, CPU);
71 MCSubtargetInfo *X = new MCSubtargetInfo();
72 InitMipsMCSubtargetInfo(X, TT, CPU, FS);
76 static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI,
78 MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
80 unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
81 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, SP, 0);
82 MAI->addInitialFrameState(Inst);
87 static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
89 CodeGenOpt::Level OL) {
90 MCCodeGenInfo *X = new MCCodeGenInfo();
91 if (CM == CodeModel::JITDefault)
93 else if (RM == Reloc::Default)
95 X->initMCCodeGenInfo(RM, CM, OL);
99 static MCInstPrinter *createMipsMCInstPrinter(const Triple &T,
100 unsigned SyntaxVariant,
101 const MCAsmInfo &MAI,
102 const MCInstrInfo &MII,
103 const MCRegisterInfo &MRI) {
104 return new MipsInstPrinter(MAI, MII, MRI);
107 static MCStreamer *createMCStreamer(const Triple &T, MCContext &Context,
108 MCAsmBackend &MAB, raw_pwrite_stream &OS,
109 MCCodeEmitter *Emitter, bool RelaxAll) {
112 S = createMipsELFStreamer(Context, MAB, OS, Emitter, RelaxAll);
114 S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, RelaxAll);
118 static MCTargetStreamer *createMipsAsmTargetStreamer(MCStreamer &S,
119 formatted_raw_ostream &OS,
120 MCInstPrinter *InstPrint,
122 return new MipsTargetAsmStreamer(S, OS);
125 static MCTargetStreamer *createMipsNullTargetStreamer(MCStreamer &S) {
126 return new MipsTargetStreamer(S);
129 static MCTargetStreamer *
130 createMipsObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
131 return new MipsTargetELFStreamer(S, STI);
134 extern "C" void LLVMInitializeMipsTargetMC() {
135 for (Target *T : {&TheMipsTarget, &TheMipselTarget, &TheMips64Target,
136 &TheMips64elTarget}) {
137 // Register the MC asm info.
138 RegisterMCAsmInfoFn X(*T, createMipsMCAsmInfo);
140 // Register the MC codegen info.
141 TargetRegistry::RegisterMCCodeGenInfo(*T, createMipsMCCodeGenInfo);
143 // Register the MC instruction info.
144 TargetRegistry::RegisterMCInstrInfo(*T, createMipsMCInstrInfo);
146 // Register the MC register info.
147 TargetRegistry::RegisterMCRegInfo(*T, createMipsMCRegisterInfo);
149 // Register the elf streamer.
150 TargetRegistry::RegisterELFStreamer(*T, createMCStreamer);
152 // Register the asm target streamer.
153 TargetRegistry::RegisterAsmTargetStreamer(*T, createMipsAsmTargetStreamer);
155 TargetRegistry::RegisterNullTargetStreamer(*T,
156 createMipsNullTargetStreamer);
158 // Register the MC subtarget info.
159 TargetRegistry::RegisterMCSubtargetInfo(*T, createMipsMCSubtargetInfo);
161 // Register the MCInstPrinter.
162 TargetRegistry::RegisterMCInstPrinter(*T, createMipsMCInstPrinter);
164 TargetRegistry::RegisterObjectTargetStreamer(
165 *T, createMipsObjectTargetStreamer);
168 // Register the MC Code Emitter
169 for (Target *T : {&TheMipsTarget, &TheMips64Target})
170 TargetRegistry::RegisterMCCodeEmitter(*T, createMipsMCCodeEmitterEB);
172 for (Target *T : {&TheMipselTarget, &TheMips64elTarget})
173 TargetRegistry::RegisterMCCodeEmitter(*T, createMipsMCCodeEmitterEL);
175 // Register the asm backend.
176 TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
177 createMipsAsmBackendEB32);
178 TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
179 createMipsAsmBackendEL32);
180 TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
181 createMipsAsmBackendEB64);
182 TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
183 createMipsAsmBackendEL64);