1 //===-- MipsMCCodeEmitter.h - Convert Mips Code to Machine Code -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the MipsMCCodeEmitter class.
12 //===----------------------------------------------------------------------===//
15 #ifndef MIPS_MC_CODE_EMITTER_H
16 #define MIPS_MC_CODE_EMITTER_H
18 #include "llvm/MC/MCCodeEmitter.h"
19 #include "llvm/Support/DataTypes.h"
23 // Forward declarations.
31 class MCSubtargetInfo;
37 class MipsMCCodeEmitter : public MCCodeEmitter {
38 MipsMCCodeEmitter(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
39 void operator=(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
40 const MCInstrInfo &MCII;
44 bool isMicroMips(const MCSubtargetInfo &STI) const;
47 MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
48 : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {}
50 ~MipsMCCodeEmitter() {}
52 void EmitByte(unsigned char C, raw_ostream &OS) const;
54 void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
55 raw_ostream &OS) const;
57 void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
58 SmallVectorImpl<MCFixup> &Fixups,
59 const MCSubtargetInfo &STI) const;
61 // getBinaryCodeForInstr - TableGen'erated function for getting the
62 // binary encoding for an instruction.
63 uint64_t getBinaryCodeForInstr(const MCInst &MI,
64 SmallVectorImpl<MCFixup> &Fixups,
65 const MCSubtargetInfo &STI) const;
67 // getBranchJumpOpValue - Return binary encoding of the jump
68 // target operand. If the machine operand requires relocation,
69 // record the relocation and return zero.
70 unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
71 SmallVectorImpl<MCFixup> &Fixups,
72 const MCSubtargetInfo &STI) const;
74 // getBranchJumpOpValueMM - Return binary encoding of the microMIPS jump
75 // target operand. If the machine operand requires relocation,
76 // record the relocation and return zero.
77 unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
78 SmallVectorImpl<MCFixup> &Fixups,
79 const MCSubtargetInfo &STI) const;
81 // getBranchTargetOpValue - Return binary encoding of the branch
82 // target operand. If the machine operand requires relocation,
83 // record the relocation and return zero.
84 unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
85 SmallVectorImpl<MCFixup> &Fixups,
86 const MCSubtargetInfo &STI) const;
88 // getBranchTargetOpValue - Return binary encoding of the microMIPS branch
89 // target operand. If the machine operand requires relocation,
90 // record the relocation and return zero.
91 unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo,
92 SmallVectorImpl<MCFixup> &Fixups,
93 const MCSubtargetInfo &STI) const;
95 // getMachineOpValue - Return binary encoding of operand. If the machin
96 // operand requires relocation, record the relocation and return zero.
97 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
98 SmallVectorImpl<MCFixup> &Fixups,
99 const MCSubtargetInfo &STI) const;
101 unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo,
102 SmallVectorImpl<MCFixup> &Fixups,
103 const MCSubtargetInfo &STI) const;
105 unsigned getMemEncoding(const MCInst &MI, unsigned OpNo,
106 SmallVectorImpl<MCFixup> &Fixups,
107 const MCSubtargetInfo &STI) const;
108 unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo,
109 SmallVectorImpl<MCFixup> &Fixups,
110 const MCSubtargetInfo &STI) const;
111 unsigned getSizeExtEncoding(const MCInst &MI, unsigned OpNo,
112 SmallVectorImpl<MCFixup> &Fixups,
113 const MCSubtargetInfo &STI) const;
114 unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
115 SmallVectorImpl<MCFixup> &Fixups,
116 const MCSubtargetInfo &STI) const;
118 // getLSAImmEncoding - Return binary encoding of LSA immediate.
119 unsigned getLSAImmEncoding(const MCInst &MI, unsigned OpNo,
120 SmallVectorImpl<MCFixup> &Fixups,
121 const MCSubtargetInfo &STI) const;
123 unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups,
124 const MCSubtargetInfo &STI) const;
126 }; // class MipsMCCodeEmitter