1 //===-- MipsAsmParser.cpp - Parse Mips assembly to MCInst instructions ----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/MipsMCTargetDesc.h"
11 #include "MipsRegisterInfo.h"
12 #include "llvm/ADT/StringSwitch.h"
13 #include "llvm/MC/MCContext.h"
14 #include "llvm/MC/MCExpr.h"
15 #include "llvm/MC/MCInst.h"
16 #include "llvm/MC/MCStreamer.h"
17 #include "llvm/MC/MCSubtargetInfo.h"
18 #include "llvm/MC/MCSymbol.h"
19 #include "llvm/MC/MCParser/MCAsmLexer.h"
20 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
21 #include "llvm/MC/MCTargetAsmParser.h"
22 #include "llvm/Support/TargetRegistry.h"
28 class MipsAsmParser : public MCTargetAsmParser {
41 #define GET_ASSEMBLER_HEADER
42 #include "MipsGenAsmMatcher.inc"
44 bool mnemonicIsValid(StringRef Mnemonic) {
45 return mnemonicIsValidImpl(Mnemonic);
48 bool MatchAndEmitInstruction(SMLoc IDLoc,
49 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
52 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
54 bool ParseInstruction(StringRef Name, SMLoc NameLoc,
55 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
57 bool parseMathOperation(StringRef Name, SMLoc NameLoc,
58 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
60 bool ParseDirective(AsmToken DirectiveID);
62 MipsAsmParser::OperandMatchResultTy
63 parseMemOperand(SmallVectorImpl<MCParsedAsmOperand*>&);
66 getMCInstOperandNum(unsigned Kind, MCInst &Inst,
67 const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
68 unsigned OperandNum, unsigned &NumMCOperands);
70 bool ParseOperand(SmallVectorImpl<MCParsedAsmOperand*> &,
73 int tryParseRegister(StringRef Mnemonic);
75 bool tryParseRegisterOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
78 bool parseMemOffset(const MCExpr *&Res);
79 bool parseRelocOperand(const MCExpr *&Res);
80 MCSymbolRefExpr::VariantKind getVariantKind(StringRef Symbol);
82 bool isMips64() const {
83 return (STI.getFeatureBits() & Mips::FeatureMips64) != 0;
87 return (STI.getFeatureBits() & Mips::FeatureFP64Bit) != 0;
90 int matchRegisterName(StringRef Symbol);
92 int matchRegisterByNumber(unsigned RegNum, StringRef Mnemonic);
94 void setFpFormat(FpFormatTy Format) {
98 void setDefaultFpFormat();
100 void setFpFormat(StringRef Format);
102 FpFormatTy getFpFormat() {return FpFormat;}
104 bool requestsDoubleOperand(StringRef Mnemonic);
106 unsigned getReg(int RC,int RegNo);
109 MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser)
110 : MCTargetAsmParser(), STI(sti), Parser(parser) {
111 // Initialize the set of available features.
112 setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
115 MCAsmParser &getParser() const { return Parser; }
116 MCAsmLexer &getLexer() const { return Parser.getLexer(); }
123 /// MipsOperand - Instances of this class represent a parsed Mips machine
125 class MipsOperand : public MCParsedAsmOperand {
137 MipsOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {}
159 SMLoc StartLoc, EndLoc;
162 void addRegOperands(MCInst &Inst, unsigned N) const {
163 assert(N == 1 && "Invalid number of operands!");
164 Inst.addOperand(MCOperand::CreateReg(getReg()));
167 void addExpr(MCInst &Inst, const MCExpr *Expr) const{
168 // Add as immediate when possible. Null MCExpr = 0.
170 Inst.addOperand(MCOperand::CreateImm(0));
171 else if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
172 Inst.addOperand(MCOperand::CreateImm(CE->getValue()));
174 Inst.addOperand(MCOperand::CreateExpr(Expr));
177 void addImmOperands(MCInst &Inst, unsigned N) const {
178 assert(N == 1 && "Invalid number of operands!");
179 const MCExpr *Expr = getImm();
183 void addMemOperands(MCInst &Inst, unsigned N) const {
184 assert(N == 2 && "Invalid number of operands!");
186 Inst.addOperand(MCOperand::CreateReg(getMemBase()));
188 const MCExpr *Expr = getMemOff();
192 bool isReg() const { return Kind == k_Register; }
193 bool isImm() const { return Kind == k_Immediate; }
194 bool isToken() const { return Kind == k_Token; }
195 bool isMem() const { return Kind == k_Memory; }
197 StringRef getToken() const {
198 assert(Kind == k_Token && "Invalid access!");
199 return StringRef(Tok.Data, Tok.Length);
202 unsigned getReg() const {
203 assert((Kind == k_Register) && "Invalid access!");
207 const MCExpr *getImm() const {
208 assert((Kind == k_Immediate) && "Invalid access!");
212 unsigned getMemBase() const {
213 assert((Kind == k_Memory) && "Invalid access!");
217 const MCExpr *getMemOff() const {
218 assert((Kind == k_Memory) && "Invalid access!");
222 static MipsOperand *CreateToken(StringRef Str, SMLoc S) {
223 MipsOperand *Op = new MipsOperand(k_Token);
224 Op->Tok.Data = Str.data();
225 Op->Tok.Length = Str.size();
231 static MipsOperand *CreateReg(unsigned RegNum, SMLoc S, SMLoc E) {
232 MipsOperand *Op = new MipsOperand(k_Register);
233 Op->Reg.RegNum = RegNum;
239 static MipsOperand *CreateImm(const MCExpr *Val, SMLoc S, SMLoc E) {
240 MipsOperand *Op = new MipsOperand(k_Immediate);
247 static MipsOperand *CreateMem(unsigned Base, const MCExpr *Off,
249 MipsOperand *Op = new MipsOperand(k_Memory);
257 /// getStartLoc - Get the location of the first token of this operand.
258 SMLoc getStartLoc() const { return StartLoc; }
259 /// getEndLoc - Get the location of the last token of this operand.
260 SMLoc getEndLoc() const { return EndLoc; }
262 virtual void print(raw_ostream &OS) const {
263 llvm_unreachable("unimplemented!");
268 unsigned MipsAsmParser::
269 getMCInstOperandNum(unsigned Kind, MCInst &Inst,
270 const SmallVectorImpl<MCParsedAsmOperand*> &Operands,
271 unsigned OperandNum, unsigned &NumMCOperands) {
272 assert (0 && "getMCInstOperandNum() not supported by the Mips target.");
273 // The Mips backend doesn't currently include the matcher implementation, so
274 // the getMCInstOperandNumImpl() is undefined. This is a temporary
281 MatchAndEmitInstruction(SMLoc IDLoc,
282 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
287 unsigned MatchResult = MatchInstructionImpl(Operands, Kind, Inst, ErrorInfo);
289 switch (MatchResult) {
291 case Match_Success: {
293 Out.EmitInstruction(Inst);
296 case Match_MissingFeature:
297 Error(IDLoc, "instruction requires a CPU feature not currently enabled");
299 case Match_InvalidOperand: {
300 SMLoc ErrorLoc = IDLoc;
301 if (ErrorInfo != ~0U) {
302 if (ErrorInfo >= Operands.size())
303 return Error(IDLoc, "too few operands for instruction");
305 ErrorLoc = ((MipsOperand*)Operands[ErrorInfo])->getStartLoc();
306 if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;
309 return Error(ErrorLoc, "invalid operand for instruction");
311 case Match_MnemonicFail:
312 return Error(IDLoc, "invalid instruction");
317 int MipsAsmParser::matchRegisterName(StringRef Name) {
319 int CC = StringSwitch<unsigned>(Name)
320 .Case("zero", Mips::ZERO)
321 .Case("a0", Mips::A0)
322 .Case("a1", Mips::A1)
323 .Case("a2", Mips::A2)
324 .Case("a3", Mips::A3)
325 .Case("v0", Mips::V0)
326 .Case("v1", Mips::V1)
327 .Case("s0", Mips::S0)
328 .Case("s1", Mips::S1)
329 .Case("s2", Mips::S2)
330 .Case("s3", Mips::S3)
331 .Case("s4", Mips::S4)
332 .Case("s5", Mips::S5)
333 .Case("s6", Mips::S6)
334 .Case("s7", Mips::S7)
335 .Case("k0", Mips::K0)
336 .Case("k1", Mips::K1)
337 .Case("sp", Mips::SP)
338 .Case("fp", Mips::FP)
339 .Case("gp", Mips::GP)
340 .Case("ra", Mips::RA)
341 .Case("t0", Mips::T0)
342 .Case("t1", Mips::T1)
343 .Case("t2", Mips::T2)
344 .Case("t3", Mips::T3)
345 .Case("t4", Mips::T4)
346 .Case("t5", Mips::T5)
347 .Case("t6", Mips::T6)
348 .Case("t7", Mips::T7)
349 .Case("t8", Mips::T8)
350 .Case("t9", Mips::T9)
351 .Case("at", Mips::AT)
352 .Case("fcc0", Mips::FCC0)
356 //64 bit register in Mips are following 32 bit definitions.
362 if (Name[0] == 'f') {
363 StringRef NumString = Name.substr(1);
365 if( NumString.getAsInteger(10, IntVal))
366 return -1; //not integer
370 FpFormatTy Format = getFpFormat();
372 if (Format == FP_FORMAT_S || Format == FP_FORMAT_W)
373 return getReg(Mips::FGR32RegClassID, IntVal);
374 if (Format == FP_FORMAT_D) {
376 return getReg(Mips::FGR64RegClassID, IntVal);
378 //only even numbers available as register pairs
379 if (( IntVal > 31) || (IntVal%2 != 0))
381 return getReg(Mips::AFGR64RegClassID, IntVal/2);
387 void MipsAsmParser::setDefaultFpFormat() {
389 if (isMips64() || isFP64())
390 FpFormat = FP_FORMAT_D;
392 FpFormat = FP_FORMAT_S;
395 bool MipsAsmParser::requestsDoubleOperand(StringRef Mnemonic){
397 bool IsDouble = StringSwitch<bool>(Mnemonic.lower())
406 void MipsAsmParser::setFpFormat(StringRef Format) {
408 FpFormat = StringSwitch<FpFormatTy>(Format.lower())
409 .Case(".s", FP_FORMAT_S)
410 .Case(".d", FP_FORMAT_D)
411 .Case(".l", FP_FORMAT_L)
412 .Case(".w", FP_FORMAT_W)
413 .Default(FP_FORMAT_NONE);
416 unsigned MipsAsmParser::getReg(int RC,int RegNo){
417 return *(getContext().getRegisterInfo().getRegClass(RC).begin() + RegNo);
420 int MipsAsmParser::matchRegisterByNumber(unsigned RegNum,StringRef Mnemonic) {
422 if (Mnemonic.lower() == "rdhwr") {
423 //at the moment only hwreg29 is supported
432 return getReg(Mips::CPURegsRegClassID,RegNum);
435 int MipsAsmParser::tryParseRegister(StringRef Mnemonic) {
436 const AsmToken &Tok = Parser.getTok();
439 if (Tok.is(AsmToken::Identifier)) {
440 std::string lowerCase = Tok.getString().lower();
441 RegNum = matchRegisterName(lowerCase);
442 } else if (Tok.is(AsmToken::Integer))
443 RegNum = matchRegisterByNumber(static_cast<unsigned> (Tok.getIntVal()),
446 return RegNum; //error
447 //64 bit div operations require Mips::ZERO instead of MIPS::ZERO_64
448 if (isMips64() && RegNum == Mips::ZERO_64) {
449 if (Mnemonic.find("ddiv") != StringRef::npos)
456 tryParseRegisterOperand(SmallVectorImpl<MCParsedAsmOperand*> &Operands,
459 SMLoc S = Parser.getTok().getLoc();
462 //FIXME: we should make a more generic method for CCR
463 if ((Mnemonic == "cfc1" || Mnemonic == "ctc1")
464 && Operands.size() == 2 && Parser.getTok().is(AsmToken::Integer)){
465 RegNo = Parser.getTok().getIntVal(); //get the int value
466 //at the moment only fcc0 is supported
470 RegNo = tryParseRegister(Mnemonic);
474 Operands.push_back(MipsOperand::CreateReg(RegNo, S,
475 Parser.getTok().getLoc()));
476 Parser.Lex(); // Eat register token.
480 bool MipsAsmParser::ParseOperand(SmallVectorImpl<MCParsedAsmOperand*>&Operands,
481 StringRef Mnemonic) {
482 //Check if the current operand has a custom associated parser, if so, try to
483 //custom parse the operand, or fallback to the general approach.
484 OperandMatchResultTy ResTy = MatchOperandParserImpl(Operands, Mnemonic);
485 if (ResTy == MatchOperand_Success)
487 // If there wasn't a custom match, try the generic matcher below. Otherwise,
488 // there was a match, but an error occurred, in which case, just return that
489 // the operand parsing failed.
490 if (ResTy == MatchOperand_ParseFail)
493 switch (getLexer().getKind()) {
495 Error(Parser.getTok().getLoc(), "unexpected token in operand");
497 case AsmToken::Dollar: {
499 SMLoc S = Parser.getTok().getLoc();
500 Parser.Lex(); // Eat dollar token.
501 //parse register operand
502 if (!tryParseRegisterOperand(Operands,Mnemonic)) {
503 if (getLexer().is(AsmToken::LParen)) {
504 //check if it is indexed addressing operand
505 Operands.push_back(MipsOperand::CreateToken("(", S));
506 Parser.Lex(); //eat parenthesis
507 if (getLexer().isNot(AsmToken::Dollar))
510 Parser.Lex(); //eat dollar
511 if (tryParseRegisterOperand(Operands,Mnemonic))
514 if (!getLexer().is(AsmToken::RParen))
517 S = Parser.getTok().getLoc();
518 Operands.push_back(MipsOperand::CreateToken(")", S));
523 //maybe it is a symbol reference
524 StringRef Identifier;
525 if (Parser.ParseIdentifier(Identifier))
528 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
530 MCSymbol *Sym = getContext().GetOrCreateSymbol("$" + Identifier);
532 // Otherwise create a symbol ref.
533 const MCExpr *Res = MCSymbolRefExpr::Create(Sym, MCSymbolRefExpr::VK_None,
536 Operands.push_back(MipsOperand::CreateImm(Res, S, E));
539 case AsmToken::Identifier:
540 case AsmToken::LParen:
541 case AsmToken::Minus:
543 case AsmToken::Integer:
544 case AsmToken::String: {
545 // quoted label names
547 SMLoc S = Parser.getTok().getLoc();
548 if (getParser().ParseExpression(IdVal))
550 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
551 Operands.push_back(MipsOperand::CreateImm(IdVal, S, E));
554 case AsmToken::Percent: {
555 //it is a symbol reference or constant expression
557 SMLoc S = Parser.getTok().getLoc(); //start location of the operand
558 if (parseRelocOperand(IdVal))
561 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
563 Operands.push_back(MipsOperand::CreateImm(IdVal, S, E));
565 }//case AsmToken::Percent
566 }//switch(getLexer().getKind())
570 bool MipsAsmParser::parseRelocOperand(const MCExpr *&Res) {
572 Parser.Lex(); //eat % token
573 const AsmToken &Tok = Parser.getTok(); //get next token, operation
574 if (Tok.isNot(AsmToken::Identifier))
577 std::string Str = Tok.getIdentifier().str();
579 Parser.Lex(); //eat identifier
580 //now make expression from the rest of the operand
584 if (getLexer().getKind() == AsmToken::LParen) {
586 Parser.Lex(); //eat '(' token
587 if (getLexer().getKind() == AsmToken::Percent) {
588 Parser.Lex(); //eat % token
589 const AsmToken &nextTok = Parser.getTok();
590 if (nextTok.isNot(AsmToken::Identifier))
593 Str += nextTok.getIdentifier();
594 Parser.Lex(); //eat identifier
595 if (getLexer().getKind() != AsmToken::LParen)
600 if (getParser().ParseParenExpression(IdVal,EndLoc))
603 while (getLexer().getKind() == AsmToken::RParen)
604 Parser.Lex(); //eat ')' token
607 return true; //parenthesis must follow reloc operand
609 //Check the type of the expression
610 if (const MCConstantExpr *MCE = dyn_cast<MCConstantExpr>(IdVal)) {
611 //it's a constant, evaluate lo or hi value
612 int Val = MCE->getValue();
615 } else if (Str == "hi") {
616 Val = (Val & 0xffff0000) >> 16;
618 Res = MCConstantExpr::Create(Val, getContext());
622 if (const MCSymbolRefExpr *MSRE = dyn_cast<MCSymbolRefExpr>(IdVal)) {
623 //it's a symbol, create symbolic expression from symbol
624 StringRef Symbol = MSRE->getSymbol().getName();
625 MCSymbolRefExpr::VariantKind VK = getVariantKind(Str);
626 Res = MCSymbolRefExpr::Create(Symbol,VK,getContext());
632 bool MipsAsmParser::ParseRegister(unsigned &RegNo, SMLoc &StartLoc,
635 StartLoc = Parser.getTok().getLoc();
636 RegNo = tryParseRegister("");
637 EndLoc = Parser.getTok().getLoc();
638 return (RegNo == (unsigned)-1);
641 bool MipsAsmParser::parseMemOffset(const MCExpr *&Res) {
645 switch(getLexer().getKind()) {
648 case AsmToken::Integer:
649 case AsmToken::Minus:
651 return (getParser().ParseExpression(Res));
652 case AsmToken::Percent:
653 return parseRelocOperand(Res);
654 case AsmToken::LParen:
655 return false; //it's probably assuming 0
660 MipsAsmParser::OperandMatchResultTy MipsAsmParser::parseMemOperand(
661 SmallVectorImpl<MCParsedAsmOperand*>&Operands) {
663 const MCExpr *IdVal = 0;
665 //first operand is the offset
666 S = Parser.getTok().getLoc();
668 if (parseMemOffset(IdVal))
669 return MatchOperand_ParseFail;
671 const AsmToken &Tok = Parser.getTok(); //get next token
672 if (Tok.isNot(AsmToken::LParen)) {
673 Error(Parser.getTok().getLoc(), "'(' expected");
674 return MatchOperand_ParseFail;
677 Parser.Lex(); // Eat '(' token.
679 const AsmToken &Tok1 = Parser.getTok(); //get next token
680 if (Tok1.is(AsmToken::Dollar)) {
681 Parser.Lex(); // Eat '$' token.
682 if (tryParseRegisterOperand(Operands,"")) {
683 Error(Parser.getTok().getLoc(), "unexpected token in operand");
684 return MatchOperand_ParseFail;
688 Error(Parser.getTok().getLoc(),"unexpected token in operand");
689 return MatchOperand_ParseFail;
692 const AsmToken &Tok2 = Parser.getTok(); //get next token
693 if (Tok2.isNot(AsmToken::RParen)) {
694 Error(Parser.getTok().getLoc(), "')' expected");
695 return MatchOperand_ParseFail;
698 SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
700 Parser.Lex(); // Eat ')' token.
703 IdVal = MCConstantExpr::Create(0, getContext());
705 //now replace register operand with the mem operand
706 MipsOperand* op = static_cast<MipsOperand*>(Operands.back());
707 int RegNo = op->getReg();
708 //remove register from operands
710 //and add memory operand
711 Operands.push_back(MipsOperand::CreateMem(RegNo, IdVal, S, E));
713 return MatchOperand_Success;
716 MCSymbolRefExpr::VariantKind MipsAsmParser::getVariantKind(StringRef Symbol) {
718 MCSymbolRefExpr::VariantKind VK
719 = StringSwitch<MCSymbolRefExpr::VariantKind>(Symbol)
720 .Case("hi", MCSymbolRefExpr::VK_Mips_ABS_HI)
721 .Case("lo", MCSymbolRefExpr::VK_Mips_ABS_LO)
722 .Case("gp_rel", MCSymbolRefExpr::VK_Mips_GPREL)
723 .Case("call16", MCSymbolRefExpr::VK_Mips_GOT_CALL)
724 .Case("got", MCSymbolRefExpr::VK_Mips_GOT)
725 .Case("tlsgd", MCSymbolRefExpr::VK_Mips_TLSGD)
726 .Case("tlsldm", MCSymbolRefExpr::VK_Mips_TLSLDM)
727 .Case("dtprel_hi", MCSymbolRefExpr::VK_Mips_DTPREL_HI)
728 .Case("dtprel_lo", MCSymbolRefExpr::VK_Mips_DTPREL_LO)
729 .Case("gottprel", MCSymbolRefExpr::VK_Mips_GOTTPREL)
730 .Case("tprel_hi", MCSymbolRefExpr::VK_Mips_TPREL_HI)
731 .Case("tprel_lo", MCSymbolRefExpr::VK_Mips_TPREL_LO)
732 .Case("got_disp", MCSymbolRefExpr::VK_Mips_GOT_DISP)
733 .Case("got_page", MCSymbolRefExpr::VK_Mips_GOT_PAGE)
734 .Case("got_ofst", MCSymbolRefExpr::VK_Mips_GOT_OFST)
735 .Case("hi(%neg(%gp_rel", MCSymbolRefExpr::VK_Mips_GPOFF_HI)
736 .Case("lo(%neg(%gp_rel", MCSymbolRefExpr::VK_Mips_GPOFF_LO)
737 .Default(MCSymbolRefExpr::VK_None);
742 static int ConvertCcString(StringRef CondString) {
743 int CC = StringSwitch<unsigned>(CondString)
766 parseMathOperation(StringRef Name, SMLoc NameLoc,
767 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
769 size_t Start = Name.find('.'), Next = Name.rfind('.');
770 StringRef Format1 = Name.slice(Start, Next);
771 //and add the first format to the operands
772 Operands.push_back(MipsOperand::CreateToken(Format1, NameLoc));
773 //now for the second format
774 StringRef Format2 = Name.slice(Next, StringRef::npos);
775 Operands.push_back(MipsOperand::CreateToken(Format2, NameLoc));
777 //set the format for the first register
778 setFpFormat(Format1);
780 // Read the remaining operands.
781 if (getLexer().isNot(AsmToken::EndOfStatement)) {
782 // Read the first operand.
783 if (ParseOperand(Operands, Name)) {
784 SMLoc Loc = getLexer().getLoc();
785 Parser.EatToEndOfStatement();
786 return Error(Loc, "unexpected token in argument list");
789 if (getLexer().isNot(AsmToken::Comma)) {
790 SMLoc Loc = getLexer().getLoc();
791 Parser.EatToEndOfStatement();
792 return Error(Loc, "unexpected token in argument list");
795 Parser.Lex(); // Eat the comma.
797 //set the format for the first register
798 setFpFormat(Format2);
800 // Parse and remember the operand.
801 if (ParseOperand(Operands, Name)) {
802 SMLoc Loc = getLexer().getLoc();
803 Parser.EatToEndOfStatement();
804 return Error(Loc, "unexpected token in argument list");
808 if (getLexer().isNot(AsmToken::EndOfStatement)) {
809 SMLoc Loc = getLexer().getLoc();
810 Parser.EatToEndOfStatement();
811 return Error(Loc, "unexpected token in argument list");
814 Parser.Lex(); // Consume the EndOfStatement
819 ParseInstruction(StringRef Name, SMLoc NameLoc,
820 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
821 //floating point instructions: should register be treated as double?
822 if (requestsDoubleOperand(Name)) {
823 setFpFormat(FP_FORMAT_D);
824 Operands.push_back(MipsOperand::CreateToken(Name, NameLoc));
827 setDefaultFpFormat();
828 // Create the leading tokens for the mnemonic, split by '.' characters.
829 size_t Start = 0, Next = Name.find('.');
830 StringRef Mnemonic = Name.slice(Start, Next);
832 Operands.push_back(MipsOperand::CreateToken(Mnemonic, NameLoc));
834 if (Next != StringRef::npos) {
835 //there is a format token in mnemonic
836 //StringRef Rest = Name.slice(Next, StringRef::npos);
837 size_t Dot = Name.find('.', Next+1);
838 StringRef Format = Name.slice(Next, Dot);
839 if (Dot == StringRef::npos) //only one '.' in a string, it's a format
840 Operands.push_back(MipsOperand::CreateToken(Format, NameLoc));
842 if (Name.startswith("c.")){
843 // floating point compare, add '.' and immediate represent for cc
844 Operands.push_back(MipsOperand::CreateToken(".", NameLoc));
845 int Cc = ConvertCcString(Format);
847 return Error(NameLoc, "Invalid conditional code");
849 SMLoc E = SMLoc::getFromPointer(
850 Parser.getTok().getLoc().getPointer() -1 );
851 Operands.push_back(MipsOperand::CreateImm(
852 MCConstantExpr::Create(Cc, getContext()), NameLoc, E));
854 //trunc, ceil, floor ...
855 return parseMathOperation(Name, NameLoc, Operands);
858 //the rest is a format
859 Format = Name.slice(Dot, StringRef::npos);
860 Operands.push_back(MipsOperand::CreateToken(Format, NameLoc));
867 // Read the remaining operands.
868 if (getLexer().isNot(AsmToken::EndOfStatement)) {
869 // Read the first operand.
870 if (ParseOperand(Operands, Name)) {
871 SMLoc Loc = getLexer().getLoc();
872 Parser.EatToEndOfStatement();
873 return Error(Loc, "unexpected token in argument list");
876 while (getLexer().is(AsmToken::Comma) ) {
877 Parser.Lex(); // Eat the comma.
879 // Parse and remember the operand.
880 if (ParseOperand(Operands, Name)) {
881 SMLoc Loc = getLexer().getLoc();
882 Parser.EatToEndOfStatement();
883 return Error(Loc, "unexpected token in argument list");
888 if (getLexer().isNot(AsmToken::EndOfStatement)) {
889 SMLoc Loc = getLexer().getLoc();
890 Parser.EatToEndOfStatement();
891 return Error(Loc, "unexpected token in argument list");
894 Parser.Lex(); // Consume the EndOfStatement
899 ParseDirective(AsmToken DirectiveID) {
901 if (DirectiveID.getString() == ".ent") {
902 //ignore this directive for now
907 if (DirectiveID.getString() == ".end") {
908 //ignore this directive for now
913 if (DirectiveID.getString() == ".frame") {
914 //ignore this directive for now
915 Parser.EatToEndOfStatement();
919 if (DirectiveID.getString() == ".set") {
920 //ignore this directive for now
921 Parser.EatToEndOfStatement();
925 if (DirectiveID.getString() == ".fmask") {
926 //ignore this directive for now
927 Parser.EatToEndOfStatement();
931 if (DirectiveID.getString() == ".mask") {
932 //ignore this directive for now
933 Parser.EatToEndOfStatement();
937 if (DirectiveID.getString() == ".gpword") {
938 //ignore this directive for now
939 Parser.EatToEndOfStatement();
946 extern "C" void LLVMInitializeMipsAsmParser() {
947 RegisterMCAsmParser<MipsAsmParser> X(TheMipsTarget);
948 RegisterMCAsmParser<MipsAsmParser> Y(TheMipselTarget);
949 RegisterMCAsmParser<MipsAsmParser> A(TheMips64Target);
950 RegisterMCAsmParser<MipsAsmParser> B(TheMips64elTarget);
953 #define GET_REGISTER_MATCHER
954 #define GET_MATCHER_IMPLEMENTATION
955 #include "MipsGenAsmMatcher.inc"