1 //===-- MipsAsmParser.cpp - Parse Mips assembly to MCInst instructions ----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "MCTargetDesc/MipsMCTargetDesc.h"
11 #include "llvm/MC/MCParser/MCAsmLexer.h"
12 #include "llvm/MC/MCTargetAsmParser.h"
13 #include "llvm/Support/TargetRegistry.h"
14 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
15 #include "llvm/MC/MCTargetAsmParser.h"
16 #include "llvm/MC/MCInst.h"
17 #include "llvm/MC/MCExpr.h"
18 #include "llvm/Support/MathExtras.h"
23 class MipsAsmParser : public MCTargetAsmParser {
25 #define GET_ASSEMBLER_HEADER
26 #include "MipsGenAsmMatcher.inc"
28 bool MatchAndEmitInstruction(SMLoc IDLoc,
29 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
32 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc);
34 bool ParseInstruction(StringRef Name, SMLoc NameLoc,
35 SmallVectorImpl<MCParsedAsmOperand*> &Operands);
37 bool ParseDirective(AsmToken DirectiveID);
39 OperandMatchResultTy parseMemOperand(SmallVectorImpl<MCParsedAsmOperand*>&);
41 MipsAsmParser(MCSubtargetInfo &sti, MCAsmParser &parser)
42 : MCTargetAsmParser() {
50 /// MipsOperand - Instances of this class represent a parsed Mips machine
52 class MipsOperand : public MCParsedAsmOperand {
63 MipsOperand(KindTy K) : MCParsedAsmOperand(), Kind(K) {}
65 void addRegOperands(MCInst &Inst, unsigned N) const {
66 llvm_unreachable("unimplemented!");
68 void addExpr(MCInst &Inst, const MCExpr *Expr) const{
69 llvm_unreachable("unimplemented!");
71 void addImmOperands(MCInst &Inst, unsigned N) const {
72 llvm_unreachable("unimplemented!");
74 void addMemOperands(MCInst &Inst, unsigned N) const {
75 llvm_unreachable("unimplemented!");
78 bool isReg() const { return Kind == k_Register; }
79 bool isImm() const { return Kind == k_Immediate; }
80 bool isToken() const { return Kind == k_Token; }
81 bool isMem() const { return Kind == k_Memory; }
83 StringRef getToken() const {
84 assert(Kind == k_Token && "Invalid access!");
88 unsigned getReg() const {
89 assert((Kind == k_Register) && "Invalid access!");
93 virtual void print(raw_ostream &OS) const {
94 llvm_unreachable("unimplemented!");
100 MatchAndEmitInstruction(SMLoc IDLoc,
101 SmallVectorImpl<MCParsedAsmOperand*> &Operands,
107 ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) {
112 ParseInstruction(StringRef Name, SMLoc NameLoc,
113 SmallVectorImpl<MCParsedAsmOperand*> &Operands) {
118 ParseDirective(AsmToken DirectiveID) {
122 MipsAsmParser::OperandMatchResultTy MipsAsmParser::
123 parseMemOperand(SmallVectorImpl<MCParsedAsmOperand*>&) {
124 return MatchOperand_ParseFail;
127 extern "C" void LLVMInitializeMipsAsmParser() {
128 RegisterMCAsmParser<MipsAsmParser> X(TheMipsTarget);
129 RegisterMCAsmParser<MipsAsmParser> Y(TheMipselTarget);
130 RegisterMCAsmParser<MipsAsmParser> A(TheMips64Target);
131 RegisterMCAsmParser<MipsAsmParser> B(TheMips64elTarget);