lib/Target/MSP430/MSP430InstrInfo.h

   1 //===- MSP430InstrInfo.h - MSP430 Instruction Information -------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the MSP430 implementation of the TargetInstrInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef LLVM_TARGET_MSP430INSTRINFO_H
  15 #define LLVM_TARGET_MSP430INSTRINFO_H
  16
  17 #include "llvm/Target/TargetInstrInfo.h"
  18 #include "MSP430RegisterInfo.h"
  19
  20 namespace llvm {
  21
  22 class MSP430TargetMachine;
  23
  24 class MSP430InstrInfo : public TargetInstrInfoImpl {
  25   const MSP430RegisterInfo RI;
  26   MSP430TargetMachine &TM;
  27 public:
  28   explicit MSP430InstrInfo(MSP430TargetMachine &TM);
  29
  30   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
  31   /// such, whenever a client has an instance of instruction info, it should
  32   /// always be able to get register info as well (through this method).
  33   ///
  34   virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; }
  35
  36   bool copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
  37                     unsigned DestReg, unsigned SrcReg,
  38                     const TargetRegisterClass *DestRC,
  39                     const TargetRegisterClass *SrcRC) const;
  40
  41   bool isMoveInstr(const MachineInstr& MI,
  42                    unsigned &SrcReg, unsigned &DstReg,
  43                    unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
  44
  45   virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
  46                                    MachineBasicBlock::iterator MI,
  47                                    unsigned SrcReg, bool isKill,
  48                                    int FrameIndex,
  49                                    const TargetRegisterClass *RC) const;
  50   virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
  51                                     MachineBasicBlock::iterator MI,
  52                                     unsigned DestReg, int FrameIdx,
  53                                     const TargetRegisterClass *RC) const;
  54
  55   virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
  56                                          MachineBasicBlock::iterator MI,
  57                                  const std::vector<CalleeSavedInfo> &CSI) const;
  58   virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
  59                                            MachineBasicBlock::iterator MI,
  60                                  const std::vector<CalleeSavedInfo> &CSI) const;
  61
  62   // Branch folding goodness
  63   bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const;
  64   bool isUnpredicatedTerminator(const MachineInstr *MI) const;
  65   bool AnalyzeBranch(MachineBasicBlock &MBB,
  66                      MachineBasicBlock *&TBB, MachineBasicBlock *&FBB,
  67                      SmallVectorImpl<MachineOperand> &Cond,
  68                      bool AllowModify) const;
  69
  70   unsigned RemoveBranch(MachineBasicBlock &MBB) const;
  71   unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
  72                         MachineBasicBlock *FBB,
  73                         const SmallVectorImpl<MachineOperand> &Cond) const;
  74
  75 };
  76
  77 }
  78
  79 #endif