1 //===-- MSP430FrameLowering.cpp - MSP430 Frame Information ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MSP430 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "MSP430FrameLowering.h"
15 #include "MSP430InstrInfo.h"
16 #include "MSP430MachineFunctionInfo.h"
17 #include "MSP430Subtarget.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineModuleInfo.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/IR/Function.h"
25 #include "llvm/Support/CommandLine.h"
26 #include "llvm/Target/TargetOptions.h"
30 bool MSP430FrameLowering::hasFP(const MachineFunction &MF) const {
31 const MachineFrameInfo *MFI = MF.getFrameInfo();
33 return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
34 MF.getFrameInfo()->hasVarSizedObjects() ||
35 MFI->isFrameAddressTaken());
38 bool MSP430FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
39 return !MF.getFrameInfo()->hasVarSizedObjects();
42 void MSP430FrameLowering::emitPrologue(MachineFunction &MF) const {
43 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
44 MachineFrameInfo *MFI = MF.getFrameInfo();
45 MSP430MachineFunctionInfo *MSP430FI = MF.getInfo<MSP430MachineFunctionInfo>();
46 const MSP430InstrInfo &TII =
47 *static_cast<const MSP430InstrInfo *>(
48 MF.getTarget().getSubtargetImpl()->getInstrInfo());
50 MachineBasicBlock::iterator MBBI = MBB.begin();
51 DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
53 // Get the number of bytes to allocate from the FrameInfo.
54 uint64_t StackSize = MFI->getStackSize();
56 uint64_t NumBytes = 0;
58 // Calculate required stack adjustment
59 uint64_t FrameSize = StackSize - 2;
60 NumBytes = FrameSize - MSP430FI->getCalleeSavedFrameSize();
62 // Get the offset of the stack slot for the EBP register... which is
63 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
64 // Update the frame offset adjustment.
65 MFI->setOffsetAdjustment(-NumBytes);
67 // Save FPW into the appropriate stack slot...
68 BuildMI(MBB, MBBI, DL, TII.get(MSP430::PUSH16r))
69 .addReg(MSP430::FPW, RegState::Kill);
71 // Update FPW with the new base value...
72 BuildMI(MBB, MBBI, DL, TII.get(MSP430::MOV16rr), MSP430::FPW)
75 // Mark the FramePtr as live-in in every block except the entry.
76 for (MachineFunction::iterator I = std::next(MF.begin()), E = MF.end();
78 I->addLiveIn(MSP430::FPW);
81 NumBytes = StackSize - MSP430FI->getCalleeSavedFrameSize();
83 // Skip the callee-saved push instructions.
84 while (MBBI != MBB.end() && (MBBI->getOpcode() == MSP430::PUSH16r))
87 if (MBBI != MBB.end())
88 DL = MBBI->getDebugLoc();
90 if (NumBytes) { // adjust stack pointer: SPW -= numbytes
91 // If there is an SUB16ri of SPW immediately before this instruction, merge
93 //NumBytes -= mergeSPUpdates(MBB, MBBI, true);
94 // If there is an ADD16ri or SUB16ri of SPW immediately after this
95 // instruction, merge the two instructions.
96 // mergeSPUpdatesDown(MBB, MBBI, &NumBytes);
100 BuildMI(MBB, MBBI, DL, TII.get(MSP430::SUB16ri), MSP430::SPW)
101 .addReg(MSP430::SPW).addImm(NumBytes);
102 // The SRW implicit def is dead.
103 MI->getOperand(3).setIsDead();
108 void MSP430FrameLowering::emitEpilogue(MachineFunction &MF,
109 MachineBasicBlock &MBB) const {
110 const MachineFrameInfo *MFI = MF.getFrameInfo();
111 MSP430MachineFunctionInfo *MSP430FI = MF.getInfo<MSP430MachineFunctionInfo>();
112 const MSP430InstrInfo &TII =
113 *static_cast<const MSP430InstrInfo *>(
114 MF.getTarget().getSubtargetImpl()->getInstrInfo());
116 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
117 unsigned RetOpcode = MBBI->getOpcode();
118 DebugLoc DL = MBBI->getDebugLoc();
122 case MSP430::RETI: break; // These are ok
124 llvm_unreachable("Can only insert epilog into returning blocks");
127 // Get the number of bytes to allocate from the FrameInfo
128 uint64_t StackSize = MFI->getStackSize();
129 unsigned CSSize = MSP430FI->getCalleeSavedFrameSize();
130 uint64_t NumBytes = 0;
133 // Calculate required stack adjustment
134 uint64_t FrameSize = StackSize - 2;
135 NumBytes = FrameSize - CSSize;
138 BuildMI(MBB, MBBI, DL, TII.get(MSP430::POP16r), MSP430::FPW);
140 NumBytes = StackSize - CSSize;
142 // Skip the callee-saved pop instructions.
143 while (MBBI != MBB.begin()) {
144 MachineBasicBlock::iterator PI = std::prev(MBBI);
145 unsigned Opc = PI->getOpcode();
146 if (Opc != MSP430::POP16r && !PI->isTerminator())
151 DL = MBBI->getDebugLoc();
153 // If there is an ADD16ri or SUB16ri of SPW immediately before this
154 // instruction, merge the two instructions.
155 //if (NumBytes || MFI->hasVarSizedObjects())
156 // mergeSPUpdatesUp(MBB, MBBI, StackPtr, &NumBytes);
158 if (MFI->hasVarSizedObjects()) {
159 BuildMI(MBB, MBBI, DL,
160 TII.get(MSP430::MOV16rr), MSP430::SPW).addReg(MSP430::FPW);
163 BuildMI(MBB, MBBI, DL,
164 TII.get(MSP430::SUB16ri), MSP430::SPW)
165 .addReg(MSP430::SPW).addImm(CSSize);
166 // The SRW implicit def is dead.
167 MI->getOperand(3).setIsDead();
170 // adjust stack pointer back: SPW += numbytes
173 BuildMI(MBB, MBBI, DL, TII.get(MSP430::ADD16ri), MSP430::SPW)
174 .addReg(MSP430::SPW).addImm(NumBytes);
175 // The SRW implicit def is dead.
176 MI->getOperand(3).setIsDead();
181 // FIXME: Can we eleminate these in favour of generic code?
183 MSP430FrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB,
184 MachineBasicBlock::iterator MI,
185 const std::vector<CalleeSavedInfo> &CSI,
186 const TargetRegisterInfo *TRI) const {
191 if (MI != MBB.end()) DL = MI->getDebugLoc();
193 MachineFunction &MF = *MBB.getParent();
194 const TargetInstrInfo &TII =
195 *MF.getTarget().getSubtargetImpl()->getInstrInfo();
196 MSP430MachineFunctionInfo *MFI = MF.getInfo<MSP430MachineFunctionInfo>();
197 MFI->setCalleeSavedFrameSize(CSI.size() * 2);
199 for (unsigned i = CSI.size(); i != 0; --i) {
200 unsigned Reg = CSI[i-1].getReg();
201 // Add the callee-saved register as live-in. It's killed at the spill.
203 BuildMI(MBB, MI, DL, TII.get(MSP430::PUSH16r))
204 .addReg(Reg, RegState::Kill);
210 MSP430FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
211 MachineBasicBlock::iterator MI,
212 const std::vector<CalleeSavedInfo> &CSI,
213 const TargetRegisterInfo *TRI) const {
218 if (MI != MBB.end()) DL = MI->getDebugLoc();
220 MachineFunction &MF = *MBB.getParent();
221 const TargetInstrInfo &TII =
222 *MF.getTarget().getSubtargetImpl()->getInstrInfo();
224 for (unsigned i = 0, e = CSI.size(); i != e; ++i)
225 BuildMI(MBB, MI, DL, TII.get(MSP430::POP16r), CSI[i].getReg());
230 void MSP430FrameLowering::
231 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
232 MachineBasicBlock::iterator I) const {
233 const MSP430InstrInfo &TII =
234 *static_cast<const MSP430InstrInfo *>(
235 MF.getTarget().getSubtargetImpl()->getInstrInfo());
236 unsigned StackAlign = getStackAlignment();
238 if (!hasReservedCallFrame(MF)) {
239 // If the stack pointer can be changed after prologue, turn the
240 // adjcallstackup instruction into a 'sub SPW, <amt>' and the
241 // adjcallstackdown instruction into 'add SPW, <amt>'
242 // TODO: consider using push / pop instead of sub + store / add
243 MachineInstr *Old = I;
244 uint64_t Amount = Old->getOperand(0).getImm();
246 // We need to keep the stack aligned properly. To do this, we round the
247 // amount of space needed for the outgoing arguments up to the next
248 // alignment boundary.
249 Amount = (Amount+StackAlign-1)/StackAlign*StackAlign;
251 MachineInstr *New = nullptr;
252 if (Old->getOpcode() == TII.getCallFrameSetupOpcode()) {
253 New = BuildMI(MF, Old->getDebugLoc(),
254 TII.get(MSP430::SUB16ri), MSP430::SPW)
255 .addReg(MSP430::SPW).addImm(Amount);
257 assert(Old->getOpcode() == TII.getCallFrameDestroyOpcode());
258 // factor out the amount the callee already popped.
259 uint64_t CalleeAmt = Old->getOperand(1).getImm();
262 New = BuildMI(MF, Old->getDebugLoc(),
263 TII.get(MSP430::ADD16ri), MSP430::SPW)
264 .addReg(MSP430::SPW).addImm(Amount);
268 // The SRW implicit def is dead.
269 New->getOperand(3).setIsDead();
271 // Replace the pseudo instruction with a new instruction...
275 } else if (I->getOpcode() == TII.getCallFrameDestroyOpcode()) {
276 // If we are performing frame pointer elimination and if the callee pops
277 // something off the stack pointer, add it back.
278 if (uint64_t CalleeAmt = I->getOperand(1).getImm()) {
279 MachineInstr *Old = I;
281 BuildMI(MF, Old->getDebugLoc(), TII.get(MSP430::SUB16ri),
282 MSP430::SPW).addReg(MSP430::SPW).addImm(CalleeAmt);
283 // The SRW implicit def is dead.
284 New->getOperand(3).setIsDead();
294 MSP430FrameLowering::processFunctionBeforeFrameFinalized(MachineFunction &MF,
295 RegScavenger *) const {
296 // Create a frame entry for the FPW register that must be saved.
298 int FrameIdx = MF.getFrameInfo()->CreateFixedObject(2, -4, true);
300 assert(FrameIdx == MF.getFrameInfo()->getObjectIndexBegin() &&
301 "Slot for FPW register must be last in order to be found!");