lib/Target/IA64/IA64InstrInfo.h

   1 //===- IA64InstrInfo.h - IA64 Instruction Information ----------*- C++ -*- ===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the IA64 implementation of the TargetInstrInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef IA64INSTRUCTIONINFO_H
  15 #define IA64INSTRUCTIONINFO_H
  16
  17 #include "llvm/Target/TargetInstrInfo.h"
  18 #include "IA64RegisterInfo.h"
  19
  20 namespace llvm {
  21
  22 class IA64InstrInfo : public TargetInstrInfoImpl {
  23   const IA64RegisterInfo RI;
  24 public:
  25   IA64InstrInfo();
  26
  27   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
  28   /// such, whenever a client has an instance of instruction info, it should
  29   /// always be able to get register info as well (through this method).
  30   ///
  31   virtual const IA64RegisterInfo &getRegisterInfo() const { return RI; }
  32
  33   //
  34   // Return true if the instruction is a register to register move and
  35   // leave the source and dest operands in the passed parameters.
  36   //
  37   virtual bool isMoveInstr(const MachineInstr& MI,
  38                            unsigned& sourceReg,
  39                            unsigned& destReg) const;
  40   virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
  41                                 MachineBasicBlock *FBB,
  42                                 const std::vector<MachineOperand> &Cond) const;
  43   virtual void copyRegToReg(MachineBasicBlock &MBB,
  44                             MachineBasicBlock::iterator MI,
  45                             unsigned DestReg, unsigned SrcReg,
  46                             const TargetRegisterClass *DestRC,
  47                             const TargetRegisterClass *SrcRC) const;
  48   virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
  49                                    MachineBasicBlock::iterator MI,
  50                                    unsigned SrcReg, bool isKill, int FrameIndex,
  51                                    const TargetRegisterClass *RC) const;
  52
  53   virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
  54                               SmallVectorImpl<MachineOperand> &Addr,
  55                               const TargetRegisterClass *RC,
  56                               SmallVectorImpl<MachineInstr*> &NewMIs) const;
  57
  58   virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
  59                                     MachineBasicBlock::iterator MI,
  60                                     unsigned DestReg, int FrameIndex,
  61                                     const TargetRegisterClass *RC) const;
  62
  63   virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
  64                                SmallVectorImpl<MachineOperand> &Addr,
  65                                const TargetRegisterClass *RC,
  66                                SmallVectorImpl<MachineInstr*> &NewMIs) const;
  67 };
  68
  69 } // End llvm namespace
  70
  71 #endif
  72