1 //=- HexagonInstrInfoV3.td - Target Desc. for Hexagon Target -*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes the Hexagon V3 instructions in TableGen format.
12 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
17 //===----------------------------------------------------------------------===//
19 let isCall = 1, neverHasSideEffects = 1,
20 Defs = [D0, D1, D2, D3, D4, D5, D6, D7, R28, R31,
21 P0, P1, P2, P3, LC0, LC1, SA0, SA1] in {
22 def CALLv3 : JInst<(outs), (ins calltarget:$dst, variable_ops),
23 "call $dst", []>, Requires<[HasV3T]>;
26 //===----------------------------------------------------------------------===//
28 //===----------------------------------------------------------------------===//
31 //===----------------------------------------------------------------------===//
33 //===----------------------------------------------------------------------===//
34 // Call subroutine from register.
35 let isCall = 1, neverHasSideEffects = 1,
36 Defs = [D0, D1, D2, D3, D4, D5, D6, D7, R28, R31,
37 P0, P1, P2, P3, LC0, LC1, SA0, SA1] in {
38 def CALLRv3 : JRInst<(outs), (ins IntRegs:$dst, variable_ops),
40 []>, Requires<[HasV3TOnly]>;
44 // if(p?.new) jumpr:t r?
45 let isReturn = 1, isTerminator = 1, isBarrier = 1,
46 Defs = [PC], Uses = [R31] in {
47 def JMPR_cPnewt: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2),
48 "if ($src1.new) jumpr:t $src2",
49 []>, Requires<[HasV3T]>;
52 // if (!p?.new) jumpr:t r?
53 let isReturn = 1, isTerminator = 1, isBarrier = 1,
54 Defs = [PC], Uses = [R31] in {
55 def JMPR_cNotPnewt: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2),
56 "if (!$src1.new) jumpr:t $src2",
57 []>, Requires<[HasV3T]>;
61 // if(p?.new) jumpr:nt r?
62 let isReturn = 1, isTerminator = 1, isBarrier = 1,
63 Defs = [PC], Uses = [R31] in {
64 def JMPR_cPnewNt: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2),
65 "if ($src1.new) jumpr:nt $src2",
66 []>, Requires<[HasV3T]>;
69 // if (!p?.new) jumpr:nt r?
70 let isReturn = 1, isTerminator = 1, isBarrier = 1,
71 Defs = [PC], Uses = [R31] in {
72 def JMPR_cNotPnewNt: JRInst<(outs), (ins PredRegs:$src1, IntRegs:$src2),
73 "if (!$src1.new) jumpr:nt $src2",
74 []>, Requires<[HasV3T]>;
77 //===----------------------------------------------------------------------===//
79 //===----------------------------------------------------------------------===//
81 //===----------------------------------------------------------------------===//
83 //===----------------------------------------------------------------------===//
85 let AddedComplexity = 200 in
86 def MAXw_dd : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1,
88 "$dst = max($src2, $src1)",
89 [(set DoubleRegs:$dst, (select (i1 (setlt DoubleRegs:$src2,
95 let AddedComplexity = 200 in
96 def MINw_dd : ALU64_rr<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1,
98 "$dst = min($src2, $src1)",
99 [(set DoubleRegs:$dst, (select (i1 (setgt DoubleRegs:$src2,
102 DoubleRegs:$src2))]>,
105 //===----------------------------------------------------------------------===//
107 //===----------------------------------------------------------------------===//
112 //def : Pat <(brcond (i1 (seteq IntRegs:$src1, 0)), bb:$offset),
113 // (JMP_RegEzt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>;
115 //def : Pat <(brcond (i1 (setne IntRegs:$src1, 0)), bb:$offset),
116 // (JMP_RegNzt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>;
118 //def : Pat <(brcond (i1 (setle IntRegs:$src1, 0)), bb:$offset),
119 // (JMP_RegLezt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>;
121 //def : Pat <(brcond (i1 (setge IntRegs:$src1, 0)), bb:$offset),
122 // (JMP_RegGezt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>;
124 //def : Pat <(brcond (i1 (setgt IntRegs:$src1, -1)), bb:$offset),
125 // (JMP_RegGezt IntRegs:$src1, bb:$offset)>, Requires<[HasV3T]>;
128 // Map call instruction
129 def : Pat<(call IntRegs:$dst),
130 (CALLRv3 IntRegs:$dst)>, Requires<[HasV3T]>;
131 def : Pat<(call tglobaladdr:$dst),
132 (CALLv3 tglobaladdr:$dst)>, Requires<[HasV3T]>;
133 def : Pat<(call texternalsym:$dst),
134 (CALLv3 texternalsym:$dst)>, Requires<[HasV3T]>;