lib/Target/Alpha/AlphaTargetMachine.cpp

   1 //===-- AlphaTargetMachine.cpp - Define TargetMachine for Alpha -----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "Alpha.h"
  14 #include "AlphaJITInfo.h"
  15 #include "AlphaTargetAsmInfo.h"
  16 #include "AlphaTargetMachine.h"
  17 #include "llvm/Module.h"
  18 #include "llvm/PassManager.h"
  19 #include "llvm/Target/TargetMachineRegistry.h"
  20 #include "llvm/Support/FormattedStream.h"
  21
  22 using namespace llvm;
  23
  24 // Register the targets
  25 extern Target TheAlphaTarget;
  26 static RegisterTarget<AlphaTargetMachine> X(TheAlphaTarget, "alpha",
  27                                             "Alpha [experimental]");
  28
  29 // Force static initialization.
  30 extern "C" void LLVMInitializeAlphaTarget() { }
  31
  32 const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
  33   return new AlphaTargetAsmInfo(*this);
  34 }
  35
  36 AlphaTargetMachine::AlphaTargetMachine(const Target &T, const Module &M,
  37                                        const std::string &FS)
  38   : LLVMTargetMachine(T),
  39     DataLayout("e-f128:128:128"),
  40     FrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0),
  41     JITInfo(*this),
  42     Subtarget(M, FS),
  43     TLInfo(*this) {
  44   setRelocationModel(Reloc::PIC_);
  45 }
  46
  47
  48 //===----------------------------------------------------------------------===//
  49 // Pass Pipeline Configuration
  50 //===----------------------------------------------------------------------===//
  51
  52 bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM,
  53                                          CodeGenOpt::Level OptLevel) {
  54   PM.add(createAlphaISelDag(*this));
  55   return false;
  56 }
  57 bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM,
  58                                         CodeGenOpt::Level OptLevel) {
  59   // Must run branch selection immediately preceding the asm printer
  60   PM.add(createAlphaBranchSelectionPass());
  61   PM.add(createAlphaLLRPPass(*this));
  62   return false;
  63 }
  64 bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
  65                                             CodeGenOpt::Level OptLevel,
  66                                             bool Verbose,
  67                                             formatted_raw_ostream &Out) {
  68   FunctionPass *Printer = getTarget().createAsmPrinter(Out, *this, Verbose);
  69   if (!Printer)
  70     llvm_report_error("unable to create assembly printer");
  71   PM.add(Printer);
  72   return false;
  73 }
  74 bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
  75                                         CodeGenOpt::Level OptLevel,
  76                                         MachineCodeEmitter &MCE) {
  77   PM.add(createAlphaCodeEmitterPass(*this, MCE));
  78   return false;
  79 }
  80 bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
  81                                         CodeGenOpt::Level OptLevel,
  82                                         JITCodeEmitter &JCE) {
  83   PM.add(createAlphaJITCodeEmitterPass(*this, JCE));
  84   return false;
  85 }
  86 bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM,
  87                                         CodeGenOpt::Level OptLevel,
  88                                         ObjectCodeEmitter &OCE) {
  89   PM.add(createAlphaObjectCodeEmitterPass(*this, OCE));
  90   return false;
  91 }
  92 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
  93                                               CodeGenOpt::Level OptLevel,
  94                                               MachineCodeEmitter &MCE) {
  95   return addCodeEmitter(PM, OptLevel, MCE);
  96 }
  97 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
  98                                               CodeGenOpt::Level OptLevel,
  99                                               JITCodeEmitter &JCE) {
 100   return addCodeEmitter(PM, OptLevel, JCE);
 101 }
 102 bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 103                                               CodeGenOpt::Level OptLevel,
 104                                               ObjectCodeEmitter &OCE) {
 105   return addCodeEmitter(PM, OptLevel, OCE);
 106 }
 107