1 //===- AlphaRegisterInfo.cpp - Alpha Register Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Alpha implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "reginfo"
16 #include "AlphaRegisterInfo.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Type.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/ValueTypes.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineLocation.h"
25 #include "llvm/Target/TargetFrameInfo.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/Target/TargetOptions.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/Support/Debug.h"
30 #include "llvm/ADT/STLExtras.h"
36 static const int IMM_LOW = -32768;
37 static const int IMM_HIGH = 32767;
38 static const int IMM_MULT = 65536;
40 static long getUpper16(long l)
42 long y = l / IMM_MULT;
43 if (l % IMM_MULT > IMM_HIGH)
48 static long getLower16(long l)
50 long h = getUpper16(l);
51 return l - h * IMM_MULT;
54 AlphaRegisterInfo::AlphaRegisterInfo(const TargetInstrInfo &tii)
55 : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP),
61 AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
62 MachineBasicBlock::iterator MI,
63 unsigned SrcReg, int FrameIdx,
64 const TargetRegisterClass *RC) const {
65 //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to "
66 //<< FrameIdx << "\n";
67 //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg);
68 if (RC == Alpha::F4RCRegisterClass)
69 BuildMI(MBB, MI, Alpha::STS, 3)
70 .addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
71 else if (RC == Alpha::F8RCRegisterClass)
72 BuildMI(MBB, MI, Alpha::STT, 3)
73 .addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
74 else if (RC == Alpha::GPRCRegisterClass)
75 BuildMI(MBB, MI, Alpha::STQ, 3)
76 .addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
82 AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
83 MachineBasicBlock::iterator MI,
84 unsigned DestReg, int FrameIdx,
85 const TargetRegisterClass *RC) const {
86 //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to "
87 //<< FrameIdx << "\n";
88 if (RC == Alpha::F4RCRegisterClass)
89 BuildMI(MBB, MI, Alpha::LDS, 2, DestReg)
90 .addFrameIndex(FrameIdx).addReg(Alpha::F31);
91 else if (RC == Alpha::F8RCRegisterClass)
92 BuildMI(MBB, MI, Alpha::LDT, 2, DestReg)
93 .addFrameIndex(FrameIdx).addReg(Alpha::F31);
94 else if (RC == Alpha::GPRCRegisterClass)
95 BuildMI(MBB, MI, Alpha::LDQ, 2, DestReg)
96 .addFrameIndex(FrameIdx).addReg(Alpha::F31);
101 MachineInstr *AlphaRegisterInfo::foldMemoryOperand(MachineInstr *MI,
103 int FrameIndex) const {
104 // Make sure this is a reg-reg copy.
105 unsigned Opc = MI->getOpcode();
113 if (MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
114 if (OpNum == 0) { // move -> store
115 unsigned InReg = MI->getOperand(1).getReg();
116 Opc = (Opc == Alpha::BISr) ? Alpha::STQ :
117 ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT);
118 return BuildMI(TII, Opc, 3).addReg(InReg).addFrameIndex(FrameIndex)
120 } else { // load -> move
121 unsigned OutReg = MI->getOperand(0).getReg();
122 Opc = (Opc == Alpha::BISr) ? Alpha::LDQ :
123 ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT);
124 return BuildMI(TII, Opc, 2, OutReg).addFrameIndex(FrameIndex)
134 void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
135 MachineBasicBlock::iterator MI,
136 unsigned DestReg, unsigned SrcReg,
137 const TargetRegisterClass *RC) const {
138 // std::cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
139 if (RC == Alpha::GPRCRegisterClass) {
140 BuildMI(MBB, MI, Alpha::BISr, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
141 } else if (RC == Alpha::F4RCRegisterClass) {
142 BuildMI(MBB, MI, Alpha::CPYSS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
143 } else if (RC == Alpha::F8RCRegisterClass) {
144 BuildMI(MBB, MI, Alpha::CPYST, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
146 std::cerr << "Attempt to copy register that is not GPR or FPR";
151 const unsigned* AlphaRegisterInfo::getCalleeSaveRegs() const {
152 static const unsigned CalleeSaveRegs[] = {
153 Alpha::R9, Alpha::R10,
154 Alpha::R11, Alpha::R12,
155 Alpha::R13, Alpha::R14,
156 Alpha::F2, Alpha::F3,
157 Alpha::F4, Alpha::F5,
158 Alpha::F6, Alpha::F7,
159 Alpha::F8, Alpha::F9, 0
161 return CalleeSaveRegs;
164 const TargetRegisterClass* const*
165 AlphaRegisterInfo::getCalleeSaveRegClasses() const {
166 static const TargetRegisterClass * const CalleeSaveRegClasses[] = {
167 &Alpha::GPRCRegClass, &Alpha::GPRCRegClass,
168 &Alpha::GPRCRegClass, &Alpha::GPRCRegClass,
169 &Alpha::GPRCRegClass, &Alpha::GPRCRegClass,
170 &Alpha::F8RCRegClass, &Alpha::F8RCRegClass,
171 &Alpha::F8RCRegClass, &Alpha::F8RCRegClass,
172 &Alpha::F8RCRegClass, &Alpha::F8RCRegClass,
173 &Alpha::F8RCRegClass, &Alpha::F8RCRegClass, 0
175 return CalleeSaveRegClasses;
178 //===----------------------------------------------------------------------===//
179 // Stack Frame Processing methods
180 //===----------------------------------------------------------------------===//
182 // hasFP - Return true if the specified function should have a dedicated frame
183 // pointer register. This is true if the function has variable sized allocas or
184 // if frame pointer elimination is disabled.
186 static bool hasFP(const MachineFunction &MF) {
187 MachineFrameInfo *MFI = MF.getFrameInfo();
188 return MFI->hasVarSizedObjects();
191 void AlphaRegisterInfo::
192 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
193 MachineBasicBlock::iterator I) const {
195 // If we have a frame pointer, turn the adjcallstackup instruction into a
196 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
198 MachineInstr *Old = I;
199 uint64_t Amount = Old->getOperand(0).getImmedValue();
201 // We need to keep the stack aligned properly. To do this, we round the
202 // amount of space needed for the outgoing arguments up to the next
203 // alignment boundary.
204 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
205 Amount = (Amount+Align-1)/Align*Align;
208 if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
209 New=BuildMI(TII, Alpha::LDA, 2, Alpha::R30)
210 .addImm(-Amount).addReg(Alpha::R30);
212 assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
213 New=BuildMI(TII, Alpha::LDA, 2, Alpha::R30)
214 .addImm(Amount).addReg(Alpha::R30);
217 // Replace the pseudo instruction with a new instruction...
225 //Alpha has a slightly funny stack:
228 //fixed locals (and spills, callee saved, etc)
234 AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
236 MachineInstr &MI = *II;
237 MachineBasicBlock &MBB = *MI.getParent();
238 MachineFunction &MF = *MBB.getParent();
241 while (!MI.getOperand(i).isFrameIndex()) {
243 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
246 int FrameIndex = MI.getOperand(i).getFrameIndex();
248 // Add the base register of R30 (SP) or R15 (FP).
249 MI.getOperand(i + 1).ChangeToRegister(FP ? Alpha::R15 : Alpha::R30, false);
251 // Now add the frame object offset to the offset from the virtual frame index.
252 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
254 DEBUG(std::cerr << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
256 Offset += MF.getFrameInfo()->getStackSize();
258 DEBUG(std::cerr << "Corrected Offset " << Offset <<
259 " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
261 if (Offset > IMM_HIGH || Offset < IMM_LOW) {
262 DEBUG(std::cerr << "Unconditionally using R28 for evil purposes Offset: "
264 //so in this case, we need to use a temporary register, and move the
265 //original inst off the SP/FP
267 MI.getOperand(i + 1).ChangeToRegister(Alpha::R28, false);
268 MI.getOperand(i).ChangeToImmediate(getLower16(Offset));
270 MachineInstr* nMI=BuildMI(TII, Alpha::LDAH, 2, Alpha::R28)
271 .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
274 MI.getOperand(i).ChangeToImmediate(Offset);
279 void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
280 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
281 MachineBasicBlock::iterator MBBI = MBB.begin();
282 MachineFrameInfo *MFI = MF.getFrameInfo();
285 static int curgpdist = 0;
288 BuildMI(MBB, MBBI, Alpha::LDAHg, 3, Alpha::R29)
289 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
290 .addReg(Alpha::R27).addImm(++curgpdist);
291 BuildMI(MBB, MBBI, Alpha::LDAg, 3, Alpha::R29)
292 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
293 .addReg(Alpha::R29).addImm(curgpdist);
295 //evil const_cast until MO stuff setup to handle const
296 BuildMI(MBB, MBBI, Alpha::ALTENT, 1)
297 .addGlobalAddress(const_cast<Function*>(MF.getFunction()));
299 // Get the number of bytes to allocate from the FrameInfo
300 long NumBytes = MFI->getStackSize();
302 if (MFI->hasCalls() && !FP) {
303 // We reserve argument space for call sites in the function immediately on
304 // entry to the current function. This eliminates the need for add/sub
305 // brackets around call sites.
306 //If there is a frame pointer, then we don't do this
307 NumBytes += MFI->getMaxCallFrameSize();
308 DEBUG(std::cerr << "Added " << MFI->getMaxCallFrameSize()
309 << " to the stack due to calls\n");
313 NumBytes += 8; //reserve space for the old FP
315 // Do we need to allocate space on the stack?
316 if (NumBytes == 0) return;
318 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
319 NumBytes = (NumBytes+Align-1)/Align*Align;
321 // Update frame info to pretend that this is part of the stack...
322 MFI->setStackSize(NumBytes);
324 // adjust stack pointer: r30 -= numbytes
325 NumBytes = -NumBytes;
326 if (NumBytes >= IMM_LOW) {
327 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
329 } else if (getUpper16(NumBytes) >= IMM_LOW) {
330 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30).addImm(getUpper16(NumBytes))
332 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(getLower16(NumBytes))
335 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
339 //now if we need to, save the old FP and set the new
342 BuildMI(MBB, MBBI, Alpha::STQ, 3)
343 .addReg(Alpha::R15).addImm(0).addReg(Alpha::R30);
344 //this must be the last instr in the prolog
345 BuildMI(MBB, MBBI, Alpha::BISr, 2, Alpha::R15)
346 .addReg(Alpha::R30).addReg(Alpha::R30);
351 void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
352 MachineBasicBlock &MBB) const {
353 const MachineFrameInfo *MFI = MF.getFrameInfo();
354 MachineBasicBlock::iterator MBBI = prior(MBB.end());
355 assert(MBBI->getOpcode() == Alpha::RETDAG ||
356 MBBI->getOpcode() == Alpha::RETDAGp
357 && "Can only insert epilog into returning blocks");
361 // Get the number of bytes allocated from the FrameInfo...
362 long NumBytes = MFI->getStackSize();
364 //now if we need to, restore the old FP
367 //copy the FP into the SP (discards allocas)
368 BuildMI(MBB, MBBI, Alpha::BISr, 2, Alpha::R30).addReg(Alpha::R15)
371 BuildMI(MBB, MBBI, Alpha::LDQ, 2, Alpha::R15).addImm(0).addReg(Alpha::R15);
376 if (NumBytes <= IMM_HIGH) {
377 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
379 } else if (getUpper16(NumBytes) <= IMM_HIGH) {
380 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30)
381 .addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
382 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30)
383 .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
385 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
391 unsigned AlphaRegisterInfo::getRARegister() const {
392 assert(0 && "What is the return address register");
396 unsigned AlphaRegisterInfo::getFrameRegister(MachineFunction &MF) const {
397 return hasFP(MF) ? Alpha::R15 : Alpha::R30;
400 #include "AlphaGenRegisterInfo.inc"
402 std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
404 std::string s(RegisterDescriptors[reg].Name);