1 //===- AlphaRegisterInfo.cpp - Alpha Register Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Alpha implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "reginfo"
16 #include "AlphaRegisterInfo.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Type.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/ValueTypes.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/Target/TargetFrameInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetOptions.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/ADT/STLExtras.h"
35 extern cl::opt<bool> EnableAlphaLSMark;
39 static const int IMM_LOW = -32768;
40 static const int IMM_HIGH = 32767;
41 static const int IMM_MULT = 65536;
43 static long getUpper16(long l)
45 long y = l / IMM_MULT;
46 if (l % IMM_MULT > IMM_HIGH)
51 static long getLower16(long l)
53 long h = getUpper16(l);
54 return l - h * IMM_MULT;
63 AlphaRegisterInfo::AlphaRegisterInfo()
64 : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP)
68 static const TargetRegisterClass *getClass(unsigned SrcReg) {
69 if (Alpha::FPRCRegisterClass->contains(SrcReg))
70 return Alpha::FPRCRegisterClass;
71 assert(Alpha::GPRCRegisterClass->contains(SrcReg) && "Reg not FPR or GPR");
72 return Alpha::GPRCRegisterClass;
76 AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
77 MachineBasicBlock::iterator MI,
78 unsigned SrcReg, int FrameIdx,
79 const TargetRegisterClass *RC) const {
80 //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n";
81 //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg);
82 if (EnableAlphaLSMark)
83 BuildMI(MBB, MI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(1)
85 if (getClass(SrcReg) == Alpha::FPRCRegisterClass)
86 BuildMI(MBB, MI, Alpha::STT, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
87 else if (getClass(SrcReg) == Alpha::GPRCRegisterClass)
88 BuildMI(MBB, MI, Alpha::STQ, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
94 AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
95 MachineBasicBlock::iterator MI,
96 unsigned DestReg, int FrameIdx,
97 const TargetRegisterClass *RC) const {
98 //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n";
99 if (EnableAlphaLSMark)
100 BuildMI(MBB, MI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(2)
102 if (getClass(DestReg) == Alpha::FPRCRegisterClass)
103 BuildMI(MBB, MI, Alpha::LDT, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
104 else if (getClass(DestReg) == Alpha::GPRCRegisterClass)
105 BuildMI(MBB, MI, Alpha::LDQ, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
111 AlphaRegisterInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const
113 switch (MI->getOpcode()) {
120 if (MI->getOperand(1).isFrameIndex()) {
121 FrameIndex = MI->getOperand(1).getFrameIndex();
122 return MI->getOperand(0).getReg();
129 void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
130 MachineBasicBlock::iterator MI,
131 unsigned DestReg, unsigned SrcReg,
132 const TargetRegisterClass *RC) const {
133 // std::cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
134 if (RC == Alpha::GPRCRegisterClass) {
135 BuildMI(MBB, MI, Alpha::BIS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
136 } else if (RC == Alpha::FPRCRegisterClass) {
137 BuildMI(MBB, MI, Alpha::CPYS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
139 std::cerr << "Attempt to copy register that is not GPR or FPR";
144 //===----------------------------------------------------------------------===//
145 // Stack Frame Processing methods
146 //===----------------------------------------------------------------------===//
148 // hasFP - Return true if the specified function should have a dedicated frame
149 // pointer register. This is true if the function has variable sized allocas or
150 // if frame pointer elimination is disabled.
152 static bool hasFP(MachineFunction &MF) {
153 MachineFrameInfo *MFI = MF.getFrameInfo();
154 return MFI->hasVarSizedObjects();
157 void AlphaRegisterInfo::
158 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
159 MachineBasicBlock::iterator I) const {
161 // If we have a frame pointer, turn the adjcallstackup instruction into a
162 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
164 MachineInstr *Old = I;
165 unsigned Amount = Old->getOperand(0).getImmedValue();
167 // We need to keep the stack aligned properly. To do this, we round the
168 // amount of space needed for the outgoing arguments up to the next
169 // alignment boundary.
170 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
171 Amount = (Amount+Align-1)/Align*Align;
174 if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
175 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
176 .addImm(-Amount).addReg(Alpha::R30);
178 assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
179 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
180 .addImm(Amount).addReg(Alpha::R30);
183 // Replace the pseudo instruction with a new instruction...
191 //Alpha has a slightly funny stack:
194 //fixed locals (and spills, callee saved, etc)
200 AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
202 MachineInstr &MI = *II;
203 MachineBasicBlock &MBB = *MI.getParent();
204 MachineFunction &MF = *MBB.getParent();
207 while (!MI.getOperand(i).isFrameIndex()) {
209 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
212 int FrameIndex = MI.getOperand(i).getFrameIndex();
214 // Add the base register of R30 (SP) or R15 (FP).
215 MI.SetMachineOperandReg(i + 1, FP ? Alpha::R15 : Alpha::R30);
217 // Now add the frame object offset to the offset from the virtual frame index.
218 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
220 DEBUG(std::cerr << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
222 Offset += MF.getFrameInfo()->getStackSize();
224 DEBUG(std::cerr << "Corrected Offset " << Offset <<
225 " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
227 if (Offset > IMM_HIGH || Offset < IMM_LOW) {
228 //so in this case, we need to use a temporary register, and move the original
231 MI.SetMachineOperandReg(i + 1, Alpha::R28);
232 MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed,
235 MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28)
236 .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
239 MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset);
244 void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
245 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
246 MachineBasicBlock::iterator MBBI = MBB.begin();
247 MachineFrameInfo *MFI = MF.getFrameInfo();
250 static int curgpdist = 0;
253 BuildMI(MBB, MBBI, Alpha::LDAHg, 3, Alpha::R29)
254 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
255 .addReg(Alpha::R27).addImm(++curgpdist);
256 BuildMI(MBB, MBBI, Alpha::LDAg, 3, Alpha::R29)
257 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
258 .addReg(Alpha::R29).addImm(curgpdist);
260 //evil const_cast until MO stuff setup to handle const
261 BuildMI(MBB, MBBI, Alpha::ALTENT, 1).addGlobalAddress(const_cast<Function*>(MF.getFunction()), true);
263 // Get the number of bytes to allocate from the FrameInfo
264 long NumBytes = MFI->getStackSize();
266 if (MFI->hasCalls() && !FP) {
267 // We reserve argument space for call sites in the function immediately on
268 // entry to the current function. This eliminates the need for add/sub
269 // brackets around call sites.
270 //If there is a frame pointer, then we don't do this
271 NumBytes += MFI->getMaxCallFrameSize();
272 DEBUG(std::cerr << "Added " << MFI->getMaxCallFrameSize()
273 << " to the stack due to calls\n");
277 NumBytes += 8; //reserve space for the old FP
279 // Do we need to allocate space on the stack?
280 if (NumBytes == 0) return;
282 // Update frame info to pretend that this is part of the stack...
283 MFI->setStackSize(NumBytes);
285 // adjust stack pointer: r30 -= numbytes
286 NumBytes = -NumBytes;
287 if (NumBytes >= IMM_LOW) {
288 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
290 } else if (getUpper16(NumBytes) >= IMM_LOW) {
291 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30).addImm(getUpper16(NumBytes))
293 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(getLower16(NumBytes))
296 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
300 //now if we need to, save the old FP and set the new
303 if (EnableAlphaLSMark)
304 BuildMI(MBB, MBBI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(1)
306 BuildMI(MBB, MBBI, Alpha::STQ, 3).addReg(Alpha::R15).addImm(0).addReg(Alpha::R30);
307 //this must be the last instr in the prolog
308 BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R15).addReg(Alpha::R30).addReg(Alpha::R30);
313 void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
314 MachineBasicBlock &MBB) const {
315 const MachineFrameInfo *MFI = MF.getFrameInfo();
316 MachineBasicBlock::iterator MBBI = prior(MBB.end());
317 assert(((MBBI->getOpcode() == Alpha::RET) || (MBBI->getOpcode() == Alpha::RETDAG))
318 && "Can only insert epilog into returning blocks");
322 // Get the number of bytes allocated from the FrameInfo...
323 long NumBytes = MFI->getStackSize();
325 //now if we need to, restore the old FP
328 //copy the FP into the SP (discards allocas)
329 BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R30).addReg(Alpha::R15)
332 if (EnableAlphaLSMark)
333 BuildMI(MBB, MBBI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(2)
335 BuildMI(MBB, MBBI, Alpha::LDQ, 2, Alpha::R15).addImm(0).addReg(Alpha::R15);
340 if (NumBytes <= IMM_HIGH) {
341 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
343 } else if (getUpper16(NumBytes) <= IMM_HIGH) {
344 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30)
345 .addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
346 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30)
347 .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
349 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
355 #include "AlphaGenRegisterInfo.inc"
357 std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
359 std::string s(RegisterDescriptors[reg].Name);