1 //===-- ARM64MCTargetDesc.h - ARM64 Target Descriptions ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides ARM64 specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARM64MCTARGETDESC_H
15 #define ARM64MCTARGETDESC_H
17 #include "llvm/Support/DataTypes.h"
27 class MCSubtargetInfo;
32 extern Target TheARM64leTarget;
33 extern Target TheARM64beTarget;
35 MCCodeEmitter *createARM64MCCodeEmitter(const MCInstrInfo &MCII,
36 const MCRegisterInfo &MRI,
37 const MCSubtargetInfo &STI,
39 MCAsmBackend *createARM64leAsmBackend(const Target &T, const MCRegisterInfo &MRI,
40 StringRef TT, StringRef CPU);
41 MCAsmBackend *createARM64beAsmBackend(const Target &T, const MCRegisterInfo &MRI,
42 StringRef TT, StringRef CPU);
44 MCObjectWriter *createARM64ELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
47 MCObjectWriter *createARM64MachObjectWriter(raw_ostream &OS, uint32_t CPUType,
50 } // End llvm namespace
52 // Defines symbolic names for ARM64 registers. This defines a mapping from
53 // register name to register number.
55 #define GET_REGINFO_ENUM
56 #include "ARM64GenRegisterInfo.inc"
58 // Defines symbolic names for the ARM64 instructions.
60 #define GET_INSTRINFO_ENUM
61 #include "ARM64GenInstrInfo.inc"
63 #define GET_SUBTARGETINFO_ENUM
64 #include "ARM64GenSubtargetInfo.inc"