lib/Target/ARM/Thumb1RegisterInfo.h

   1 //===- Thumb1RegisterInfo.h - Thumb-1 Register Information Impl ----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the Thumb-1 implementation of the TargetRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef THUMB1REGISTERINFO_H
  15 #define THUMB1REGISTERINFO_H
  16
  17 #include "ARM.h"
  18 #include "ARMRegisterInfo.h"
  19 #include "llvm/Target/TargetRegisterInfo.h"
  20
  21 namespace llvm {
  22   class ARMSubtarget;
  23   class ARMBaseInstrInfo;
  24   class Type;
  25
  26 struct Thumb1RegisterInfo : public ARMBaseRegisterInfo {
  27 public:
  28   Thumb1RegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &STI);
  29
  30   /// emitLoadConstPool - Emits a load from constpool to materialize the
  31   /// specified immediate.
  32  void emitLoadConstPool(MachineBasicBlock &MBB,
  33                         MachineBasicBlock::iterator &MBBI,
  34                         DebugLoc dl,
  35                         unsigned DestReg, unsigned SubIdx, int Val,
  36                         ARMCC::CondCodes Pred = ARMCC::AL,
  37                         unsigned PredReg = 0) const;
  38
  39   /// Code Generation virtual methods...
  40   const TargetRegisterClass *
  41     getPhysicalRegisterRegClass(unsigned Reg, EVT VT = MVT::Other) const;
  42
  43   bool requiresRegisterScavenging(const MachineFunction &MF) const;
  44
  45   bool hasReservedCallFrame(MachineFunction &MF) const;
  46
  47   void eliminateCallFramePseudoInstr(MachineFunction &MF,
  48                                      MachineBasicBlock &MBB,
  49                                      MachineBasicBlock::iterator I) const;
  50
  51   // rewrite MI to access 'Offset' bytes from the FP. Return the offset that
  52   // could not be handled directly in MI.
  53   int rewriteFrameIndex(MachineInstr &MI, unsigned FrameRegIdx,
  54                         unsigned FrameReg, int Offset,
  55                         unsigned MOVOpc, unsigned ADDriOpc, unsigned SUBriOpc) const;
  56
  57   bool saveScavengerRegister(MachineBasicBlock &MBB,
  58                              MachineBasicBlock::iterator I,
  59                              const TargetRegisterClass *RC,
  60                              unsigned Reg) const;
  61   void restoreScavengerRegister(MachineBasicBlock &MBB,
  62                                 MachineBasicBlock::iterator I,
  63                                 const TargetRegisterClass *RC,
  64                                 unsigned Reg) const;
  65   void eliminateFrameIndex(MachineBasicBlock::iterator II,
  66                            int SPAdj, RegScavenger *RS = NULL) const;
  67
  68   void emitPrologue(MachineFunction &MF) const;
  69   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
  70 };
  71 }
  72
  73 #endif // THUMB1REGISTERINFO_H