1 //===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the ARM specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARMTARGETMACHINE_H
15 #define ARMTARGETMACHINE_H
17 #include "llvm/Target/TargetMachine.h"
18 #include "llvm/Target/TargetData.h"
19 #include "ARMInstrInfo.h"
20 #include "ARMFrameInfo.h"
21 #include "ARMJITInfo.h"
22 #include "ARMSubtarget.h"
23 #include "ARMISelLowering.h"
24 #include "Thumb1InstrInfo.h"
25 #include "Thumb2InstrInfo.h"
31 class ARMBaseTargetMachine : public LLVMTargetMachine {
33 ARMSubtarget Subtarget;
36 ARMFrameInfo FrameInfo;
38 InstrItineraryData InstrItins;
39 Reloc::Model DefRelocModel; // Reloc model before it's overridden.
42 ARMBaseTargetMachine(const Target &T, const Module &M, const std::string &FS,
45 virtual const ARMFrameInfo *getFrameInfo() const { return &FrameInfo; }
46 virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
47 virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
48 virtual const InstrItineraryData getInstrItineraryData() const {
52 virtual const TargetAsmInfo *createTargetAsmInfo() const;
54 // Pass Pipeline Configuration
55 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
56 virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
57 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
58 virtual bool addAssemblyEmitter(PassManagerBase &PM,
59 CodeGenOpt::Level OptLevel,
60 bool Verbose, formatted_raw_ostream &Out);
61 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
62 bool DumpAsm, MachineCodeEmitter &MCE);
63 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
64 bool DumpAsm, JITCodeEmitter &MCE);
65 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
66 bool DumpAsm, ObjectCodeEmitter &OCE);
67 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
68 CodeGenOpt::Level OptLevel,
70 MachineCodeEmitter &MCE);
71 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
72 CodeGenOpt::Level OptLevel,
75 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
76 CodeGenOpt::Level OptLevel,
78 ObjectCodeEmitter &OCE);
81 /// ARMTargetMachine - ARM target machine.
83 class ARMTargetMachine : public ARMBaseTargetMachine {
84 ARMInstrInfo InstrInfo;
85 const TargetData DataLayout; // Calculates type size & alignment
86 ARMTargetLowering TLInfo;
88 ARMTargetMachine(const Target &T, const Module &M, const std::string &FS);
90 virtual const ARMRegisterInfo *getRegisterInfo() const {
91 return &InstrInfo.getRegisterInfo();
94 virtual ARMTargetLowering *getTargetLowering() const {
95 return const_cast<ARMTargetLowering*>(&TLInfo);
98 virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; }
99 virtual const TargetData *getTargetData() const { return &DataLayout; }
101 static unsigned getJITMatchQuality();
102 static unsigned getModuleMatchQuality(const Module &M);
105 /// ThumbTargetMachine - Thumb target machine.
106 /// Due to the way architectures are handled, this represents both
107 /// Thumb-1 and Thumb-2.
109 class ThumbTargetMachine : public ARMBaseTargetMachine {
110 ARMBaseInstrInfo *InstrInfo; // either Thumb1InstrInfo or Thumb2InstrInfo
111 const TargetData DataLayout; // Calculates type size & alignment
112 ARMTargetLowering TLInfo;
114 ThumbTargetMachine(const Target &T, const Module &M, const std::string &FS);
116 /// returns either Thumb1RegisterInfo of Thumb2RegisterInfo
117 virtual const ARMBaseRegisterInfo *getRegisterInfo() const {
118 return &InstrInfo->getRegisterInfo();
121 virtual ARMTargetLowering *getTargetLowering() const {
122 return const_cast<ARMTargetLowering*>(&TLInfo);
125 /// returns either Thumb1InstrInfo or Thumb2InstrInfo
126 virtual const ARMBaseInstrInfo *getInstrInfo() const { return InstrInfo; }
127 virtual const TargetData *getTargetData() const { return &DataLayout; }
129 static unsigned getJITMatchQuality();
130 static unsigned getModuleMatchQuality(const Module &M);
133 } // end namespace llvm