1 //===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the ARM specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARMTARGETMACHINE_H
15 #define ARMTARGETMACHINE_H
17 #include "ARMFrameLowering.h"
18 #include "ARMISelLowering.h"
19 #include "ARMInstrInfo.h"
20 #include "ARMJITInfo.h"
21 #include "ARMSelectionDAGInfo.h"
22 #include "ARMSubtarget.h"
23 #include "Thumb1FrameLowering.h"
24 #include "Thumb1InstrInfo.h"
25 #include "Thumb2InstrInfo.h"
26 #include "llvm/ADT/OwningPtr.h"
27 #include "llvm/IR/DataLayout.h"
28 #include "llvm/MC/MCStreamer.h"
29 #include "llvm/Target/TargetMachine.h"
33 class ARMBaseTargetMachine : public LLVMTargetMachine {
35 ARMSubtarget Subtarget;
38 InstrItineraryData InstrItins;
41 ARMBaseTargetMachine(const Target &T, StringRef TT,
42 StringRef CPU, StringRef FS,
43 const TargetOptions &Options,
44 Reloc::Model RM, CodeModel::Model CM,
45 CodeGenOpt::Level OL);
47 virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
48 virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
49 virtual const InstrItineraryData *getInstrItineraryData() const {
53 /// \brief Register X86 analysis passes with a pass manager.
54 virtual void addAnalysisPasses(PassManagerBase &PM);
56 // Pass Pipeline Configuration
57 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
59 virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &MCE);
62 /// ARMTargetMachine - ARM target machine.
64 class ARMTargetMachine : public ARMBaseTargetMachine {
65 virtual void anchor();
66 ARMInstrInfo InstrInfo;
67 const DataLayout DL; // Calculates type size & alignment
68 ARMTargetLowering TLInfo;
69 ARMSelectionDAGInfo TSInfo;
70 ARMFrameLowering FrameLowering;
72 ARMTargetMachine(const Target &T, StringRef TT,
73 StringRef CPU, StringRef FS,
74 const TargetOptions &Options,
75 Reloc::Model RM, CodeModel::Model CM,
76 CodeGenOpt::Level OL);
78 virtual const ARMRegisterInfo *getRegisterInfo() const {
79 return &InstrInfo.getRegisterInfo();
82 virtual const ARMTargetLowering *getTargetLowering() const {
86 virtual const ARMSelectionDAGInfo* getSelectionDAGInfo() const {
89 virtual const ARMFrameLowering *getFrameLowering() const {
90 return &FrameLowering;
92 virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; }
93 virtual const DataLayout *getDataLayout() const { return &DL; }
96 /// ThumbTargetMachine - Thumb target machine.
97 /// Due to the way architectures are handled, this represents both
98 /// Thumb-1 and Thumb-2.
100 class ThumbTargetMachine : public ARMBaseTargetMachine {
101 virtual void anchor();
102 // Either Thumb1InstrInfo or Thumb2InstrInfo.
103 OwningPtr<ARMBaseInstrInfo> InstrInfo;
104 const DataLayout DL; // Calculates type size & alignment
105 ARMTargetLowering TLInfo;
106 ARMSelectionDAGInfo TSInfo;
107 // Either Thumb1FrameLowering or ARMFrameLowering.
108 OwningPtr<ARMFrameLowering> FrameLowering;
110 ThumbTargetMachine(const Target &T, StringRef TT,
111 StringRef CPU, StringRef FS,
112 const TargetOptions &Options,
113 Reloc::Model RM, CodeModel::Model CM,
114 CodeGenOpt::Level OL);
116 /// returns either Thumb1RegisterInfo or Thumb2RegisterInfo
117 virtual const ARMBaseRegisterInfo *getRegisterInfo() const {
118 return &InstrInfo->getRegisterInfo();
121 virtual const ARMTargetLowering *getTargetLowering() const {
125 virtual const ARMSelectionDAGInfo *getSelectionDAGInfo() const {
129 /// returns either Thumb1InstrInfo or Thumb2InstrInfo
130 virtual const ARMBaseInstrInfo *getInstrInfo() const {
131 return InstrInfo.get();
133 /// returns either Thumb1FrameLowering or ARMFrameLowering
134 virtual const ARMFrameLowering *getFrameLowering() const {
135 return FrameLowering.get();
137 virtual const DataLayout *getDataLayout() const { return &DL; }
140 } // end namespace llvm