1 //===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the ARM specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARMTARGETMACHINE_H
15 #define ARMTARGETMACHINE_H
17 #include "llvm/Target/TargetMachine.h"
18 #include "llvm/Target/TargetData.h"
19 #include "ARMInstrInfo.h"
20 #include "ARMFrameInfo.h"
21 #include "ARMJITInfo.h"
22 #include "ARMSubtarget.h"
23 #include "ARMISelLowering.h"
24 #include "Thumb1InstrInfo.h"
25 #include "Thumb2InstrInfo.h"
31 class ARMBaseTargetMachine : public LLVMTargetMachine {
33 ARMSubtarget Subtarget;
36 ARMFrameInfo FrameInfo;
38 InstrItineraryData InstrItins;
39 Reloc::Model DefRelocModel; // Reloc model before it's overridden.
42 // To avoid having target depend on the asmprinter stuff libraries, asmprinter
43 // set this functions to ctor pointer at startup time if they are linked in.
44 typedef FunctionPass *(*AsmPrinterCtorFn)(formatted_raw_ostream &o,
47 static AsmPrinterCtorFn AsmPrinterCtor;
50 ARMBaseTargetMachine(const Target &T, const Module &M, const std::string &FS,
53 virtual const ARMFrameInfo *getFrameInfo() const { return &FrameInfo; }
54 virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
55 virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
56 virtual const InstrItineraryData getInstrItineraryData() const {
60 static void registerAsmPrinter(AsmPrinterCtorFn F) {
64 virtual const TargetAsmInfo *createTargetAsmInfo() const;
66 // Pass Pipeline Configuration
67 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
68 virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
69 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
70 virtual bool addAssemblyEmitter(PassManagerBase &PM,
71 CodeGenOpt::Level OptLevel,
72 bool Verbose, formatted_raw_ostream &Out);
73 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
74 bool DumpAsm, MachineCodeEmitter &MCE);
75 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
76 bool DumpAsm, JITCodeEmitter &MCE);
77 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
78 bool DumpAsm, ObjectCodeEmitter &OCE);
79 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
80 CodeGenOpt::Level OptLevel,
82 MachineCodeEmitter &MCE);
83 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
84 CodeGenOpt::Level OptLevel,
87 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
88 CodeGenOpt::Level OptLevel,
90 ObjectCodeEmitter &OCE);
93 /// ARMTargetMachine - ARM target machine.
95 class ARMTargetMachine : public ARMBaseTargetMachine {
96 ARMInstrInfo InstrInfo;
97 const TargetData DataLayout; // Calculates type size & alignment
98 ARMTargetLowering TLInfo;
100 ARMTargetMachine(const Target &T, const Module &M, const std::string &FS);
102 virtual const ARMRegisterInfo *getRegisterInfo() const {
103 return &InstrInfo.getRegisterInfo();
106 virtual ARMTargetLowering *getTargetLowering() const {
107 return const_cast<ARMTargetLowering*>(&TLInfo);
110 virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; }
111 virtual const TargetData *getTargetData() const { return &DataLayout; }
113 static unsigned getJITMatchQuality();
114 static unsigned getModuleMatchQuality(const Module &M);
117 /// ThumbTargetMachine - Thumb target machine.
118 /// Due to the way architectures are handled, this represents both
119 /// Thumb-1 and Thumb-2.
121 class ThumbTargetMachine : public ARMBaseTargetMachine {
122 ARMBaseInstrInfo *InstrInfo; // either Thumb1InstrInfo or Thumb2InstrInfo
123 const TargetData DataLayout; // Calculates type size & alignment
124 ARMTargetLowering TLInfo;
126 ThumbTargetMachine(const Target &T, const Module &M, const std::string &FS);
128 /// returns either Thumb1RegisterInfo of Thumb2RegisterInfo
129 virtual const ARMBaseRegisterInfo *getRegisterInfo() const {
130 return &InstrInfo->getRegisterInfo();
133 virtual ARMTargetLowering *getTargetLowering() const {
134 return const_cast<ARMTargetLowering*>(&TLInfo);
137 /// returns either Thumb1InstrInfo or Thumb2InstrInfo
138 virtual const ARMBaseInstrInfo *getInstrInfo() const { return InstrInfo; }
139 virtual const TargetData *getTargetData() const { return &DataLayout; }
141 static unsigned getJITMatchQuality();
142 static unsigned getModuleMatchQuality(const Module &M);
145 } // end namespace llvm