1 //====- ARMMachineFuctionInfo.h - ARM machine function info -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares ARM-specific per-machine-function information.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARMMACHINEFUNCTIONINFO_H
15 #define ARMMACHINEFUNCTIONINFO_H
17 #include "ARMSubtarget.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/Target/TargetRegisterInfo.h"
20 #include "llvm/Target/TargetMachine.h"
21 #include "llvm/ADT/BitVector.h"
25 /// ARMFunctionInfo - This class is derived from MachineFunction private
26 /// ARM target-specific information for each MachineFunction.
27 class ARMFunctionInfo : public MachineFunctionInfo {
29 /// isThumb - True if this function is compiled under Thumb mode.
30 /// Used to initialized Align, so must precede it.
33 /// hasThumb2 - True if the target architecture supports Thumb2. Do not use
34 /// to determine if function is compiled under Thumb mode, for that use
38 /// VarArgsRegSaveSize - Size of the register save area for vararg functions.
40 unsigned VarArgsRegSaveSize;
42 /// HasStackFrame - True if this function has a stack frame. Set by
43 /// processFunctionBeforeCalleeSavedScan().
46 /// LRSpilledForFarJump - True if the LR register has been for spilled to
48 bool LRSpilledForFarJump;
50 /// FramePtrSpillOffset - If HasStackFrame, this records the frame pointer
51 /// spill stack offset.
52 unsigned FramePtrSpillOffset;
54 /// GPRCS1Offset, GPRCS2Offset, DPRCSOffset - Starting offset of callee saved
55 /// register spills areas. For Mac OS X:
57 /// GPR callee-saved (1) : r4, r5, r6, r7, lr
58 /// --------------------------------------------
59 /// GPR callee-saved (2) : r8, r10, r11
60 /// --------------------------------------------
61 /// DPR callee-saved : d8 - d15
62 unsigned GPRCS1Offset;
63 unsigned GPRCS2Offset;
66 /// GPRCS1Size, GPRCS2Size, DPRCSSize - Sizes of callee saved register spills
72 /// GPRCS1Frames, GPRCS2Frames, DPRCSFrames - Keeps track of frame indices
73 /// which belong to these spill areas.
74 BitVector GPRCS1Frames;
75 BitVector GPRCS2Frames;
76 BitVector DPRCSFrames;
78 /// SpilledCSRegs - A BitVector mask of all spilled callee-saved registers.
80 BitVector SpilledCSRegs;
82 /// JumpTableUId - Unique id for jumptables.
84 unsigned JumpTableUId;
86 unsigned ConstPoolEntryUId;
88 /// VarArgsFrameIndex - FrameIndex for start of varargs area.
89 int VarArgsFrameIndex;
91 /// HasITBlocks - True if IT blocks have been inserted.
98 VarArgsRegSaveSize(0), HasStackFrame(false),
99 LRSpilledForFarJump(false),
100 FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
101 GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0),
102 GPRCS1Frames(0), GPRCS2Frames(0), DPRCSFrames(0),
103 JumpTableUId(0), ConstPoolEntryUId(0), VarArgsFrameIndex(0),
104 HasITBlocks(false) {}
106 explicit ARMFunctionInfo(MachineFunction &MF) :
107 isThumb(MF.getTarget().getSubtarget<ARMSubtarget>().isThumb()),
108 hasThumb2(MF.getTarget().getSubtarget<ARMSubtarget>().hasThumb2()),
109 VarArgsRegSaveSize(0), HasStackFrame(false),
110 LRSpilledForFarJump(false),
111 FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
112 GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0),
113 GPRCS1Frames(32), GPRCS2Frames(32), DPRCSFrames(32),
114 SpilledCSRegs(MF.getTarget().getRegisterInfo()->getNumRegs()),
115 JumpTableUId(0), ConstPoolEntryUId(0), VarArgsFrameIndex(0),
116 HasITBlocks(false) {}
118 bool isThumbFunction() const { return isThumb; }
119 bool isThumb1OnlyFunction() const { return isThumb && !hasThumb2; }
120 bool isThumb2Function() const { return isThumb && hasThumb2; }
122 unsigned getVarArgsRegSaveSize() const { return VarArgsRegSaveSize; }
123 void setVarArgsRegSaveSize(unsigned s) { VarArgsRegSaveSize = s; }
125 bool hasStackFrame() const { return HasStackFrame; }
126 void setHasStackFrame(bool s) { HasStackFrame = s; }
128 bool isLRSpilledForFarJump() const { return LRSpilledForFarJump; }
129 void setLRIsSpilledForFarJump(bool s) { LRSpilledForFarJump = s; }
131 unsigned getFramePtrSpillOffset() const { return FramePtrSpillOffset; }
132 void setFramePtrSpillOffset(unsigned o) { FramePtrSpillOffset = o; }
134 unsigned getGPRCalleeSavedArea1Offset() const { return GPRCS1Offset; }
135 unsigned getGPRCalleeSavedArea2Offset() const { return GPRCS2Offset; }
136 unsigned getDPRCalleeSavedAreaOffset() const { return DPRCSOffset; }
138 void setGPRCalleeSavedArea1Offset(unsigned o) { GPRCS1Offset = o; }
139 void setGPRCalleeSavedArea2Offset(unsigned o) { GPRCS2Offset = o; }
140 void setDPRCalleeSavedAreaOffset(unsigned o) { DPRCSOffset = o; }
142 unsigned getGPRCalleeSavedArea1Size() const { return GPRCS1Size; }
143 unsigned getGPRCalleeSavedArea2Size() const { return GPRCS2Size; }
144 unsigned getDPRCalleeSavedAreaSize() const { return DPRCSSize; }
146 void setGPRCalleeSavedArea1Size(unsigned s) { GPRCS1Size = s; }
147 void setGPRCalleeSavedArea2Size(unsigned s) { GPRCS2Size = s; }
148 void setDPRCalleeSavedAreaSize(unsigned s) { DPRCSSize = s; }
150 bool isGPRCalleeSavedArea1Frame(int fi) const {
151 if (fi < 0 || fi >= (int)GPRCS1Frames.size())
153 return GPRCS1Frames[fi];
155 bool isGPRCalleeSavedArea2Frame(int fi) const {
156 if (fi < 0 || fi >= (int)GPRCS2Frames.size())
158 return GPRCS2Frames[fi];
160 bool isDPRCalleeSavedAreaFrame(int fi) const {
161 if (fi < 0 || fi >= (int)DPRCSFrames.size())
163 return DPRCSFrames[fi];
166 void addGPRCalleeSavedArea1Frame(int fi) {
168 int Size = GPRCS1Frames.size();
173 GPRCS1Frames.resize(Size);
175 GPRCS1Frames[fi] = true;
178 void addGPRCalleeSavedArea2Frame(int fi) {
180 int Size = GPRCS2Frames.size();
185 GPRCS2Frames.resize(Size);
187 GPRCS2Frames[fi] = true;
190 void addDPRCalleeSavedAreaFrame(int fi) {
192 int Size = DPRCSFrames.size();
197 DPRCSFrames.resize(Size);
199 DPRCSFrames[fi] = true;
203 void setCSRegisterIsSpilled(unsigned Reg) {
204 SpilledCSRegs.set(Reg);
207 bool isCSRegisterSpilled(unsigned Reg) const {
208 return SpilledCSRegs[Reg];
211 const BitVector &getSpilledCSRegisters() const {
212 return SpilledCSRegs;
215 unsigned createJumpTableUId() {
216 return JumpTableUId++;
219 unsigned getNumJumpTables() const {
223 void initConstPoolEntryUId(unsigned UId) {
224 ConstPoolEntryUId = UId;
227 unsigned getNumConstPoolEntries() const {
228 return ConstPoolEntryUId;
231 unsigned createConstPoolEntryUId() {
232 return ConstPoolEntryUId++;
235 int getVarArgsFrameIndex() const { return VarArgsFrameIndex; }
236 void setVarArgsFrameIndex(int Index) { VarArgsFrameIndex = Index; }
238 bool hasITBlocks() const { return HasITBlocks; }
239 void setHasITBlocks(bool h) { HasITBlocks = h; }
241 } // End llvm namespace
243 #endif // ARMMACHINEFUNCTIONINFO_H