1 //===-- SIInstrInfo.h - SI Instruction Info Interface ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Interface definition for SIInstrInfo.
12 //===----------------------------------------------------------------------===//
18 #include "AMDGPUInstrInfo.h"
19 #include "SIRegisterInfo.h"
23 class SIInstrInfo : public AMDGPUInstrInfo {
25 const SIRegisterInfo RI;
28 explicit SIInstrInfo(AMDGPUTargetMachine &tm);
30 const SIRegisterInfo &getRegisterInfo() const;
32 virtual void copyPhysReg(MachineBasicBlock &MBB,
33 MachineBasicBlock::iterator MI, DebugLoc DL,
34 unsigned DestReg, unsigned SrcReg,
37 /// getEncodingType - Returns the encoding type of this instruction.
38 unsigned getEncodingType(const MachineInstr &MI) const;
40 /// getEncodingBytes - Returns the size of this instructions encoding in
42 unsigned getEncodingBytes(const MachineInstr &MI) const;
44 virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
47 virtual unsigned getIEQOpcode() const { assert(!"Implement"); return 0;}
48 virtual bool isMov(unsigned Opcode) const;
52 } // End namespace llvm
54 // These must be kept in sync with SIInstructions.td and also the
55 // InstrEncodingInfo array in SIInstrInfo.cpp.
57 // NOTE: This enum is only used to identify the encoding type within LLVM,
58 // the actual encoding type that is part of the instruction format is different
59 namespace SIInstrEncodingType {
80 #define SI_INSTR_FLAGS_ENCODING_MASK 0xf
82 namespace SIInstrFlags {
84 // First 4 bits are the instruction encoding
89 #endif //SIINSTRINFO_H