1 //===-- AArch64Subtarget.cpp - AArch64 Subtarget Information ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the AArch64 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "AArch64InstrInfo.h"
15 #include "AArch64Subtarget.h"
16 #include "llvm/ADT/SmallVector.h"
17 #include "llvm/CodeGen/MachineScheduler.h"
18 #include "llvm/IR/GlobalValue.h"
19 #include "llvm/Support/TargetRegistry.h"
23 #define DEBUG_TYPE "aarch64-subtarget"
25 #define GET_SUBTARGETINFO_CTOR
26 #define GET_SUBTARGETINFO_TARGET_DESC
27 #include "AArch64GenSubtargetInfo.inc"
30 EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if "
31 "converter pass"), cl::init(true), cl::Hidden);
33 AArch64Subtarget::AArch64Subtarget(const std::string &TT,
34 const std::string &CPU,
35 const std::string &FS, TargetMachine &TM,
37 : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
38 HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
39 HasZeroCycleRegMove(false), HasZeroCycleZeroing(false), CPUString(CPU),
41 // This nested ternary is horrible, but DL needs to be properly
43 // before TLInfo is constructed.
45 ? "e-m:o-i64:64-i128:128-n32:64-S128"
46 : (LittleEndian ? "e-m:e-i64:64-i128:128-n32:64-S128"
47 : "E-m:e-i64:64-i128:128-n32:64-S128")),
48 FrameLowering(), InstrInfo(*this), TSInfo(&DL) {
49 // Determine default and user-specified characteristics
51 if (CPUString.empty())
52 CPUString = "generic";
54 ParseSubtargetFeatures(CPUString, FS);
55 TLInfo = make_unique<AArch64TargetLowering>(TM);
58 /// ClassifyGlobalReference - Find the target operand flags that describe
59 /// how a global value should be referenced for the current subtarget.
61 AArch64Subtarget::ClassifyGlobalReference(const GlobalValue *GV,
62 const TargetMachine &TM) const {
64 // Determine whether this is a reference to a definition or a declaration.
65 // Materializable GVs (in JIT lazy compilation mode) do not require an extra
67 bool isDecl = GV->hasAvailableExternallyLinkage();
68 if (GV->isDeclaration() && !GV->isMaterializable())
71 // MachO large model always goes via a GOT, simply to get a single 8-byte
72 // absolute relocation on all global addresses.
73 if (TM.getCodeModel() == CodeModel::Large && isTargetMachO())
74 return AArch64II::MO_GOT;
76 // The small code mode's direct accesses use ADRP, which cannot necessarily
77 // produce the value 0 (if the code is above 4GB). Therefore they must use the
79 if (TM.getCodeModel() == CodeModel::Small && GV->isWeakForLinker() && isDecl)
80 return AArch64II::MO_GOT;
82 // If symbol visibility is hidden, the extra load is not needed if
83 // the symbol is definitely defined in the current translation unit.
85 // The handling of non-hidden symbols in PIC mode is rather target-dependent:
86 // + On MachO, if the symbol is defined in this module the GOT can be
88 // + On ELF, the R_AARCH64_COPY relocation means that even symbols actually
89 // defined could end up in unexpected places. Use a GOT.
90 if (TM.getRelocationModel() != Reloc::Static && GV->hasDefaultVisibility()) {
92 return (isDecl || GV->isWeakForLinker()) ? AArch64II::MO_GOT
93 : AArch64II::MO_NO_FLAG;
95 // No need to go through the GOT for local symbols on ELF.
96 return GV->hasLocalLinkage() ? AArch64II::MO_NO_FLAG : AArch64II::MO_GOT;
99 return AArch64II::MO_NO_FLAG;
102 /// This function returns the name of a function which has an interface
103 /// like the non-standard bzero function, if such a function exists on
104 /// the current subtarget and it is considered prefereable over
105 /// memset with zero passed as the second argument. Otherwise it
107 const char *AArch64Subtarget::getBZeroEntry() const {
108 // Prefer bzero on Darwin only.
115 void AArch64Subtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
116 MachineInstr *begin, MachineInstr *end,
117 unsigned NumRegionInstrs) const {
118 // LNT run (at least on Cyclone) showed reasonably significant gains for
119 // bi-directional scheduling. 253.perlbmk.
120 Policy.OnlyTopDown = false;
121 Policy.OnlyBottomUp = false;
124 bool AArch64Subtarget::enableEarlyIfConversion() const {
125 return EnableEarlyIfConvert;