1 //==- AArch64RegisterInfo.h - AArch64 Register Information Impl -*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the AArch64 implementation of the MCRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_AARCH64REGISTERINFO_H
15 #define LLVM_TARGET_AARCH64REGISTERINFO_H
17 #include "llvm/Target/TargetRegisterInfo.h"
19 #define GET_REGINFO_HEADER
20 #include "AArch64GenRegisterInfo.inc"
24 class AArch64InstrInfo;
25 class AArch64Subtarget;
27 struct AArch64RegisterInfo : public AArch64GenRegisterInfo {
28 AArch64RegisterInfo();
31 getCalleeSavedRegs(const MachineFunction *MF =nullptr) const override;
32 const uint32_t *getCallPreservedMask(CallingConv::ID) const override;
34 unsigned getCSRFirstUseCost() const override {
35 // The cost will be compared against BlockFrequency where entry has the
36 // value of 1 << 14. A value of 5 will choose to spill or split really
37 // cold path instead of using a callee-saved register.
41 const uint32_t *getTLSDescCallPreservedMask() const;
43 BitVector getReservedRegs(const MachineFunction &MF) const override;
44 unsigned getFrameRegister(const MachineFunction &MF) const override;
46 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
47 unsigned FIOperandNum,
48 RegScavenger *Rs = nullptr) const override;
50 /// getCrossCopyRegClass - Returns a legal register class to copy a register
51 /// in the specified class to or from. Returns original class if it is
52 /// possible to copy between a two registers of the specified class.
53 const TargetRegisterClass *
54 getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
56 /// getLargestLegalSuperClass - Returns the largest super class of RC that is
57 /// legal to use in the current sub-target and has the same spill size.
58 const TargetRegisterClass*
59 getLargestLegalSuperClass(const TargetRegisterClass *RC) const override {
60 if (RC == &AArch64::tcGPR64RegClass)
61 return &AArch64::GPR64RegClass;
66 bool requiresRegisterScavenging(const MachineFunction &MF) const override {
70 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
74 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
77 } // end namespace llvm
79 #endif // LLVM_TARGET_AARCH64REGISTERINFO_H