1 //==- AArch64FrameLowering.h - Define frame lowering for AArch64 -*- C++ -*--=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_AARCH64_FRAMEINFO_H
15 #define LLVM_AARCH64_FRAMEINFO_H
17 #include "AArch64Subtarget.h"
18 #include "llvm/Target/TargetFrameLowering.h"
21 class AArch64Subtarget;
23 class AArch64FrameLowering : public TargetFrameLowering {
25 // In order to unify the spilling and restoring of callee-saved registers into
26 // emitFrameMemOps, we need to be able to specify which instructions to use
27 // for the relevant memory operations on each register class. An array of the
28 // following struct is populated and passed in to achieve this.
29 struct LoadStoreMethod {
30 const TargetRegisterClass *RegClass; // E.g. GPR64RegClass
32 // The preferred instruction.
33 unsigned PairOpcode; // E.g. LSPair64_STR
35 // Sometimes only a single register can be handled at once.
36 unsigned SingleOpcode; // E.g. LS64_STR
39 const AArch64Subtarget &STI;
42 explicit AArch64FrameLowering(const AArch64Subtarget &sti)
43 : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 16, 0, 16),
47 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into
49 virtual void emitPrologue(MachineFunction &MF) const;
50 virtual void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
52 /// Decides how much stack adjustment to perform in each phase of the prologue
54 void splitSPAdjustments(uint64_t Total, uint64_t &Initial,
55 uint64_t &Residual) const;
57 int64_t resolveFrameIndexReference(MachineFunction &MF, int FrameIndex,
58 unsigned &FrameReg, int SPAdj,
59 bool IsCalleeSaveOp) const;
61 virtual void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
62 RegScavenger *RS) const;
64 virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
65 MachineBasicBlock::iterator MI,
66 const std::vector<CalleeSavedInfo> &CSI,
67 const TargetRegisterInfo *TRI) const;
68 virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
69 MachineBasicBlock::iterator MI,
70 const std::vector<CalleeSavedInfo> &CSI,
71 const TargetRegisterInfo *TRI) const;
73 /// If the register is X30 (i.e. LR) and the return address is used in the
74 /// function then the callee-save store doesn't actually kill the register,
75 /// otherwise it does.
76 bool determinePrologueDeath(MachineBasicBlock &MBB, unsigned Reg) const;
78 /// This function emits the loads or stores required during prologue and
79 /// epilogue as efficiently as possible.
81 /// The operations involved in setting up and tearing down the frame are
82 /// similar enough to warrant a shared function, particularly as discrepancies
83 /// between the two would be disastrous.
84 void emitFrameMemOps(bool isStore, MachineBasicBlock &MBB,
85 MachineBasicBlock::iterator MI,
86 const std::vector<CalleeSavedInfo> &CSI,
87 const TargetRegisterInfo *TRI,
88 LoadStoreMethod PossibleClasses[],
89 unsigned NumClasses) const;
92 virtual bool hasFP(const MachineFunction &MF) const;
94 virtual bool useFPForAddressing(const MachineFunction &MF) const;
97 virtual bool hasReservedCallFrame(const MachineFunction &MF) const;
101 } // End llvm namespace