1 //===-- llvm/CodeGen/VirtRegMap.cpp - Virtual Register Map ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the VirtRegMap class.
12 // It also contains implementations of the Spiller interface, which, given a
13 // virtual register map and a machine function, eliminates all virtual
14 // references by replacing them with physical register references - adding spill
17 //===----------------------------------------------------------------------===//
19 #define DEBUG_TYPE "virtregmap"
20 #include "VirtRegMap.h"
21 #include "llvm/Function.h"
22 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/CodeGen/SlotIndexes.h"
28 #include "llvm/Target/TargetMachine.h"
29 #include "llvm/Target/TargetInstrInfo.h"
30 #include "llvm/Target/TargetRegisterInfo.h"
31 #include "llvm/Support/CommandLine.h"
32 #include "llvm/Support/Compiler.h"
33 #include "llvm/Support/Debug.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/ADT/BitVector.h"
36 #include "llvm/ADT/DenseMap.h"
37 #include "llvm/ADT/DepthFirstIterator.h"
38 #include "llvm/ADT/Statistic.h"
39 #include "llvm/ADT/STLExtras.h"
40 #include "llvm/ADT/SmallSet.h"
44 STATISTIC(NumSpillSlots, "Number of spill slots allocated");
45 STATISTIC(NumIdCopies, "Number of identity moves eliminated after rewriting");
47 //===----------------------------------------------------------------------===//
48 // VirtRegMap implementation
49 //===----------------------------------------------------------------------===//
51 char VirtRegMap::ID = 0;
53 INITIALIZE_PASS(VirtRegMap, "virtregmap", "Virtual Register Map", false, false)
55 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) {
56 MRI = &mf.getRegInfo();
57 TII = mf.getTarget().getInstrInfo();
58 TRI = mf.getTarget().getRegisterInfo();
61 LowSpillSlot = HighSpillSlot = NO_STACK_SLOT;
64 Virt2StackSlotMap.clear();
65 Virt2SplitMap.clear();
66 SpillSlotToUsesMap.clear();
68 SpillSlotToUsesMap.resize(8);
70 allocatableRCRegs.clear();
71 for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(),
72 E = TRI->regclass_end(); I != E; ++I)
73 allocatableRCRegs.insert(std::make_pair(*I,
74 TRI->getAllocatableSet(mf, *I)));
81 void VirtRegMap::grow() {
82 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs();
83 Virt2PhysMap.resize(NumRegs);
84 Virt2StackSlotMap.resize(NumRegs);
85 Virt2SplitMap.resize(NumRegs);
88 unsigned VirtRegMap::createSpillSlot(const TargetRegisterClass *RC) {
89 int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(),
91 if (LowSpillSlot == NO_STACK_SLOT)
93 if (HighSpillSlot == NO_STACK_SLOT || SS > HighSpillSlot)
95 assert(SS >= LowSpillSlot && "Unexpected low spill slot");
96 unsigned Idx = SS-LowSpillSlot;
97 while (Idx >= SpillSlotToUsesMap.size())
98 SpillSlotToUsesMap.resize(SpillSlotToUsesMap.size()*2);
103 unsigned VirtRegMap::getRegAllocPref(unsigned virtReg) {
104 std::pair<unsigned, unsigned> Hint = MRI->getRegAllocationHint(virtReg);
105 unsigned physReg = Hint.second;
106 if (TargetRegisterInfo::isVirtualRegister(physReg) && hasPhys(physReg))
107 physReg = getPhys(physReg);
109 return (TargetRegisterInfo::isPhysicalRegister(physReg))
111 return TRI->ResolveRegAllocHint(Hint.first, physReg, *MF);
114 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) {
115 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
116 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
117 "attempt to assign stack slot to already spilled register");
118 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg);
119 return Virt2StackSlotMap[virtReg] = createSpillSlot(RC);
122 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) {
123 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
124 assert(Virt2StackSlotMap[virtReg] == NO_STACK_SLOT &&
125 "attempt to assign stack slot to already spilled register");
127 (SS >= MF->getFrameInfo()->getObjectIndexBegin())) &&
128 "illegal fixed frame index");
129 Virt2StackSlotMap[virtReg] = SS;
132 void VirtRegMap::addSpillSlotUse(int FI, MachineInstr *MI) {
133 if (!MF->getFrameInfo()->isFixedObjectIndex(FI)) {
134 // If FI < LowSpillSlot, this stack reference was produced by
135 // instruction selection and is not a spill
136 if (FI >= LowSpillSlot) {
137 assert(FI >= 0 && "Spill slot index should not be negative!");
138 assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size()
139 && "Invalid spill slot");
140 SpillSlotToUsesMap[FI-LowSpillSlot].insert(MI);
145 void VirtRegMap::RemoveMachineInstrFromMaps(MachineInstr *MI) {
146 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
147 MachineOperand &MO = MI->getOperand(i);
150 int FI = MO.getIndex();
151 if (MF->getFrameInfo()->isFixedObjectIndex(FI))
153 // This stack reference was produced by instruction selection and
155 if (FI < LowSpillSlot)
157 assert((unsigned)FI-LowSpillSlot < SpillSlotToUsesMap.size()
158 && "Invalid spill slot");
159 SpillSlotToUsesMap[FI-LowSpillSlot].erase(MI);
163 void VirtRegMap::rewrite(SlotIndexes *Indexes) {
164 DEBUG(dbgs() << "********** REWRITE VIRTUAL REGISTERS **********\n"
165 << "********** Function: "
166 << MF->getFunction()->getName() << '\n');
168 SmallVector<unsigned, 8> SuperDeads;
169 SmallVector<unsigned, 8> SuperDefs;
170 SmallVector<unsigned, 8> SuperKills;
172 for (MachineFunction::iterator MBBI = MF->begin(), MBBE = MF->end();
173 MBBI != MBBE; ++MBBI) {
174 DEBUG(MBBI->print(dbgs(), Indexes));
175 for (MachineBasicBlock::iterator MII = MBBI->begin(), MIE = MBBI->end();
177 MachineInstr *MI = MII;
180 for (MachineInstr::mop_iterator MOI = MI->operands_begin(),
181 MOE = MI->operands_end(); MOI != MOE; ++MOI) {
182 MachineOperand &MO = *MOI;
183 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg()))
185 unsigned VirtReg = MO.getReg();
186 unsigned PhysReg = getPhys(VirtReg);
187 assert(PhysReg != NO_PHYS_REG && "Instruction uses unmapped VirtReg");
189 // Preserve semantics of sub-register operands.
190 if (MO.getSubReg()) {
191 // A virtual register kill refers to the whole register, so we may
192 // have to add <imp-use,kill> operands for the super-register. A
193 // partial redef always kills and redefines the super-register.
194 if (MO.readsReg() && (MO.isDef() || MO.isKill()))
195 SuperKills.push_back(PhysReg);
198 // The <def,undef> flag only makes sense for sub-register defs, and
199 // we are substituting a full physreg. An <imp-use,kill> operand
200 // from the SuperKills list will represent the partial read of the
202 MO.setIsUndef(false);
204 // Also add implicit defs for the super-register.
206 SuperDeads.push_back(PhysReg);
208 SuperDefs.push_back(PhysReg);
211 // PhysReg operands cannot have subregister indexes.
212 PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg());
213 assert(PhysReg && "Invalid SubReg for physical register");
216 // Rewrite. Note we could have used MachineOperand::substPhysReg(), but
217 // we need the inlining here.
221 // Add any missing super-register kills after rewriting the whole
223 while (!SuperKills.empty())
224 MI->addRegisterKilled(SuperKills.pop_back_val(), TRI, true);
226 while (!SuperDeads.empty())
227 MI->addRegisterDead(SuperDeads.pop_back_val(), TRI, true);
229 while (!SuperDefs.empty())
230 MI->addRegisterDefined(SuperDefs.pop_back_val(), TRI);
232 DEBUG(dbgs() << "> " << *MI);
234 // Finally, remove any identity copies.
235 if (MI->isIdentityCopy()) {
237 if (MI->getNumOperands() == 2) {
238 DEBUG(dbgs() << "Deleting identity copy.\n");
239 RemoveMachineInstrFromMaps(MI);
241 Indexes->removeMachineInstrFromMaps(MI);
242 // It's safe to erase MI because MII has already been incremented.
243 MI->eraseFromParent();
245 // Transform identity copy to a KILL to deal with subregisters.
246 MI->setDesc(TII->get(TargetOpcode::KILL));
247 DEBUG(dbgs() << "Identity copy: " << *MI);
253 // Tell MRI about physical registers in use.
254 for (unsigned Reg = 1, RegE = TRI->getNumRegs(); Reg != RegE; ++Reg)
255 if (!MRI->reg_nodbg_empty(Reg))
256 MRI->setPhysRegUsed(Reg);
259 void VirtRegMap::print(raw_ostream &OS, const Module* M) const {
260 const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo();
261 const MachineRegisterInfo &MRI = MF->getRegInfo();
263 OS << "********** REGISTER MAP **********\n";
264 for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
265 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
266 if (Virt2PhysMap[Reg] != (unsigned)VirtRegMap::NO_PHYS_REG) {
267 OS << '[' << PrintReg(Reg, TRI) << " -> "
268 << PrintReg(Virt2PhysMap[Reg], TRI) << "] "
269 << MRI.getRegClass(Reg)->getName() << "\n";
273 for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
274 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
275 if (Virt2StackSlotMap[Reg] != VirtRegMap::NO_STACK_SLOT) {
276 OS << '[' << PrintReg(Reg, TRI) << " -> fi#" << Virt2StackSlotMap[Reg]
277 << "] " << MRI.getRegClass(Reg)->getName() << "\n";
283 void VirtRegMap::dump() const {