1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/SetVector.h"
17 #include "llvm/ADT/SmallPtrSet.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/Analysis/TargetTransformInfo.h"
22 #include "llvm/Analysis/ValueTracking.h"
23 #include "llvm/Assembly/Writer.h"
24 #include "llvm/CodeGen/MachineBasicBlock.h"
25 #include "llvm/CodeGen/MachineConstantPool.h"
26 #include "llvm/CodeGen/MachineFrameInfo.h"
27 #include "llvm/CodeGen/MachineModuleInfo.h"
28 #include "llvm/DebugInfo.h"
29 #include "llvm/IR/CallingConv.h"
30 #include "llvm/IR/Constants.h"
31 #include "llvm/IR/DataLayout.h"
32 #include "llvm/IR/DerivedTypes.h"
33 #include "llvm/IR/Function.h"
34 #include "llvm/IR/GlobalAlias.h"
35 #include "llvm/IR/GlobalVariable.h"
36 #include "llvm/IR/Intrinsics.h"
37 #include "llvm/Support/CommandLine.h"
38 #include "llvm/Support/Debug.h"
39 #include "llvm/Support/ErrorHandling.h"
40 #include "llvm/Support/ManagedStatic.h"
41 #include "llvm/Support/MathExtras.h"
42 #include "llvm/Support/Mutex.h"
43 #include "llvm/Support/raw_ostream.h"
44 #include "llvm/Target/TargetInstrInfo.h"
45 #include "llvm/Target/TargetIntrinsicInfo.h"
46 #include "llvm/Target/TargetLowering.h"
47 #include "llvm/Target/TargetMachine.h"
48 #include "llvm/Target/TargetOptions.h"
49 #include "llvm/Target/TargetRegisterInfo.h"
50 #include "llvm/Target/TargetSelectionDAGInfo.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 // Default null implementations of the callbacks.
63 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
64 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
66 //===----------------------------------------------------------------------===//
67 // ConstantFPSDNode Class
68 //===----------------------------------------------------------------------===//
70 /// isExactlyValue - We don't rely on operator== working on double values, as
71 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
72 /// As such, this method can be used to do an exact bit-for-bit comparison of
73 /// two floating point values.
74 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
75 return getValueAPF().bitwiseIsEqual(V);
78 bool ConstantFPSDNode::isValueValidForType(EVT VT,
80 assert(VT.isFloatingPoint() && "Can only convert between FP types");
82 // convert modifies in place, so make a copy.
83 APFloat Val2 = APFloat(Val);
85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
86 APFloat::rmNearestTiesToEven,
91 //===----------------------------------------------------------------------===//
93 //===----------------------------------------------------------------------===//
95 /// isBuildVectorAllOnes - Return true if the specified node is a
96 /// BUILD_VECTOR where all of the elements are ~0 or undef.
97 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
98 // Look through a bit convert.
99 if (N->getOpcode() == ISD::BITCAST)
100 N = N->getOperand(0).getNode();
102 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
104 unsigned i = 0, e = N->getNumOperands();
106 // Skip over all of the undef values.
107 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
110 // Do not accept an all-undef vector.
111 if (i == e) return false;
113 // Do not accept build_vectors that aren't all constants or which have non-~0
114 // elements. We have to be a bit careful here, as the type of the constant
115 // may not be the same as the type of the vector elements due to type
116 // legalization (the elements are promoted to a legal type for the target and
117 // a vector of a type may be legal when the base element type is not).
118 // We only want to check enough bits to cover the vector elements, because
119 // we care if the resultant vector is all ones, not whether the individual
121 SDValue NotZero = N->getOperand(i);
122 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
123 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
124 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
126 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
127 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
132 // Okay, we have at least one ~0 value, check to see if the rest match or are
133 // undefs. Even with the above element type twiddling, this should be OK, as
134 // the same type legalization should have applied to all the elements.
135 for (++i; i != e; ++i)
136 if (N->getOperand(i) != NotZero &&
137 N->getOperand(i).getOpcode() != ISD::UNDEF)
143 /// isBuildVectorAllZeros - Return true if the specified node is a
144 /// BUILD_VECTOR where all of the elements are 0 or undef.
145 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
146 // Look through a bit convert.
147 if (N->getOpcode() == ISD::BITCAST)
148 N = N->getOperand(0).getNode();
150 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
152 unsigned i = 0, e = N->getNumOperands();
154 // Skip over all of the undef values.
155 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
158 // Do not accept an all-undef vector.
159 if (i == e) return false;
161 // Do not accept build_vectors that aren't all constants or which have non-0
163 SDValue Zero = N->getOperand(i);
164 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
165 if (!CN->isNullValue())
167 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
168 if (!CFPN->getValueAPF().isPosZero())
173 // Okay, we have at least one 0 value, check to see if the rest match or are
175 for (++i; i != e; ++i)
176 if (N->getOperand(i) != Zero &&
177 N->getOperand(i).getOpcode() != ISD::UNDEF)
182 /// isScalarToVector - Return true if the specified node is a
183 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
184 /// element is not an undef.
185 bool ISD::isScalarToVector(const SDNode *N) {
186 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
189 if (N->getOpcode() != ISD::BUILD_VECTOR)
191 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
193 unsigned NumElems = N->getNumOperands();
196 for (unsigned i = 1; i < NumElems; ++i) {
197 SDValue V = N->getOperand(i);
198 if (V.getOpcode() != ISD::UNDEF)
204 /// allOperandsUndef - Return true if the node has at least one operand
205 /// and all operands of the specified node are ISD::UNDEF.
206 bool ISD::allOperandsUndef(const SDNode *N) {
207 // Return false if the node has no operands.
208 // This is "logically inconsistent" with the definition of "all" but
209 // is probably the desired behavior.
210 if (N->getNumOperands() == 0)
213 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
214 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
220 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
221 /// when given the operation for (X op Y).
222 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
223 // To perform this operation, we just need to swap the L and G bits of the
225 unsigned OldL = (Operation >> 2) & 1;
226 unsigned OldG = (Operation >> 1) & 1;
227 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
228 (OldL << 1) | // New G bit
229 (OldG << 2)); // New L bit.
232 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
233 /// 'op' is a valid SetCC operation.
234 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
235 unsigned Operation = Op;
237 Operation ^= 7; // Flip L, G, E bits, but not U.
239 Operation ^= 15; // Flip all of the condition bits.
241 if (Operation > ISD::SETTRUE2)
242 Operation &= ~8; // Don't let N and U bits get set.
244 return ISD::CondCode(Operation);
248 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
249 /// signed operation and 2 if the result is an unsigned comparison. Return zero
250 /// if the operation does not depend on the sign of the input (setne and seteq).
251 static int isSignedOp(ISD::CondCode Opcode) {
253 default: llvm_unreachable("Illegal integer setcc operation!");
255 case ISD::SETNE: return 0;
259 case ISD::SETGE: return 1;
263 case ISD::SETUGE: return 2;
267 /// getSetCCOrOperation - Return the result of a logical OR between different
268 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
269 /// returns SETCC_INVALID if it is not possible to represent the resultant
271 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
273 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
274 // Cannot fold a signed integer setcc with an unsigned integer setcc.
275 return ISD::SETCC_INVALID;
277 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
279 // If the N and U bits get set then the resultant comparison DOES suddenly
280 // care about orderedness, and is true when ordered.
281 if (Op > ISD::SETTRUE2)
282 Op &= ~16; // Clear the U bit if the N bit is set.
284 // Canonicalize illegal integer setcc's.
285 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
288 return ISD::CondCode(Op);
291 /// getSetCCAndOperation - Return the result of a logical AND between different
292 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
293 /// function returns zero if it is not possible to represent the resultant
295 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
297 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
298 // Cannot fold a signed setcc with an unsigned setcc.
299 return ISD::SETCC_INVALID;
301 // Combine all of the condition bits.
302 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
304 // Canonicalize illegal integer setcc's.
308 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
309 case ISD::SETOEQ: // SETEQ & SETU[LG]E
310 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
311 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
312 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
319 //===----------------------------------------------------------------------===//
320 // SDNode Profile Support
321 //===----------------------------------------------------------------------===//
323 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
325 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
329 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
330 /// solely with their pointer.
331 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
332 ID.AddPointer(VTList.VTs);
335 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
337 static void AddNodeIDOperands(FoldingSetNodeID &ID,
338 const SDValue *Ops, unsigned NumOps) {
339 for (; NumOps; --NumOps, ++Ops) {
340 ID.AddPointer(Ops->getNode());
341 ID.AddInteger(Ops->getResNo());
345 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
347 static void AddNodeIDOperands(FoldingSetNodeID &ID,
348 const SDUse *Ops, unsigned NumOps) {
349 for (; NumOps; --NumOps, ++Ops) {
350 ID.AddPointer(Ops->getNode());
351 ID.AddInteger(Ops->getResNo());
355 static void AddNodeIDNode(FoldingSetNodeID &ID,
356 unsigned short OpC, SDVTList VTList,
357 const SDValue *OpList, unsigned N) {
358 AddNodeIDOpcode(ID, OpC);
359 AddNodeIDValueTypes(ID, VTList);
360 AddNodeIDOperands(ID, OpList, N);
363 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
365 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
366 switch (N->getOpcode()) {
367 case ISD::TargetExternalSymbol:
368 case ISD::ExternalSymbol:
369 llvm_unreachable("Should only be used on nodes with operands");
370 default: break; // Normal nodes don't need extra info.
371 case ISD::TargetConstant:
373 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
375 case ISD::TargetConstantFP:
376 case ISD::ConstantFP: {
377 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
380 case ISD::TargetGlobalAddress:
381 case ISD::GlobalAddress:
382 case ISD::TargetGlobalTLSAddress:
383 case ISD::GlobalTLSAddress: {
384 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
385 ID.AddPointer(GA->getGlobal());
386 ID.AddInteger(GA->getOffset());
387 ID.AddInteger(GA->getTargetFlags());
388 ID.AddInteger(GA->getAddressSpace());
391 case ISD::BasicBlock:
392 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
395 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
397 case ISD::RegisterMask:
398 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
401 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
403 case ISD::FrameIndex:
404 case ISD::TargetFrameIndex:
405 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
408 case ISD::TargetJumpTable:
409 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
410 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
412 case ISD::ConstantPool:
413 case ISD::TargetConstantPool: {
414 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
415 ID.AddInteger(CP->getAlignment());
416 ID.AddInteger(CP->getOffset());
417 if (CP->isMachineConstantPoolEntry())
418 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
420 ID.AddPointer(CP->getConstVal());
421 ID.AddInteger(CP->getTargetFlags());
424 case ISD::TargetIndex: {
425 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
426 ID.AddInteger(TI->getIndex());
427 ID.AddInteger(TI->getOffset());
428 ID.AddInteger(TI->getTargetFlags());
432 const LoadSDNode *LD = cast<LoadSDNode>(N);
433 ID.AddInteger(LD->getMemoryVT().getRawBits());
434 ID.AddInteger(LD->getRawSubclassData());
435 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
439 const StoreSDNode *ST = cast<StoreSDNode>(N);
440 ID.AddInteger(ST->getMemoryVT().getRawBits());
441 ID.AddInteger(ST->getRawSubclassData());
442 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
445 case ISD::ATOMIC_CMP_SWAP:
446 case ISD::ATOMIC_SWAP:
447 case ISD::ATOMIC_LOAD_ADD:
448 case ISD::ATOMIC_LOAD_SUB:
449 case ISD::ATOMIC_LOAD_AND:
450 case ISD::ATOMIC_LOAD_OR:
451 case ISD::ATOMIC_LOAD_XOR:
452 case ISD::ATOMIC_LOAD_NAND:
453 case ISD::ATOMIC_LOAD_MIN:
454 case ISD::ATOMIC_LOAD_MAX:
455 case ISD::ATOMIC_LOAD_UMIN:
456 case ISD::ATOMIC_LOAD_UMAX:
457 case ISD::ATOMIC_LOAD:
458 case ISD::ATOMIC_STORE: {
459 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
460 ID.AddInteger(AT->getMemoryVT().getRawBits());
461 ID.AddInteger(AT->getRawSubclassData());
462 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
465 case ISD::PREFETCH: {
466 const MemSDNode *PF = cast<MemSDNode>(N);
467 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
470 case ISD::VECTOR_SHUFFLE: {
471 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
472 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
474 ID.AddInteger(SVN->getMaskElt(i));
477 case ISD::TargetBlockAddress:
478 case ISD::BlockAddress: {
479 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
480 ID.AddPointer(BA->getBlockAddress());
481 ID.AddInteger(BA->getOffset());
482 ID.AddInteger(BA->getTargetFlags());
485 } // end switch (N->getOpcode())
487 // Target specific memory nodes could also have address spaces to check.
488 if (N->isTargetMemoryOpcode())
489 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
492 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
494 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
495 AddNodeIDOpcode(ID, N->getOpcode());
496 // Add the return value info.
497 AddNodeIDValueTypes(ID, N->getVTList());
498 // Add the operand info.
499 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
501 // Handle SDNode leafs with special info.
502 AddNodeIDCustom(ID, N);
505 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
506 /// the CSE map that carries volatility, temporalness, indexing mode, and
507 /// extension/truncation information.
509 static inline unsigned
510 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
511 bool isNonTemporal, bool isInvariant) {
512 assert((ConvType & 3) == ConvType &&
513 "ConvType may not require more than 2 bits!");
514 assert((AM & 7) == AM &&
515 "AM may not require more than 3 bits!");
519 (isNonTemporal << 6) |
523 //===----------------------------------------------------------------------===//
524 // SelectionDAG Class
525 //===----------------------------------------------------------------------===//
527 /// doNotCSE - Return true if CSE should not be performed for this node.
528 static bool doNotCSE(SDNode *N) {
529 if (N->getValueType(0) == MVT::Glue)
530 return true; // Never CSE anything that produces a flag.
532 switch (N->getOpcode()) {
534 case ISD::HANDLENODE:
536 return true; // Never CSE these nodes.
539 // Check that remaining values produced are not flags.
540 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
541 if (N->getValueType(i) == MVT::Glue)
542 return true; // Never CSE anything that produces a flag.
547 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
549 void SelectionDAG::RemoveDeadNodes() {
550 // Create a dummy node (which is not added to allnodes), that adds a reference
551 // to the root node, preventing it from being deleted.
552 HandleSDNode Dummy(getRoot());
554 SmallVector<SDNode*, 128> DeadNodes;
556 // Add all obviously-dead nodes to the DeadNodes worklist.
557 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
559 DeadNodes.push_back(I);
561 RemoveDeadNodes(DeadNodes);
563 // If the root changed (e.g. it was a dead load, update the root).
564 setRoot(Dummy.getValue());
567 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
568 /// given list, and any nodes that become unreachable as a result.
569 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
571 // Process the worklist, deleting the nodes and adding their uses to the
573 while (!DeadNodes.empty()) {
574 SDNode *N = DeadNodes.pop_back_val();
576 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
577 DUL->NodeDeleted(N, 0);
579 // Take the node out of the appropriate CSE map.
580 RemoveNodeFromCSEMaps(N);
582 // Next, brutally remove the operand list. This is safe to do, as there are
583 // no cycles in the graph.
584 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
586 SDNode *Operand = Use.getNode();
589 // Now that we removed this operand, see if there are no uses of it left.
590 if (Operand->use_empty())
591 DeadNodes.push_back(Operand);
598 void SelectionDAG::RemoveDeadNode(SDNode *N){
599 SmallVector<SDNode*, 16> DeadNodes(1, N);
601 // Create a dummy node that adds a reference to the root node, preventing
602 // it from being deleted. (This matters if the root is an operand of the
604 HandleSDNode Dummy(getRoot());
606 RemoveDeadNodes(DeadNodes);
609 void SelectionDAG::DeleteNode(SDNode *N) {
610 // First take this out of the appropriate CSE map.
611 RemoveNodeFromCSEMaps(N);
613 // Finally, remove uses due to operands of this node, remove from the
614 // AllNodes list, and delete the node.
615 DeleteNodeNotInCSEMaps(N);
618 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
619 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
620 assert(N->use_empty() && "Cannot delete a node that is not dead!");
622 // Drop all of the operands and decrement used node's use counts.
628 void SelectionDAG::DeallocateNode(SDNode *N) {
629 if (N->OperandsNeedDelete)
630 delete[] N->OperandList;
632 // Set the opcode to DELETED_NODE to help catch bugs when node
633 // memory is reallocated.
634 N->NodeType = ISD::DELETED_NODE;
636 NodeAllocator.Deallocate(AllNodes.remove(N));
638 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
639 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
640 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
641 DbgVals[i]->setIsInvalidated();
644 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
645 /// correspond to it. This is useful when we're about to delete or repurpose
646 /// the node. We don't want future request for structurally identical nodes
647 /// to return N anymore.
648 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
650 switch (N->getOpcode()) {
651 case ISD::HANDLENODE: return false; // noop.
653 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
654 "Cond code doesn't exist!");
655 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
656 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
658 case ISD::ExternalSymbol:
659 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
661 case ISD::TargetExternalSymbol: {
662 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
663 Erased = TargetExternalSymbols.erase(
664 std::pair<std::string,unsigned char>(ESN->getSymbol(),
665 ESN->getTargetFlags()));
668 case ISD::VALUETYPE: {
669 EVT VT = cast<VTSDNode>(N)->getVT();
670 if (VT.isExtended()) {
671 Erased = ExtendedValueTypeNodes.erase(VT);
673 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
674 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
679 // Remove it from the CSE Map.
680 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
681 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
682 Erased = CSEMap.RemoveNode(N);
686 // Verify that the node was actually in one of the CSE maps, unless it has a
687 // flag result (which cannot be CSE'd) or is one of the special cases that are
688 // not subject to CSE.
689 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
690 !N->isMachineOpcode() && !doNotCSE(N)) {
693 llvm_unreachable("Node is not in map!");
699 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
700 /// maps and modified in place. Add it back to the CSE maps, unless an identical
701 /// node already exists, in which case transfer all its users to the existing
702 /// node. This transfer can potentially trigger recursive merging.
705 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
706 // For node types that aren't CSE'd, just act as if no identical node
709 SDNode *Existing = CSEMap.GetOrInsertNode(N);
711 // If there was already an existing matching node, use ReplaceAllUsesWith
712 // to replace the dead one with the existing one. This can cause
713 // recursive merging of other unrelated nodes down the line.
714 ReplaceAllUsesWith(N, Existing);
716 // N is now dead. Inform the listeners and delete it.
717 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
718 DUL->NodeDeleted(N, Existing);
719 DeleteNodeNotInCSEMaps(N);
724 // If the node doesn't already exist, we updated it. Inform listeners.
725 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
729 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
730 /// were replaced with those specified. If this node is never memoized,
731 /// return null, otherwise return a pointer to the slot it would take. If a
732 /// node already exists with these operands, the slot will be non-null.
733 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
738 SDValue Ops[] = { Op };
740 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
741 AddNodeIDCustom(ID, N);
742 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
746 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
747 /// were replaced with those specified. If this node is never memoized,
748 /// return null, otherwise return a pointer to the slot it would take. If a
749 /// node already exists with these operands, the slot will be non-null.
750 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
751 SDValue Op1, SDValue Op2,
756 SDValue Ops[] = { Op1, Op2 };
758 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
759 AddNodeIDCustom(ID, N);
760 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
765 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
766 /// were replaced with those specified. If this node is never memoized,
767 /// return null, otherwise return a pointer to the slot it would take. If a
768 /// node already exists with these operands, the slot will be non-null.
769 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
770 const SDValue *Ops,unsigned NumOps,
776 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
777 AddNodeIDCustom(ID, N);
778 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
783 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
784 static void VerifyNodeCommon(SDNode *N) {
785 switch (N->getOpcode()) {
788 case ISD::BUILD_PAIR: {
789 EVT VT = N->getValueType(0);
790 assert(N->getNumValues() == 1 && "Too many results!");
791 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
792 "Wrong return type!");
793 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
794 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
795 "Mismatched operand types!");
796 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
797 "Wrong operand type!");
798 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
799 "Wrong return type size");
802 case ISD::BUILD_VECTOR: {
803 assert(N->getNumValues() == 1 && "Too many results!");
804 assert(N->getValueType(0).isVector() && "Wrong return type!");
805 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
806 "Wrong number of operands!");
807 EVT EltVT = N->getValueType(0).getVectorElementType();
808 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
809 assert((I->getValueType() == EltVT ||
810 (EltVT.isInteger() && I->getValueType().isInteger() &&
811 EltVT.bitsLE(I->getValueType()))) &&
812 "Wrong operand type!");
813 assert(I->getValueType() == N->getOperand(0).getValueType() &&
814 "Operands must all have the same type");
821 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
822 static void VerifySDNode(SDNode *N) {
823 // The SDNode allocators cannot be used to allocate nodes with fields that are
824 // not present in an SDNode!
825 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
826 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
827 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
828 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
829 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
830 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
831 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
832 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
833 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
834 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
835 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
836 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
837 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
838 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
839 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
840 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
841 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
842 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
843 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
848 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
850 static void VerifyMachineNode(SDNode *N) {
851 // The MachineNode allocators cannot be used to allocate nodes with fields
852 // that are not present in a MachineNode!
853 // Currently there are no such nodes.
859 /// getEVTAlignment - Compute the default alignment value for the
862 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
863 Type *Ty = VT == MVT::iPTR ?
864 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
865 VT.getTypeForEVT(*getContext());
867 return TM.getTargetLowering()->getDataLayout()->getABITypeAlignment(Ty);
870 // EntryNode could meaningfully have debug info if we can find it...
871 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
872 : TM(tm), TSI(*tm.getSelectionDAGInfo()), TTI(0), OptLevel(OL),
873 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
874 Root(getEntryNode()), UpdateListeners(0) {
875 AllNodes.push_back(&EntryNode);
876 DbgInfo = new SDDbgInfo();
879 void SelectionDAG::init(MachineFunction &mf, const TargetTransformInfo *tti) {
882 Context = &mf.getFunction()->getContext();
885 SelectionDAG::~SelectionDAG() {
886 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
891 void SelectionDAG::allnodes_clear() {
892 assert(&*AllNodes.begin() == &EntryNode);
893 AllNodes.remove(AllNodes.begin());
894 while (!AllNodes.empty())
895 DeallocateNode(AllNodes.begin());
898 void SelectionDAG::clear() {
900 OperandAllocator.Reset();
903 ExtendedValueTypeNodes.clear();
904 ExternalSymbols.clear();
905 TargetExternalSymbols.clear();
906 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
907 static_cast<CondCodeSDNode*>(0));
908 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
909 static_cast<SDNode*>(0));
911 EntryNode.UseList = 0;
912 AllNodes.push_back(&EntryNode);
913 Root = getEntryNode();
917 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
918 return VT.bitsGT(Op.getValueType()) ?
919 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
920 getNode(ISD::TRUNCATE, DL, VT, Op);
923 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
924 return VT.bitsGT(Op.getValueType()) ?
925 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
926 getNode(ISD::TRUNCATE, DL, VT, Op);
929 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
930 return VT.bitsGT(Op.getValueType()) ?
931 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
932 getNode(ISD::TRUNCATE, DL, VT, Op);
935 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
936 assert(!VT.isVector() &&
937 "getZeroExtendInReg should use the vector element type instead of "
939 if (Op.getValueType() == VT) return Op;
940 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
941 APInt Imm = APInt::getLowBitsSet(BitWidth,
943 return getNode(ISD::AND, DL, Op.getValueType(), Op,
944 getConstant(Imm, Op.getValueType()));
947 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
949 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
950 EVT EltVT = VT.getScalarType();
952 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
953 return getNode(ISD::XOR, DL, VT, Val, NegOne);
956 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
957 EVT EltVT = VT.getScalarType();
958 assert((EltVT.getSizeInBits() >= 64 ||
959 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
960 "getConstant with a uint64_t value that doesn't fit in the type!");
961 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
964 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
965 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
968 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
969 assert(VT.isInteger() && "Cannot create FP integer constant!");
971 EVT EltVT = VT.getScalarType();
972 const ConstantInt *Elt = &Val;
974 const TargetLowering *TLI = TM.getTargetLowering();
976 // In some cases the vector type is legal but the element type is illegal and
977 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
978 // inserted value (the type does not need to match the vector element type).
979 // Any extra bits introduced will be truncated away.
980 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
981 TargetLowering::TypePromoteInteger) {
982 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
983 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
984 Elt = ConstantInt::get(*getContext(), NewVal);
987 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
988 "APInt size does not match type size!");
989 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
991 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
995 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
997 return SDValue(N, 0);
1000 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
1001 CSEMap.InsertNode(N, IP);
1002 AllNodes.push_back(N);
1005 SDValue Result(N, 0);
1006 if (VT.isVector()) {
1007 SmallVector<SDValue, 8> Ops;
1008 Ops.assign(VT.getVectorNumElements(), Result);
1009 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size());
1014 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1015 return getConstant(Val, TM.getTargetLowering()->getPointerTy(), isTarget);
1019 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1020 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1023 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1024 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1026 EVT EltVT = VT.getScalarType();
1028 // Do the map lookup using the actual bit pattern for the floating point
1029 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1030 // we don't have issues with SNANs.
1031 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1032 FoldingSetNodeID ID;
1033 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1037 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1039 return SDValue(N, 0);
1042 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1043 CSEMap.InsertNode(N, IP);
1044 AllNodes.push_back(N);
1047 SDValue Result(N, 0);
1048 if (VT.isVector()) {
1049 SmallVector<SDValue, 8> Ops;
1050 Ops.assign(VT.getVectorNumElements(), Result);
1051 // FIXME SDLoc info might be appropriate here
1052 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, &Ops[0], Ops.size());
1057 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1058 EVT EltVT = VT.getScalarType();
1059 if (EltVT==MVT::f32)
1060 return getConstantFP(APFloat((float)Val), VT, isTarget);
1061 else if (EltVT==MVT::f64)
1062 return getConstantFP(APFloat(Val), VT, isTarget);
1063 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1066 APFloat apf = APFloat(Val);
1067 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1069 return getConstantFP(apf, VT, isTarget);
1071 llvm_unreachable("Unsupported type in getConstantFP");
1074 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1075 EVT VT, int64_t Offset,
1077 unsigned char TargetFlags) {
1078 assert((TargetFlags == 0 || isTargetGA) &&
1079 "Cannot set target flags on target-independent globals");
1081 // Truncate (with sign-extension) the offset value to the pointer size.
1082 unsigned BitWidth = TM.getTargetLowering()->getPointerTy().getSizeInBits();
1084 Offset = SignExtend64(Offset, BitWidth);
1086 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1088 // If GV is an alias then use the aliasee for determining thread-localness.
1089 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1090 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1094 if (GVar && GVar->isThreadLocal())
1095 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1097 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1099 FoldingSetNodeID ID;
1100 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1102 ID.AddInteger(Offset);
1103 ID.AddInteger(TargetFlags);
1104 ID.AddInteger(GV->getType()->getAddressSpace());
1106 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1107 return SDValue(E, 0);
1109 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1110 DL.getDebugLoc(), GV, VT,
1111 Offset, TargetFlags);
1112 CSEMap.InsertNode(N, IP);
1113 AllNodes.push_back(N);
1114 return SDValue(N, 0);
1117 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1118 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1119 FoldingSetNodeID ID;
1120 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1123 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1124 return SDValue(E, 0);
1126 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1127 CSEMap.InsertNode(N, IP);
1128 AllNodes.push_back(N);
1129 return SDValue(N, 0);
1132 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1133 unsigned char TargetFlags) {
1134 assert((TargetFlags == 0 || isTarget) &&
1135 "Cannot set target flags on target-independent jump tables");
1136 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1137 FoldingSetNodeID ID;
1138 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1140 ID.AddInteger(TargetFlags);
1142 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1143 return SDValue(E, 0);
1145 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1147 CSEMap.InsertNode(N, IP);
1148 AllNodes.push_back(N);
1149 return SDValue(N, 0);
1152 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1153 unsigned Alignment, int Offset,
1155 unsigned char TargetFlags) {
1156 assert((TargetFlags == 0 || isTarget) &&
1157 "Cannot set target flags on target-independent globals");
1160 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType());
1161 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1162 FoldingSetNodeID ID;
1163 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1164 ID.AddInteger(Alignment);
1165 ID.AddInteger(Offset);
1167 ID.AddInteger(TargetFlags);
1169 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1170 return SDValue(E, 0);
1172 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1173 Alignment, TargetFlags);
1174 CSEMap.InsertNode(N, IP);
1175 AllNodes.push_back(N);
1176 return SDValue(N, 0);
1180 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1181 unsigned Alignment, int Offset,
1183 unsigned char TargetFlags) {
1184 assert((TargetFlags == 0 || isTarget) &&
1185 "Cannot set target flags on target-independent globals");
1188 TM.getTargetLowering()->getDataLayout()->getPrefTypeAlignment(C->getType());
1189 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1190 FoldingSetNodeID ID;
1191 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1192 ID.AddInteger(Alignment);
1193 ID.AddInteger(Offset);
1194 C->addSelectionDAGCSEId(ID);
1195 ID.AddInteger(TargetFlags);
1197 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1198 return SDValue(E, 0);
1200 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1201 Alignment, TargetFlags);
1202 CSEMap.InsertNode(N, IP);
1203 AllNodes.push_back(N);
1204 return SDValue(N, 0);
1207 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1208 unsigned char TargetFlags) {
1209 FoldingSetNodeID ID;
1210 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0);
1211 ID.AddInteger(Index);
1212 ID.AddInteger(Offset);
1213 ID.AddInteger(TargetFlags);
1215 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1216 return SDValue(E, 0);
1218 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1220 CSEMap.InsertNode(N, IP);
1221 AllNodes.push_back(N);
1222 return SDValue(N, 0);
1225 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1226 FoldingSetNodeID ID;
1227 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1230 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1231 return SDValue(E, 0);
1233 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1234 CSEMap.InsertNode(N, IP);
1235 AllNodes.push_back(N);
1236 return SDValue(N, 0);
1239 SDValue SelectionDAG::getValueType(EVT VT) {
1240 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1241 ValueTypeNodes.size())
1242 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1244 SDNode *&N = VT.isExtended() ?
1245 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1247 if (N) return SDValue(N, 0);
1248 N = new (NodeAllocator) VTSDNode(VT);
1249 AllNodes.push_back(N);
1250 return SDValue(N, 0);
1253 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1254 SDNode *&N = ExternalSymbols[Sym];
1255 if (N) return SDValue(N, 0);
1256 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1257 AllNodes.push_back(N);
1258 return SDValue(N, 0);
1261 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1262 unsigned char TargetFlags) {
1264 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1266 if (N) return SDValue(N, 0);
1267 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1268 AllNodes.push_back(N);
1269 return SDValue(N, 0);
1272 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1273 if ((unsigned)Cond >= CondCodeNodes.size())
1274 CondCodeNodes.resize(Cond+1);
1276 if (CondCodeNodes[Cond] == 0) {
1277 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1278 CondCodeNodes[Cond] = N;
1279 AllNodes.push_back(N);
1282 return SDValue(CondCodeNodes[Cond], 0);
1285 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1286 // the shuffle mask M that point at N1 to point at N2, and indices that point
1287 // N2 to point at N1.
1288 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1290 int NElts = M.size();
1291 for (int i = 0; i != NElts; ++i) {
1299 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1300 SDValue N2, const int *Mask) {
1301 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1302 "Invalid VECTOR_SHUFFLE");
1304 // Canonicalize shuffle undef, undef -> undef
1305 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1306 return getUNDEF(VT);
1308 // Validate that all indices in Mask are within the range of the elements
1309 // input to the shuffle.
1310 unsigned NElts = VT.getVectorNumElements();
1311 SmallVector<int, 8> MaskVec;
1312 for (unsigned i = 0; i != NElts; ++i) {
1313 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1314 MaskVec.push_back(Mask[i]);
1317 // Canonicalize shuffle v, v -> v, undef
1320 for (unsigned i = 0; i != NElts; ++i)
1321 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1324 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1325 if (N1.getOpcode() == ISD::UNDEF)
1326 commuteShuffle(N1, N2, MaskVec);
1328 // Canonicalize all index into lhs, -> shuffle lhs, undef
1329 // Canonicalize all index into rhs, -> shuffle rhs, undef
1330 bool AllLHS = true, AllRHS = true;
1331 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1332 for (unsigned i = 0; i != NElts; ++i) {
1333 if (MaskVec[i] >= (int)NElts) {
1338 } else if (MaskVec[i] >= 0) {
1342 if (AllLHS && AllRHS)
1343 return getUNDEF(VT);
1344 if (AllLHS && !N2Undef)
1348 commuteShuffle(N1, N2, MaskVec);
1351 // If Identity shuffle return that node.
1352 bool Identity = true;
1353 for (unsigned i = 0; i != NElts; ++i) {
1354 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1356 if (Identity && NElts)
1359 FoldingSetNodeID ID;
1360 SDValue Ops[2] = { N1, N2 };
1361 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1362 for (unsigned i = 0; i != NElts; ++i)
1363 ID.AddInteger(MaskVec[i]);
1366 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1367 return SDValue(E, 0);
1369 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1370 // SDNode doesn't have access to it. This memory will be "leaked" when
1371 // the node is deallocated, but recovered when the NodeAllocator is released.
1372 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1373 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1375 ShuffleVectorSDNode *N =
1376 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1377 dl.getDebugLoc(), N1, N2,
1379 CSEMap.InsertNode(N, IP);
1380 AllNodes.push_back(N);
1381 return SDValue(N, 0);
1384 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1385 SDValue Val, SDValue DTy,
1386 SDValue STy, SDValue Rnd, SDValue Sat,
1387 ISD::CvtCode Code) {
1388 // If the src and dest types are the same and the conversion is between
1389 // integer types of the same sign or two floats, no conversion is necessary.
1391 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1394 FoldingSetNodeID ID;
1395 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1396 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1398 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1399 return SDValue(E, 0);
1401 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1404 CSEMap.InsertNode(N, IP);
1405 AllNodes.push_back(N);
1406 return SDValue(N, 0);
1409 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1410 FoldingSetNodeID ID;
1411 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1412 ID.AddInteger(RegNo);
1414 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1415 return SDValue(E, 0);
1417 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1418 CSEMap.InsertNode(N, IP);
1419 AllNodes.push_back(N);
1420 return SDValue(N, 0);
1423 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1424 FoldingSetNodeID ID;
1425 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1426 ID.AddPointer(RegMask);
1428 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1429 return SDValue(E, 0);
1431 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1432 CSEMap.InsertNode(N, IP);
1433 AllNodes.push_back(N);
1434 return SDValue(N, 0);
1437 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1438 FoldingSetNodeID ID;
1439 SDValue Ops[] = { Root };
1440 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1441 ID.AddPointer(Label);
1443 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1444 return SDValue(E, 0);
1446 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1447 dl.getDebugLoc(), Root, Label);
1448 CSEMap.InsertNode(N, IP);
1449 AllNodes.push_back(N);
1450 return SDValue(N, 0);
1454 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1457 unsigned char TargetFlags) {
1458 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1460 FoldingSetNodeID ID;
1461 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1463 ID.AddInteger(Offset);
1464 ID.AddInteger(TargetFlags);
1466 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1467 return SDValue(E, 0);
1469 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1471 CSEMap.InsertNode(N, IP);
1472 AllNodes.push_back(N);
1473 return SDValue(N, 0);
1476 SDValue SelectionDAG::getSrcValue(const Value *V) {
1477 assert((!V || V->getType()->isPointerTy()) &&
1478 "SrcValue is not a pointer?");
1480 FoldingSetNodeID ID;
1481 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1485 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1486 return SDValue(E, 0);
1488 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1489 CSEMap.InsertNode(N, IP);
1490 AllNodes.push_back(N);
1491 return SDValue(N, 0);
1494 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1495 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1496 FoldingSetNodeID ID;
1497 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1501 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1502 return SDValue(E, 0);
1504 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1505 CSEMap.InsertNode(N, IP);
1506 AllNodes.push_back(N);
1507 return SDValue(N, 0);
1511 /// getShiftAmountOperand - Return the specified value casted to
1512 /// the target's desired shift amount type.
1513 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1514 EVT OpTy = Op.getValueType();
1515 EVT ShTy = TM.getTargetLowering()->getShiftAmountTy(LHSTy);
1516 if (OpTy == ShTy || OpTy.isVector()) return Op;
1518 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1519 return getNode(Opcode, SDLoc(Op), ShTy, Op);
1522 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1523 /// specified value type.
1524 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1525 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1526 unsigned ByteSize = VT.getStoreSize();
1527 Type *Ty = VT.getTypeForEVT(*getContext());
1528 const TargetLowering *TLI = TM.getTargetLowering();
1529 unsigned StackAlign =
1530 std::max((unsigned)TLI->getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1532 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1533 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1536 /// CreateStackTemporary - Create a stack temporary suitable for holding
1537 /// either of the specified value types.
1538 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1539 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1540 VT2.getStoreSizeInBits())/8;
1541 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1542 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1543 const TargetLowering *TLI = TM.getTargetLowering();
1544 const DataLayout *TD = TLI->getDataLayout();
1545 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1546 TD->getPrefTypeAlignment(Ty2));
1548 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1549 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1550 return getFrameIndex(FrameIdx, TLI->getPointerTy());
1553 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1554 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1555 // These setcc operations always fold.
1559 case ISD::SETFALSE2: return getConstant(0, VT);
1561 case ISD::SETTRUE2: {
1562 const TargetLowering *TLI = TM.getTargetLowering();
1563 TargetLowering::BooleanContent Cnt = TLI->getBooleanContents(VT.isVector());
1565 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, VT);
1578 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1582 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1583 const APInt &C2 = N2C->getAPIntValue();
1584 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1585 const APInt &C1 = N1C->getAPIntValue();
1588 default: llvm_unreachable("Unknown integer setcc!");
1589 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1590 case ISD::SETNE: return getConstant(C1 != C2, VT);
1591 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1592 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1593 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1594 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1595 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1596 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1597 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1598 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1602 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1603 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1604 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1607 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1608 return getUNDEF(VT);
1610 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1611 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1612 return getUNDEF(VT);
1614 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1615 R==APFloat::cmpLessThan, VT);
1616 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1617 return getUNDEF(VT);
1619 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1620 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1621 return getUNDEF(VT);
1623 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1624 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1625 return getUNDEF(VT);
1627 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1628 R==APFloat::cmpEqual, VT);
1629 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1630 return getUNDEF(VT);
1632 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1633 R==APFloat::cmpEqual, VT);
1634 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1635 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1636 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1637 R==APFloat::cmpEqual, VT);
1638 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1639 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1640 R==APFloat::cmpLessThan, VT);
1641 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1642 R==APFloat::cmpUnordered, VT);
1643 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1644 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1647 // Ensure that the constant occurs on the RHS.
1648 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1652 // Could not fold it.
1656 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1657 /// use this predicate to simplify operations downstream.
1658 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1659 // This predicate is not safe for vector operations.
1660 if (Op.getValueType().isVector())
1663 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1664 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1667 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1668 /// this predicate to simplify operations downstream. Mask is known to be zero
1669 /// for bits that V cannot have.
1670 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1671 unsigned Depth) const {
1672 APInt KnownZero, KnownOne;
1673 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1674 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1675 return (KnownZero & Mask) == Mask;
1678 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1679 /// known to be either zero or one and return them in the KnownZero/KnownOne
1680 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1682 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1683 APInt &KnownOne, unsigned Depth) const {
1684 const TargetLowering *TLI = TM.getTargetLowering();
1685 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1687 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1689 return; // Limit search depth.
1691 APInt KnownZero2, KnownOne2;
1693 switch (Op.getOpcode()) {
1695 // We know all of the bits for a constant!
1696 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1697 KnownZero = ~KnownOne;
1700 // If either the LHS or the RHS are Zero, the result is zero.
1701 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1702 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1703 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1704 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1706 // Output known-1 bits are only known if set in both the LHS & RHS.
1707 KnownOne &= KnownOne2;
1708 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1709 KnownZero |= KnownZero2;
1712 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1713 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1714 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1715 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1717 // Output known-0 bits are only known if clear in both the LHS & RHS.
1718 KnownZero &= KnownZero2;
1719 // Output known-1 are known to be set if set in either the LHS | RHS.
1720 KnownOne |= KnownOne2;
1723 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1724 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1725 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1726 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1728 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1729 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1730 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1731 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1732 KnownZero = KnownZeroOut;
1736 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1737 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1738 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1739 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1741 // If low bits are zero in either operand, output low known-0 bits.
1742 // Also compute a conserative estimate for high known-0 bits.
1743 // More trickiness is possible, but this is sufficient for the
1744 // interesting case of alignment computation.
1745 KnownOne.clearAllBits();
1746 unsigned TrailZ = KnownZero.countTrailingOnes() +
1747 KnownZero2.countTrailingOnes();
1748 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1749 KnownZero2.countLeadingOnes(),
1750 BitWidth) - BitWidth;
1752 TrailZ = std::min(TrailZ, BitWidth);
1753 LeadZ = std::min(LeadZ, BitWidth);
1754 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1755 APInt::getHighBitsSet(BitWidth, LeadZ);
1759 // For the purposes of computing leading zeros we can conservatively
1760 // treat a udiv as a logical right shift by the power of 2 known to
1761 // be less than the denominator.
1762 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1763 unsigned LeadZ = KnownZero2.countLeadingOnes();
1765 KnownOne2.clearAllBits();
1766 KnownZero2.clearAllBits();
1767 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1768 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1769 if (RHSUnknownLeadingOnes != BitWidth)
1770 LeadZ = std::min(BitWidth,
1771 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1773 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1777 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1778 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1779 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1780 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1782 // Only known if known in both the LHS and RHS.
1783 KnownOne &= KnownOne2;
1784 KnownZero &= KnownZero2;
1786 case ISD::SELECT_CC:
1787 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1788 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1789 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1790 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1792 // Only known if known in both the LHS and RHS.
1793 KnownOne &= KnownOne2;
1794 KnownZero &= KnownZero2;
1802 if (Op.getResNo() != 1)
1804 // The boolean result conforms to getBooleanContents. Fall through.
1806 // If we know the result of a setcc has the top bits zero, use this info.
1807 if (TLI->getBooleanContents(Op.getValueType().isVector()) ==
1808 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1809 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1812 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1813 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1814 unsigned ShAmt = SA->getZExtValue();
1816 // If the shift count is an invalid immediate, don't do anything.
1817 if (ShAmt >= BitWidth)
1820 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1821 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1822 KnownZero <<= ShAmt;
1824 // low bits known zero.
1825 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1829 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1830 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1831 unsigned ShAmt = SA->getZExtValue();
1833 // If the shift count is an invalid immediate, don't do anything.
1834 if (ShAmt >= BitWidth)
1837 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1838 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1839 KnownZero = KnownZero.lshr(ShAmt);
1840 KnownOne = KnownOne.lshr(ShAmt);
1842 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1843 KnownZero |= HighBits; // High bits known zero.
1847 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1848 unsigned ShAmt = SA->getZExtValue();
1850 // If the shift count is an invalid immediate, don't do anything.
1851 if (ShAmt >= BitWidth)
1854 // If any of the demanded bits are produced by the sign extension, we also
1855 // demand the input sign bit.
1856 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1858 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1859 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1860 KnownZero = KnownZero.lshr(ShAmt);
1861 KnownOne = KnownOne.lshr(ShAmt);
1863 // Handle the sign bits.
1864 APInt SignBit = APInt::getSignBit(BitWidth);
1865 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1867 if (KnownZero.intersects(SignBit)) {
1868 KnownZero |= HighBits; // New bits are known zero.
1869 } else if (KnownOne.intersects(SignBit)) {
1870 KnownOne |= HighBits; // New bits are known one.
1874 case ISD::SIGN_EXTEND_INREG: {
1875 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1876 unsigned EBits = EVT.getScalarType().getSizeInBits();
1878 // Sign extension. Compute the demanded bits in the result that are not
1879 // present in the input.
1880 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1882 APInt InSignBit = APInt::getSignBit(EBits);
1883 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1885 // If the sign extended bits are demanded, we know that the sign
1887 InSignBit = InSignBit.zext(BitWidth);
1888 if (NewBits.getBoolValue())
1889 InputDemandedBits |= InSignBit;
1891 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1892 KnownOne &= InputDemandedBits;
1893 KnownZero &= InputDemandedBits;
1894 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1896 // If the sign bit of the input is known set or clear, then we know the
1897 // top bits of the result.
1898 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1899 KnownZero |= NewBits;
1900 KnownOne &= ~NewBits;
1901 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1902 KnownOne |= NewBits;
1903 KnownZero &= ~NewBits;
1904 } else { // Input sign bit unknown
1905 KnownZero &= ~NewBits;
1906 KnownOne &= ~NewBits;
1911 case ISD::CTTZ_ZERO_UNDEF:
1913 case ISD::CTLZ_ZERO_UNDEF:
1915 unsigned LowBits = Log2_32(BitWidth)+1;
1916 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1917 KnownOne.clearAllBits();
1921 LoadSDNode *LD = cast<LoadSDNode>(Op);
1922 // If this is a ZEXTLoad and we are looking at the loaded value.
1923 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
1924 EVT VT = LD->getMemoryVT();
1925 unsigned MemBits = VT.getScalarType().getSizeInBits();
1926 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1927 } else if (const MDNode *Ranges = LD->getRanges()) {
1928 computeMaskedBitsLoad(*Ranges, KnownZero);
1932 case ISD::ZERO_EXTEND: {
1933 EVT InVT = Op.getOperand(0).getValueType();
1934 unsigned InBits = InVT.getScalarType().getSizeInBits();
1935 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1936 KnownZero = KnownZero.trunc(InBits);
1937 KnownOne = KnownOne.trunc(InBits);
1938 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1939 KnownZero = KnownZero.zext(BitWidth);
1940 KnownOne = KnownOne.zext(BitWidth);
1941 KnownZero |= NewBits;
1944 case ISD::SIGN_EXTEND: {
1945 EVT InVT = Op.getOperand(0).getValueType();
1946 unsigned InBits = InVT.getScalarType().getSizeInBits();
1947 APInt InSignBit = APInt::getSignBit(InBits);
1948 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1950 KnownZero = KnownZero.trunc(InBits);
1951 KnownOne = KnownOne.trunc(InBits);
1952 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1954 // Note if the sign bit is known to be zero or one.
1955 bool SignBitKnownZero = KnownZero.isNegative();
1956 bool SignBitKnownOne = KnownOne.isNegative();
1957 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1958 "Sign bit can't be known to be both zero and one!");
1960 KnownZero = KnownZero.zext(BitWidth);
1961 KnownOne = KnownOne.zext(BitWidth);
1963 // If the sign bit is known zero or one, the top bits match.
1964 if (SignBitKnownZero)
1965 KnownZero |= NewBits;
1966 else if (SignBitKnownOne)
1967 KnownOne |= NewBits;
1970 case ISD::ANY_EXTEND: {
1971 EVT InVT = Op.getOperand(0).getValueType();
1972 unsigned InBits = InVT.getScalarType().getSizeInBits();
1973 KnownZero = KnownZero.trunc(InBits);
1974 KnownOne = KnownOne.trunc(InBits);
1975 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1976 KnownZero = KnownZero.zext(BitWidth);
1977 KnownOne = KnownOne.zext(BitWidth);
1980 case ISD::TRUNCATE: {
1981 EVT InVT = Op.getOperand(0).getValueType();
1982 unsigned InBits = InVT.getScalarType().getSizeInBits();
1983 KnownZero = KnownZero.zext(InBits);
1984 KnownOne = KnownOne.zext(InBits);
1985 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1986 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1987 KnownZero = KnownZero.trunc(BitWidth);
1988 KnownOne = KnownOne.trunc(BitWidth);
1991 case ISD::AssertZext: {
1992 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1993 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1994 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1995 KnownZero |= (~InMask);
1996 KnownOne &= (~KnownZero);
2000 // All bits are zero except the low bit.
2001 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2005 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2006 // We know that the top bits of C-X are clear if X contains less bits
2007 // than C (i.e. no wrap-around can happen). For example, 20-X is
2008 // positive if we can prove that X is >= 0 and < 16.
2009 if (CLHS->getAPIntValue().isNonNegative()) {
2010 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2011 // NLZ can't be BitWidth with no sign bit
2012 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2013 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2015 // If all of the MaskV bits are known to be zero, then we know the
2016 // output top bits are zero, because we now know that the output is
2018 if ((KnownZero2 & MaskV) == MaskV) {
2019 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2020 // Top bits known zero.
2021 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2029 // Output known-0 bits are known if clear or set in both the low clear bits
2030 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2031 // low 3 bits clear.
2032 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2033 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2034 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2036 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2037 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2038 KnownZeroOut = std::min(KnownZeroOut,
2039 KnownZero2.countTrailingOnes());
2041 if (Op.getOpcode() == ISD::ADD) {
2042 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2046 // With ADDE, a carry bit may be added in, so we can only use this
2047 // information if we know (at least) that the low two bits are clear. We
2048 // then return to the caller that the low bit is unknown but that other bits
2050 if (KnownZeroOut >= 2) // ADDE
2051 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2055 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2056 const APInt &RA = Rem->getAPIntValue().abs();
2057 if (RA.isPowerOf2()) {
2058 APInt LowBits = RA - 1;
2059 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2060 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2062 // The low bits of the first operand are unchanged by the srem.
2063 KnownZero = KnownZero2 & LowBits;
2064 KnownOne = KnownOne2 & LowBits;
2066 // If the first operand is non-negative or has all low bits zero, then
2067 // the upper bits are all zero.
2068 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2069 KnownZero |= ~LowBits;
2071 // If the first operand is negative and not all low bits are zero, then
2072 // the upper bits are all one.
2073 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2074 KnownOne |= ~LowBits;
2075 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2080 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2081 const APInt &RA = Rem->getAPIntValue();
2082 if (RA.isPowerOf2()) {
2083 APInt LowBits = (RA - 1);
2084 KnownZero |= ~LowBits;
2085 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2086 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2091 // Since the result is less than or equal to either operand, any leading
2092 // zero bits in either operand must also exist in the result.
2093 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2094 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2096 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2097 KnownZero2.countLeadingOnes());
2098 KnownOne.clearAllBits();
2099 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2102 case ISD::FrameIndex:
2103 case ISD::TargetFrameIndex:
2104 if (unsigned Align = InferPtrAlignment(Op)) {
2105 // The low bits are known zero if the pointer is aligned.
2106 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2112 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2115 case ISD::INTRINSIC_WO_CHAIN:
2116 case ISD::INTRINSIC_W_CHAIN:
2117 case ISD::INTRINSIC_VOID:
2118 // Allow the target to implement this method for its nodes.
2119 TLI->computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2124 /// ComputeNumSignBits - Return the number of times the sign bit of the
2125 /// register is replicated into the other bits. We know that at least 1 bit
2126 /// is always equal to the sign bit (itself), but other cases can give us
2127 /// information. For example, immediately after an "SRA X, 2", we know that
2128 /// the top 3 bits are all equal to each other, so we return 3.
2129 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2130 const TargetLowering *TLI = TM.getTargetLowering();
2131 EVT VT = Op.getValueType();
2132 assert(VT.isInteger() && "Invalid VT!");
2133 unsigned VTBits = VT.getScalarType().getSizeInBits();
2135 unsigned FirstAnswer = 1;
2138 return 1; // Limit search depth.
2140 switch (Op.getOpcode()) {
2142 case ISD::AssertSext:
2143 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2144 return VTBits-Tmp+1;
2145 case ISD::AssertZext:
2146 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2149 case ISD::Constant: {
2150 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2151 return Val.getNumSignBits();
2154 case ISD::SIGN_EXTEND:
2156 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2157 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2159 case ISD::SIGN_EXTEND_INREG:
2160 // Max of the input and what this extends.
2162 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2165 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2166 return std::max(Tmp, Tmp2);
2169 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2170 // SRA X, C -> adds C sign bits.
2171 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2172 Tmp += C->getZExtValue();
2173 if (Tmp > VTBits) Tmp = VTBits;
2177 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2178 // shl destroys sign bits.
2179 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2180 if (C->getZExtValue() >= VTBits || // Bad shift.
2181 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2182 return Tmp - C->getZExtValue();
2187 case ISD::XOR: // NOT is handled here.
2188 // Logical binary ops preserve the number of sign bits at the worst.
2189 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2191 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2192 FirstAnswer = std::min(Tmp, Tmp2);
2193 // We computed what we know about the sign bits as our first
2194 // answer. Now proceed to the generic code that uses
2195 // ComputeMaskedBits, and pick whichever answer is better.
2200 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2201 if (Tmp == 1) return 1; // Early out.
2202 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2203 return std::min(Tmp, Tmp2);
2211 if (Op.getResNo() != 1)
2213 // The boolean result conforms to getBooleanContents. Fall through.
2215 // If setcc returns 0/-1, all bits are sign bits.
2216 if (TLI->getBooleanContents(Op.getValueType().isVector()) ==
2217 TargetLowering::ZeroOrNegativeOneBooleanContent)
2222 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2223 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2225 // Handle rotate right by N like a rotate left by 32-N.
2226 if (Op.getOpcode() == ISD::ROTR)
2227 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2229 // If we aren't rotating out all of the known-in sign bits, return the
2230 // number that are left. This handles rotl(sext(x), 1) for example.
2231 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2232 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2236 // Add can have at most one carry bit. Thus we know that the output
2237 // is, at worst, one more bit than the inputs.
2238 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2239 if (Tmp == 1) return 1; // Early out.
2241 // Special case decrementing a value (ADD X, -1):
2242 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2243 if (CRHS->isAllOnesValue()) {
2244 APInt KnownZero, KnownOne;
2245 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2247 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2249 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2252 // If we are subtracting one from a positive number, there is no carry
2253 // out of the result.
2254 if (KnownZero.isNegative())
2258 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2259 if (Tmp2 == 1) return 1;
2260 return std::min(Tmp, Tmp2)-1;
2263 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2264 if (Tmp2 == 1) return 1;
2267 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2268 if (CLHS->isNullValue()) {
2269 APInt KnownZero, KnownOne;
2270 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2271 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2273 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2276 // If the input is known to be positive (the sign bit is known clear),
2277 // the output of the NEG has the same number of sign bits as the input.
2278 if (KnownZero.isNegative())
2281 // Otherwise, we treat this like a SUB.
2284 // Sub can have at most one carry bit. Thus we know that the output
2285 // is, at worst, one more bit than the inputs.
2286 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2287 if (Tmp == 1) return 1; // Early out.
2288 return std::min(Tmp, Tmp2)-1;
2290 // FIXME: it's tricky to do anything useful for this, but it is an important
2291 // case for targets like X86.
2295 // If we are looking at the loaded value of the SDNode.
2296 if (Op.getResNo() == 0) {
2297 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2298 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2299 unsigned ExtType = LD->getExtensionType();
2302 case ISD::SEXTLOAD: // '17' bits known
2303 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2304 return VTBits-Tmp+1;
2305 case ISD::ZEXTLOAD: // '16' bits known
2306 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2312 // Allow the target to implement this method for its nodes.
2313 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2314 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2315 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2316 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2317 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, Depth);
2318 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2321 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2322 // use this information.
2323 APInt KnownZero, KnownOne;
2324 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2327 if (KnownZero.isNegative()) { // sign bit is 0
2329 } else if (KnownOne.isNegative()) { // sign bit is 1;
2336 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2337 // the number of identical bits in the top of the input value.
2339 Mask <<= Mask.getBitWidth()-VTBits;
2340 // Return # leading zeros. We use 'min' here in case Val was zero before
2341 // shifting. We don't want to return '64' as for an i32 "0".
2342 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2345 /// isBaseWithConstantOffset - Return true if the specified operand is an
2346 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2347 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2348 /// semantics as an ADD. This handles the equivalence:
2349 /// X|Cst == X+Cst iff X&Cst = 0.
2350 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2351 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2352 !isa<ConstantSDNode>(Op.getOperand(1)))
2355 if (Op.getOpcode() == ISD::OR &&
2356 !MaskedValueIsZero(Op.getOperand(0),
2357 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2364 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2365 // If we're told that NaNs won't happen, assume they won't.
2366 if (getTarget().Options.NoNaNsFPMath)
2369 // If the value is a constant, we can obviously see if it is a NaN or not.
2370 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2371 return !C->getValueAPF().isNaN();
2373 // TODO: Recognize more cases here.
2378 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2379 // If the value is a constant, we can obviously see if it is a zero or not.
2380 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2381 return !C->isZero();
2383 // TODO: Recognize more cases here.
2384 switch (Op.getOpcode()) {
2387 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2388 return !C->isNullValue();
2395 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2396 // Check the obvious case.
2397 if (A == B) return true;
2399 // For for negative and positive zero.
2400 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2401 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2402 if (CA->isZero() && CB->isZero()) return true;
2404 // Otherwise they may not be equal.
2408 /// getNode - Gets or creates the specified node.
2410 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2411 FoldingSetNodeID ID;
2412 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2414 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2415 return SDValue(E, 0);
2417 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2418 DL.getDebugLoc(), getVTList(VT));
2419 CSEMap.InsertNode(N, IP);
2421 AllNodes.push_back(N);
2425 return SDValue(N, 0);
2428 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2429 EVT VT, SDValue Operand) {
2430 // Constant fold unary operations with an integer constant operand.
2431 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2432 const APInt &Val = C->getAPIntValue();
2435 case ISD::SIGN_EXTEND:
2436 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2437 case ISD::ANY_EXTEND:
2438 case ISD::ZERO_EXTEND:
2440 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2441 case ISD::UINT_TO_FP:
2442 case ISD::SINT_TO_FP: {
2443 APFloat apf(EVTToAPFloatSemantics(VT),
2444 APInt::getNullValue(VT.getSizeInBits()));
2445 (void)apf.convertFromAPInt(Val,
2446 Opcode==ISD::SINT_TO_FP,
2447 APFloat::rmNearestTiesToEven);
2448 return getConstantFP(apf, VT);
2451 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2452 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), VT);
2453 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2454 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), VT);
2457 return getConstant(Val.byteSwap(), VT);
2459 return getConstant(Val.countPopulation(), VT);
2461 case ISD::CTLZ_ZERO_UNDEF:
2462 return getConstant(Val.countLeadingZeros(), VT);
2464 case ISD::CTTZ_ZERO_UNDEF:
2465 return getConstant(Val.countTrailingZeros(), VT);
2469 // Constant fold unary operations with a floating point constant operand.
2470 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2471 APFloat V = C->getValueAPF(); // make copy
2475 return getConstantFP(V, VT);
2478 return getConstantFP(V, VT);
2480 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2481 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2482 return getConstantFP(V, VT);
2486 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2487 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2488 return getConstantFP(V, VT);
2492 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2493 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2494 return getConstantFP(V, VT);
2497 case ISD::FP_EXTEND: {
2499 // This can return overflow, underflow, or inexact; we don't care.
2500 // FIXME need to be more flexible about rounding mode.
2501 (void)V.convert(EVTToAPFloatSemantics(VT),
2502 APFloat::rmNearestTiesToEven, &ignored);
2503 return getConstantFP(V, VT);
2505 case ISD::FP_TO_SINT:
2506 case ISD::FP_TO_UINT: {
2509 assert(integerPartWidth >= 64);
2510 // FIXME need to be more flexible about rounding mode.
2511 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2512 Opcode==ISD::FP_TO_SINT,
2513 APFloat::rmTowardZero, &ignored);
2514 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2516 APInt api(VT.getSizeInBits(), x);
2517 return getConstant(api, VT);
2520 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2521 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2522 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2523 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2528 unsigned OpOpcode = Operand.getNode()->getOpcode();
2530 case ISD::TokenFactor:
2531 case ISD::MERGE_VALUES:
2532 case ISD::CONCAT_VECTORS:
2533 return Operand; // Factor, merge or concat of one node? No need.
2534 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2535 case ISD::FP_EXTEND:
2536 assert(VT.isFloatingPoint() &&
2537 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2538 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2539 assert((!VT.isVector() ||
2540 VT.getVectorNumElements() ==
2541 Operand.getValueType().getVectorNumElements()) &&
2542 "Vector element count mismatch!");
2543 if (Operand.getOpcode() == ISD::UNDEF)
2544 return getUNDEF(VT);
2546 case ISD::SIGN_EXTEND:
2547 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2548 "Invalid SIGN_EXTEND!");
2549 if (Operand.getValueType() == VT) return Operand; // noop extension
2550 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2551 "Invalid sext node, dst < src!");
2552 assert((!VT.isVector() ||
2553 VT.getVectorNumElements() ==
2554 Operand.getValueType().getVectorNumElements()) &&
2555 "Vector element count mismatch!");
2556 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2557 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2558 else if (OpOpcode == ISD::UNDEF)
2559 // sext(undef) = 0, because the top bits will all be the same.
2560 return getConstant(0, VT);
2562 case ISD::ZERO_EXTEND:
2563 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2564 "Invalid ZERO_EXTEND!");
2565 if (Operand.getValueType() == VT) return Operand; // noop extension
2566 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2567 "Invalid zext node, dst < src!");
2568 assert((!VT.isVector() ||
2569 VT.getVectorNumElements() ==
2570 Operand.getValueType().getVectorNumElements()) &&
2571 "Vector element count mismatch!");
2572 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2573 return getNode(ISD::ZERO_EXTEND, DL, VT,
2574 Operand.getNode()->getOperand(0));
2575 else if (OpOpcode == ISD::UNDEF)
2576 // zext(undef) = 0, because the top bits will be zero.
2577 return getConstant(0, VT);
2579 case ISD::ANY_EXTEND:
2580 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2581 "Invalid ANY_EXTEND!");
2582 if (Operand.getValueType() == VT) return Operand; // noop extension
2583 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2584 "Invalid anyext node, dst < src!");
2585 assert((!VT.isVector() ||
2586 VT.getVectorNumElements() ==
2587 Operand.getValueType().getVectorNumElements()) &&
2588 "Vector element count mismatch!");
2590 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2591 OpOpcode == ISD::ANY_EXTEND)
2592 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2593 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2594 else if (OpOpcode == ISD::UNDEF)
2595 return getUNDEF(VT);
2597 // (ext (trunx x)) -> x
2598 if (OpOpcode == ISD::TRUNCATE) {
2599 SDValue OpOp = Operand.getNode()->getOperand(0);
2600 if (OpOp.getValueType() == VT)
2605 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2606 "Invalid TRUNCATE!");
2607 if (Operand.getValueType() == VT) return Operand; // noop truncate
2608 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2609 "Invalid truncate node, src < dst!");
2610 assert((!VT.isVector() ||
2611 VT.getVectorNumElements() ==
2612 Operand.getValueType().getVectorNumElements()) &&
2613 "Vector element count mismatch!");
2614 if (OpOpcode == ISD::TRUNCATE)
2615 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2616 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2617 OpOpcode == ISD::ANY_EXTEND) {
2618 // If the source is smaller than the dest, we still need an extend.
2619 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2620 .bitsLT(VT.getScalarType()))
2621 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2622 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2623 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2624 return Operand.getNode()->getOperand(0);
2626 if (OpOpcode == ISD::UNDEF)
2627 return getUNDEF(VT);
2630 // Basic sanity checking.
2631 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2632 && "Cannot BITCAST between types of different sizes!");
2633 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2634 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2635 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2636 if (OpOpcode == ISD::UNDEF)
2637 return getUNDEF(VT);
2639 case ISD::SCALAR_TO_VECTOR:
2640 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2641 (VT.getVectorElementType() == Operand.getValueType() ||
2642 (VT.getVectorElementType().isInteger() &&
2643 Operand.getValueType().isInteger() &&
2644 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2645 "Illegal SCALAR_TO_VECTOR node!");
2646 if (OpOpcode == ISD::UNDEF)
2647 return getUNDEF(VT);
2648 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2649 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2650 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2651 Operand.getConstantOperandVal(1) == 0 &&
2652 Operand.getOperand(0).getValueType() == VT)
2653 return Operand.getOperand(0);
2656 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2657 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2658 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2659 Operand.getNode()->getOperand(0));
2660 if (OpOpcode == ISD::FNEG) // --X -> X
2661 return Operand.getNode()->getOperand(0);
2664 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2665 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2670 SDVTList VTs = getVTList(VT);
2671 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2672 FoldingSetNodeID ID;
2673 SDValue Ops[1] = { Operand };
2674 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2676 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2677 return SDValue(E, 0);
2679 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
2680 DL.getDebugLoc(), VTs, Operand);
2681 CSEMap.InsertNode(N, IP);
2683 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
2684 DL.getDebugLoc(), VTs, Operand);
2687 AllNodes.push_back(N);
2691 return SDValue(N, 0);
2694 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, EVT VT,
2695 SDNode *Cst1, SDNode *Cst2) {
2696 SmallVector<std::pair<ConstantSDNode *, ConstantSDNode *>, 4> Inputs;
2697 SmallVector<SDValue, 4> Outputs;
2698 EVT SVT = VT.getScalarType();
2700 ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1);
2701 ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2);
2702 if (Scalar1 && Scalar2) {
2703 // Scalar instruction.
2704 Inputs.push_back(std::make_pair(Scalar1, Scalar2));
2706 // For vectors extract each constant element into Inputs so we can constant
2707 // fold them individually.
2708 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
2709 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
2713 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
2715 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
2716 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
2717 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
2718 if (!V1 || !V2) // Not a constant, bail.
2721 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
2722 // FIXME: This is valid and could be handled by truncating the APInts.
2723 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
2726 Inputs.push_back(std::make_pair(V1, V2));
2730 // We have a number of constant values, constant fold them element by element.
2731 for (unsigned I = 0, E = Inputs.size(); I != E; ++I) {
2732 const APInt &C1 = Inputs[I].first->getAPIntValue();
2733 const APInt &C2 = Inputs[I].second->getAPIntValue();
2737 Outputs.push_back(getConstant(C1 + C2, SVT));
2740 Outputs.push_back(getConstant(C1 - C2, SVT));
2743 Outputs.push_back(getConstant(C1 * C2, SVT));
2746 if (!C2.getBoolValue())
2748 Outputs.push_back(getConstant(C1.udiv(C2), SVT));
2751 if (!C2.getBoolValue())
2753 Outputs.push_back(getConstant(C1.urem(C2), SVT));
2756 if (!C2.getBoolValue())
2758 Outputs.push_back(getConstant(C1.sdiv(C2), SVT));
2761 if (!C2.getBoolValue())
2763 Outputs.push_back(getConstant(C1.srem(C2), SVT));
2766 Outputs.push_back(getConstant(C1 & C2, SVT));
2769 Outputs.push_back(getConstant(C1 | C2, SVT));
2772 Outputs.push_back(getConstant(C1 ^ C2, SVT));
2775 Outputs.push_back(getConstant(C1 << C2, SVT));
2778 Outputs.push_back(getConstant(C1.lshr(C2), SVT));
2781 Outputs.push_back(getConstant(C1.ashr(C2), SVT));
2784 Outputs.push_back(getConstant(C1.rotl(C2), SVT));
2787 Outputs.push_back(getConstant(C1.rotr(C2), SVT));
2794 // Handle the scalar case first.
2795 if (Scalar1 && Scalar2)
2796 return Outputs.back();
2798 // Otherwise build a big vector out of the scalar elements we generated.
2799 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs.data(),
2803 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
2805 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2806 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2809 case ISD::TokenFactor:
2810 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2811 N2.getValueType() == MVT::Other && "Invalid token factor!");
2812 // Fold trivial token factors.
2813 if (N1.getOpcode() == ISD::EntryToken) return N2;
2814 if (N2.getOpcode() == ISD::EntryToken) return N1;
2815 if (N1 == N2) return N1;
2817 case ISD::CONCAT_VECTORS:
2818 // Concat of UNDEFs is UNDEF.
2819 if (N1.getOpcode() == ISD::UNDEF &&
2820 N2.getOpcode() == ISD::UNDEF)
2821 return getUNDEF(VT);
2823 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2824 // one big BUILD_VECTOR.
2825 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2826 N2.getOpcode() == ISD::BUILD_VECTOR) {
2827 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2828 N1.getNode()->op_end());
2829 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2830 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2834 assert(VT.isInteger() && "This operator does not apply to FP types!");
2835 assert(N1.getValueType() == N2.getValueType() &&
2836 N1.getValueType() == VT && "Binary operator types must match!");
2837 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2838 // worth handling here.
2839 if (N2C && N2C->isNullValue())
2841 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2848 assert(VT.isInteger() && "This operator does not apply to FP types!");
2849 assert(N1.getValueType() == N2.getValueType() &&
2850 N1.getValueType() == VT && "Binary operator types must match!");
2851 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2852 // it's worth handling here.
2853 if (N2C && N2C->isNullValue())
2863 assert(VT.isInteger() && "This operator does not apply to FP types!");
2864 assert(N1.getValueType() == N2.getValueType() &&
2865 N1.getValueType() == VT && "Binary operator types must match!");
2872 if (getTarget().Options.UnsafeFPMath) {
2873 if (Opcode == ISD::FADD) {
2875 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2876 if (CFP->getValueAPF().isZero())
2879 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2880 if (CFP->getValueAPF().isZero())
2882 } else if (Opcode == ISD::FSUB) {
2884 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2885 if (CFP->getValueAPF().isZero())
2887 } else if (Opcode == ISD::FMUL) {
2888 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2891 // If the first operand isn't the constant, try the second
2893 CFP = dyn_cast<ConstantFPSDNode>(N2);
2900 return SDValue(CFP,0);
2902 if (CFP->isExactlyValue(1.0))
2907 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2908 assert(N1.getValueType() == N2.getValueType() &&
2909 N1.getValueType() == VT && "Binary operator types must match!");
2911 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2912 assert(N1.getValueType() == VT &&
2913 N1.getValueType().isFloatingPoint() &&
2914 N2.getValueType().isFloatingPoint() &&
2915 "Invalid FCOPYSIGN!");
2922 assert(VT == N1.getValueType() &&
2923 "Shift operators return type must be the same as their first arg");
2924 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2925 "Shifts only work on integers");
2926 assert((!VT.isVector() || VT == N2.getValueType()) &&
2927 "Vector shift amounts must be in the same as their first arg");
2928 // Verify that the shift amount VT is bit enough to hold valid shift
2929 // amounts. This catches things like trying to shift an i1024 value by an
2930 // i8, which is easy to fall into in generic code that uses
2931 // TLI.getShiftAmount().
2932 assert(N2.getValueType().getSizeInBits() >=
2933 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2934 "Invalid use of small shift amount with oversized value!");
2936 // Always fold shifts of i1 values so the code generator doesn't need to
2937 // handle them. Since we know the size of the shift has to be less than the
2938 // size of the value, the shift/rotate count is guaranteed to be zero.
2941 if (N2C && N2C->isNullValue())
2944 case ISD::FP_ROUND_INREG: {
2945 EVT EVT = cast<VTSDNode>(N2)->getVT();
2946 assert(VT == N1.getValueType() && "Not an inreg round!");
2947 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2948 "Cannot FP_ROUND_INREG integer types");
2949 assert(EVT.isVector() == VT.isVector() &&
2950 "FP_ROUND_INREG type should be vector iff the operand "
2952 assert((!EVT.isVector() ||
2953 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2954 "Vector element counts must match in FP_ROUND_INREG");
2955 assert(EVT.bitsLE(VT) && "Not rounding down!");
2957 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2961 assert(VT.isFloatingPoint() &&
2962 N1.getValueType().isFloatingPoint() &&
2963 VT.bitsLE(N1.getValueType()) &&
2964 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2965 if (N1.getValueType() == VT) return N1; // noop conversion.
2967 case ISD::AssertSext:
2968 case ISD::AssertZext: {
2969 EVT EVT = cast<VTSDNode>(N2)->getVT();
2970 assert(VT == N1.getValueType() && "Not an inreg extend!");
2971 assert(VT.isInteger() && EVT.isInteger() &&
2972 "Cannot *_EXTEND_INREG FP types");
2973 assert(!EVT.isVector() &&
2974 "AssertSExt/AssertZExt type should be the vector element type "
2975 "rather than the vector type!");
2976 assert(EVT.bitsLE(VT) && "Not extending!");
2977 if (VT == EVT) return N1; // noop assertion.
2980 case ISD::SIGN_EXTEND_INREG: {
2981 EVT EVT = cast<VTSDNode>(N2)->getVT();
2982 assert(VT == N1.getValueType() && "Not an inreg extend!");
2983 assert(VT.isInteger() && EVT.isInteger() &&
2984 "Cannot *_EXTEND_INREG FP types");
2985 assert(EVT.isVector() == VT.isVector() &&
2986 "SIGN_EXTEND_INREG type should be vector iff the operand "
2988 assert((!EVT.isVector() ||
2989 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2990 "Vector element counts must match in SIGN_EXTEND_INREG");
2991 assert(EVT.bitsLE(VT) && "Not extending!");
2992 if (EVT == VT) return N1; // Not actually extending
2995 APInt Val = N1C->getAPIntValue();
2996 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2997 Val <<= Val.getBitWidth()-FromBits;
2998 Val = Val.ashr(Val.getBitWidth()-FromBits);
2999 return getConstant(Val, VT);
3003 case ISD::EXTRACT_VECTOR_ELT:
3004 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3005 if (N1.getOpcode() == ISD::UNDEF)
3006 return getUNDEF(VT);
3008 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3009 // expanding copies of large vectors from registers.
3011 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3012 N1.getNumOperands() > 0) {
3014 N1.getOperand(0).getValueType().getVectorNumElements();
3015 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3016 N1.getOperand(N2C->getZExtValue() / Factor),
3017 getConstant(N2C->getZExtValue() % Factor,
3018 N2.getValueType()));
3021 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3022 // expanding large vector constants.
3023 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3024 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3026 if (VT != Elt.getValueType())
3027 // If the vector element type is not legal, the BUILD_VECTOR operands
3028 // are promoted and implicitly truncated, and the result implicitly
3029 // extended. Make that explicit here.
3030 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3035 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3036 // operations are lowered to scalars.
3037 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3038 // If the indices are the same, return the inserted element else
3039 // if the indices are known different, extract the element from
3040 // the original vector.
3041 SDValue N1Op2 = N1.getOperand(2);
3042 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
3044 if (N1Op2C && N2C) {
3045 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3046 if (VT == N1.getOperand(1).getValueType())
3047 return N1.getOperand(1);
3049 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3052 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3056 case ISD::EXTRACT_ELEMENT:
3057 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3058 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3059 (N1.getValueType().isInteger() == VT.isInteger()) &&
3060 N1.getValueType() != VT &&
3061 "Wrong types for EXTRACT_ELEMENT!");
3063 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3064 // 64-bit integers into 32-bit parts. Instead of building the extract of
3065 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3066 if (N1.getOpcode() == ISD::BUILD_PAIR)
3067 return N1.getOperand(N2C->getZExtValue());
3069 // EXTRACT_ELEMENT of a constant int is also very common.
3070 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3071 unsigned ElementSize = VT.getSizeInBits();
3072 unsigned Shift = ElementSize * N2C->getZExtValue();
3073 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3074 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3077 case ISD::EXTRACT_SUBVECTOR: {
3079 if (VT.isSimple() && N1.getValueType().isSimple()) {
3080 assert(VT.isVector() && N1.getValueType().isVector() &&
3081 "Extract subvector VTs must be a vectors!");
3082 assert(VT.getVectorElementType() ==
3083 N1.getValueType().getVectorElementType() &&
3084 "Extract subvector VTs must have the same element type!");
3085 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3086 "Extract subvector must be from larger vector to smaller vector!");
3088 if (isa<ConstantSDNode>(Index.getNode())) {
3089 assert((VT.getVectorNumElements() +
3090 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3091 <= N1.getValueType().getVectorNumElements())
3092 && "Extract subvector overflow!");
3095 // Trivial extraction.
3096 if (VT.getSimpleVT() == N1.getSimpleValueType())
3103 // Perform trivial constant folding.
3104 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1.getNode(), N2.getNode());
3105 if (SV.getNode()) return SV;
3107 // Canonicalize constant to RHS if commutative.
3108 if (N1C && !N2C && isCommutativeBinOp(Opcode)) {
3109 std::swap(N1C, N2C);
3113 // Constant fold FP operations.
3114 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3115 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3117 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3118 // Canonicalize constant to RHS if commutative.
3119 std::swap(N1CFP, N2CFP);
3122 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3123 APFloat::opStatus s;
3126 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3127 if (s != APFloat::opInvalidOp)
3128 return getConstantFP(V1, VT);
3131 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3132 if (s!=APFloat::opInvalidOp)
3133 return getConstantFP(V1, VT);
3136 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3137 if (s!=APFloat::opInvalidOp)
3138 return getConstantFP(V1, VT);
3141 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3142 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3143 return getConstantFP(V1, VT);
3146 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3147 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3148 return getConstantFP(V1, VT);
3150 case ISD::FCOPYSIGN:
3152 return getConstantFP(V1, VT);
3157 if (Opcode == ISD::FP_ROUND) {
3158 APFloat V = N1CFP->getValueAPF(); // make copy
3160 // This can return overflow, underflow, or inexact; we don't care.
3161 // FIXME need to be more flexible about rounding mode.
3162 (void)V.convert(EVTToAPFloatSemantics(VT),
3163 APFloat::rmNearestTiesToEven, &ignored);
3164 return getConstantFP(V, VT);
3168 // Canonicalize an UNDEF to the RHS, even over a constant.
3169 if (N1.getOpcode() == ISD::UNDEF) {
3170 if (isCommutativeBinOp(Opcode)) {
3174 case ISD::FP_ROUND_INREG:
3175 case ISD::SIGN_EXTEND_INREG:
3181 return N1; // fold op(undef, arg2) -> undef
3189 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3190 // For vectors, we can't easily build an all zero vector, just return
3197 // Fold a bunch of operators when the RHS is undef.
3198 if (N2.getOpcode() == ISD::UNDEF) {
3201 if (N1.getOpcode() == ISD::UNDEF)
3202 // Handle undef ^ undef -> 0 special case. This is a common
3204 return getConstant(0, VT);
3214 return N2; // fold op(arg1, undef) -> undef
3220 if (getTarget().Options.UnsafeFPMath)
3228 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3229 // For vectors, we can't easily build an all zero vector, just return
3234 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3235 // For vectors, we can't easily build an all one vector, just return
3243 // Memoize this node if possible.
3245 SDVTList VTs = getVTList(VT);
3246 if (VT != MVT::Glue) {
3247 SDValue Ops[] = { N1, N2 };
3248 FoldingSetNodeID ID;
3249 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3251 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3252 return SDValue(E, 0);
3254 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
3255 DL.getDebugLoc(), VTs, N1, N2);
3256 CSEMap.InsertNode(N, IP);
3258 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
3259 DL.getDebugLoc(), VTs, N1, N2);
3262 AllNodes.push_back(N);
3266 return SDValue(N, 0);
3269 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3270 SDValue N1, SDValue N2, SDValue N3) {
3271 // Perform various simplifications.
3272 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3275 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3276 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3277 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3278 if (N1CFP && N2CFP && N3CFP) {
3279 APFloat V1 = N1CFP->getValueAPF();
3280 const APFloat &V2 = N2CFP->getValueAPF();
3281 const APFloat &V3 = N3CFP->getValueAPF();
3282 APFloat::opStatus s =
3283 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3284 if (s != APFloat::opInvalidOp)
3285 return getConstantFP(V1, VT);
3289 case ISD::CONCAT_VECTORS:
3290 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3291 // one big BUILD_VECTOR.
3292 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3293 N2.getOpcode() == ISD::BUILD_VECTOR &&
3294 N3.getOpcode() == ISD::BUILD_VECTOR) {
3295 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3296 N1.getNode()->op_end());
3297 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3298 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3299 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3303 // Use FoldSetCC to simplify SETCC's.
3304 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3305 if (Simp.getNode()) return Simp;
3310 if (N1C->getZExtValue())
3311 return N2; // select true, X, Y -> X
3312 return N3; // select false, X, Y -> Y
3315 if (N2 == N3) return N2; // select C, X, X -> X
3317 case ISD::VECTOR_SHUFFLE:
3318 llvm_unreachable("should use getVectorShuffle constructor!");
3319 case ISD::INSERT_SUBVECTOR: {
3321 if (VT.isSimple() && N1.getValueType().isSimple()
3322 && N2.getValueType().isSimple()) {
3323 assert(VT.isVector() && N1.getValueType().isVector() &&
3324 N2.getValueType().isVector() &&
3325 "Insert subvector VTs must be a vectors");
3326 assert(VT == N1.getValueType() &&
3327 "Dest and insert subvector source types must match!");
3328 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3329 "Insert subvector must be from smaller vector to larger vector!");
3330 if (isa<ConstantSDNode>(Index.getNode())) {
3331 assert((N2.getValueType().getVectorNumElements() +
3332 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3333 <= VT.getVectorNumElements())
3334 && "Insert subvector overflow!");
3337 // Trivial insertion.
3338 if (VT.getSimpleVT() == N2.getSimpleValueType())
3344 // Fold bit_convert nodes from a type to themselves.
3345 if (N1.getValueType() == VT)
3350 // Memoize node if it doesn't produce a flag.
3352 SDVTList VTs = getVTList(VT);
3353 if (VT != MVT::Glue) {
3354 SDValue Ops[] = { N1, N2, N3 };
3355 FoldingSetNodeID ID;
3356 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3358 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3359 return SDValue(E, 0);
3361 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3362 DL.getDebugLoc(), VTs, N1, N2, N3);
3363 CSEMap.InsertNode(N, IP);
3365 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3366 DL.getDebugLoc(), VTs, N1, N2, N3);
3369 AllNodes.push_back(N);
3373 return SDValue(N, 0);
3376 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3377 SDValue N1, SDValue N2, SDValue N3,
3379 SDValue Ops[] = { N1, N2, N3, N4 };
3380 return getNode(Opcode, DL, VT, Ops, 4);
3383 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3384 SDValue N1, SDValue N2, SDValue N3,
3385 SDValue N4, SDValue N5) {
3386 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3387 return getNode(Opcode, DL, VT, Ops, 5);
3390 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3391 /// the incoming stack arguments to be loaded from the stack.
3392 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3393 SmallVector<SDValue, 8> ArgChains;
3395 // Include the original chain at the beginning of the list. When this is
3396 // used by target LowerCall hooks, this helps legalize find the
3397 // CALLSEQ_BEGIN node.
3398 ArgChains.push_back(Chain);
3400 // Add a chain value for each stack argument.
3401 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3402 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3403 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3404 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3405 if (FI->getIndex() < 0)
3406 ArgChains.push_back(SDValue(L, 1));
3408 // Build a tokenfactor for all the chains.
3409 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other,
3410 &ArgChains[0], ArgChains.size());
3413 /// getMemsetValue - Vectorized representation of the memset value
3415 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3417 assert(Value.getOpcode() != ISD::UNDEF);
3419 unsigned NumBits = VT.getScalarType().getSizeInBits();
3420 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3421 assert(C->getAPIntValue().getBitWidth() == 8);
3422 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
3424 return DAG.getConstant(Val, VT);
3425 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), VT);
3428 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3430 // Use a multiplication with 0x010101... to extend the input to the
3432 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
3433 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3439 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3440 /// used when a memcpy is turned into a memset when the source is a constant
3442 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
3443 const TargetLowering &TLI, StringRef Str) {
3444 // Handle vector with all elements zero.
3447 return DAG.getConstant(0, VT);
3448 else if (VT == MVT::f32 || VT == MVT::f64)
3449 return DAG.getConstantFP(0.0, VT);
3450 else if (VT.isVector()) {
3451 unsigned NumElts = VT.getVectorNumElements();
3452 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3453 return DAG.getNode(ISD::BITCAST, dl, VT,
3454 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3457 llvm_unreachable("Expected type!");
3460 assert(!VT.isVector() && "Can't handle vector type here!");
3461 unsigned NumVTBits = VT.getSizeInBits();
3462 unsigned NumVTBytes = NumVTBits / 8;
3463 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3465 APInt Val(NumVTBits, 0);
3466 if (TLI.isLittleEndian()) {
3467 for (unsigned i = 0; i != NumBytes; ++i)
3468 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3470 for (unsigned i = 0; i != NumBytes; ++i)
3471 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3474 // If the "cost" of materializing the integer immediate is 1 or free, then
3475 // it is cost effective to turn the load into the immediate.
3476 const TargetTransformInfo *TTI = DAG.getTargetTransformInfo();
3477 if (TTI->getIntImmCost(Val, VT.getTypeForEVT(*DAG.getContext())) < 2)
3478 return DAG.getConstant(Val, VT);
3479 return SDValue(0, 0);
3482 /// getMemBasePlusOffset - Returns base and offset node for the
3484 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
3485 SelectionDAG &DAG) {
3486 EVT VT = Base.getValueType();
3487 return DAG.getNode(ISD::ADD, dl,
3488 VT, Base, DAG.getConstant(Offset, VT));
3491 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3493 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3494 unsigned SrcDelta = 0;
3495 GlobalAddressSDNode *G = NULL;
3496 if (Src.getOpcode() == ISD::GlobalAddress)
3497 G = cast<GlobalAddressSDNode>(Src);
3498 else if (Src.getOpcode() == ISD::ADD &&
3499 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3500 Src.getOperand(1).getOpcode() == ISD::Constant) {
3501 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3502 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3507 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3510 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3511 /// to replace the memset / memcpy. Return true if the number of memory ops
3512 /// is below the threshold. It returns the types of the sequence of
3513 /// memory ops to perform memset / memcpy by reference.
3514 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3515 unsigned Limit, uint64_t Size,
3516 unsigned DstAlign, unsigned SrcAlign,
3522 const TargetLowering &TLI) {
3523 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3524 "Expecting memcpy / memset source to meet alignment requirement!");
3525 // If 'SrcAlign' is zero, that means the memory operation does not need to
3526 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3527 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3528 // is the specified alignment of the memory operation. If it is zero, that
3529 // means it's possible to change the alignment of the destination.
3530 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3531 // not need to be loaded.
3532 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3533 IsMemset, ZeroMemset, MemcpyStrSrc,
3534 DAG.getMachineFunction());
3536 if (VT == MVT::Other) {
3537 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment() ||
3538 TLI.allowsUnalignedMemoryAccesses(VT)) {
3539 VT = TLI.getPointerTy();
3541 switch (DstAlign & 7) {
3542 case 0: VT = MVT::i64; break;
3543 case 4: VT = MVT::i32; break;
3544 case 2: VT = MVT::i16; break;
3545 default: VT = MVT::i8; break;
3550 while (!TLI.isTypeLegal(LVT))
3551 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3552 assert(LVT.isInteger());
3558 unsigned NumMemOps = 0;
3560 unsigned VTSize = VT.getSizeInBits() / 8;
3561 while (VTSize > Size) {
3562 // For now, only use non-vector load / store's for the left-over pieces.
3567 if (VT.isVector() || VT.isFloatingPoint()) {
3568 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
3569 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
3570 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
3572 else if (NewVT == MVT::i64 &&
3573 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
3574 TLI.isSafeMemOpType(MVT::f64)) {
3575 // i64 is usually not legal on 32-bit targets, but f64 may be.
3583 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
3584 if (NewVT == MVT::i8)
3586 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
3588 NewVTSize = NewVT.getSizeInBits() / 8;
3590 // If the new VT cannot cover all of the remaining bits, then consider
3591 // issuing a (or a pair of) unaligned and overlapping load / store.
3592 // FIXME: Only does this for 64-bit or more since we don't have proper
3593 // cost model for unaligned load / store.
3595 if (NumMemOps && AllowOverlap &&
3596 VTSize >= 8 && NewVTSize < Size &&
3597 TLI.allowsUnalignedMemoryAccesses(VT, &Fast) && Fast)
3605 if (++NumMemOps > Limit)
3608 MemOps.push_back(VT);
3615 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
3616 SDValue Chain, SDValue Dst,
3617 SDValue Src, uint64_t Size,
3618 unsigned Align, bool isVol,
3620 MachinePointerInfo DstPtrInfo,
3621 MachinePointerInfo SrcPtrInfo) {
3622 // Turn a memcpy of undef to nop.
3623 if (Src.getOpcode() == ISD::UNDEF)
3626 // Expand memcpy to a series of load and store ops if the size operand falls
3627 // below a certain threshold.
3628 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3629 // rather than maybe a humongous number of loads and stores.
3630 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3631 std::vector<EVT> MemOps;
3632 bool DstAlignCanChange = false;
3633 MachineFunction &MF = DAG.getMachineFunction();
3634 MachineFrameInfo *MFI = MF.getFrameInfo();
3636 MF.getFunction()->getAttributes().
3637 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3638 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3639 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3640 DstAlignCanChange = true;
3641 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3642 if (Align > SrcAlign)
3645 bool CopyFromStr = isMemSrcFromString(Src, Str);
3646 bool isZeroStr = CopyFromStr && Str.empty();
3647 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3649 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3650 (DstAlignCanChange ? 0 : Align),
3651 (isZeroStr ? 0 : SrcAlign),
3652 false, false, CopyFromStr, true, DAG, TLI))
3655 if (DstAlignCanChange) {
3656 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3657 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3659 // Don't promote to an alignment that would require dynamic stack
3661 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
3662 if (!TRI->needsStackRealignment(MF))
3663 while (NewAlign > Align &&
3664 TLI.getDataLayout()->exceedsNaturalStackAlignment(NewAlign))
3667 if (NewAlign > Align) {
3668 // Give the stack frame object a larger alignment if needed.
3669 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3670 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3675 SmallVector<SDValue, 8> OutChains;
3676 unsigned NumMemOps = MemOps.size();
3677 uint64_t SrcOff = 0, DstOff = 0;
3678 for (unsigned i = 0; i != NumMemOps; ++i) {
3680 unsigned VTSize = VT.getSizeInBits() / 8;
3681 SDValue Value, Store;
3683 if (VTSize > Size) {
3684 // Issuing an unaligned load / store pair that overlaps with the previous
3685 // pair. Adjust the offset accordingly.
3686 assert(i == NumMemOps-1 && i != 0);
3687 SrcOff -= VTSize - Size;
3688 DstOff -= VTSize - Size;
3692 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3693 // It's unlikely a store of a vector immediate can be done in a single
3694 // instruction. It would require a load from a constantpool first.
3695 // We only handle zero vectors here.
3696 // FIXME: Handle other cases where store of vector immediate is done in
3697 // a single instruction.
3698 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3699 if (Value.getNode())
3700 Store = DAG.getStore(Chain, dl, Value,
3701 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
3702 DstPtrInfo.getWithOffset(DstOff), isVol,
3706 if (!Store.getNode()) {
3707 // The type might not be legal for the target. This should only happen
3708 // if the type is smaller than a legal type, as on PPC, so the right
3709 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3710 // to Load/Store if NVT==VT.
3711 // FIXME does the case above also need this?
3712 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3713 assert(NVT.bitsGE(VT));
3714 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3715 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
3716 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3717 MinAlign(SrcAlign, SrcOff));
3718 Store = DAG.getTruncStore(Chain, dl, Value,
3719 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
3720 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3723 OutChains.push_back(Store);
3729 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3730 &OutChains[0], OutChains.size());
3733 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
3734 SDValue Chain, SDValue Dst,
3735 SDValue Src, uint64_t Size,
3736 unsigned Align, bool isVol,
3738 MachinePointerInfo DstPtrInfo,
3739 MachinePointerInfo SrcPtrInfo) {
3740 // Turn a memmove of undef to nop.
3741 if (Src.getOpcode() == ISD::UNDEF)
3744 // Expand memmove to a series of load and store ops if the size operand falls
3745 // below a certain threshold.
3746 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3747 std::vector<EVT> MemOps;
3748 bool DstAlignCanChange = false;
3749 MachineFunction &MF = DAG.getMachineFunction();
3750 MachineFrameInfo *MFI = MF.getFrameInfo();
3751 bool OptSize = MF.getFunction()->getAttributes().
3752 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3753 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3754 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3755 DstAlignCanChange = true;
3756 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3757 if (Align > SrcAlign)
3759 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3761 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3762 (DstAlignCanChange ? 0 : Align), SrcAlign,
3763 false, false, false, false, DAG, TLI))
3766 if (DstAlignCanChange) {
3767 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3768 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3769 if (NewAlign > Align) {
3770 // Give the stack frame object a larger alignment if needed.
3771 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3772 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3777 uint64_t SrcOff = 0, DstOff = 0;
3778 SmallVector<SDValue, 8> LoadValues;
3779 SmallVector<SDValue, 8> LoadChains;
3780 SmallVector<SDValue, 8> OutChains;
3781 unsigned NumMemOps = MemOps.size();
3782 for (unsigned i = 0; i < NumMemOps; i++) {
3784 unsigned VTSize = VT.getSizeInBits() / 8;
3785 SDValue Value, Store;
3787 Value = DAG.getLoad(VT, dl, Chain,
3788 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
3789 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3790 false, false, SrcAlign);
3791 LoadValues.push_back(Value);
3792 LoadChains.push_back(Value.getValue(1));
3795 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3796 &LoadChains[0], LoadChains.size());
3798 for (unsigned i = 0; i < NumMemOps; i++) {
3800 unsigned VTSize = VT.getSizeInBits() / 8;
3801 SDValue Value, Store;
3803 Store = DAG.getStore(Chain, dl, LoadValues[i],
3804 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
3805 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3806 OutChains.push_back(Store);
3810 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3811 &OutChains[0], OutChains.size());
3814 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
3815 SDValue Chain, SDValue Dst,
3816 SDValue Src, uint64_t Size,
3817 unsigned Align, bool isVol,
3818 MachinePointerInfo DstPtrInfo) {
3819 // Turn a memset of undef to nop.
3820 if (Src.getOpcode() == ISD::UNDEF)
3823 // Expand memset to a series of load/store ops if the size operand
3824 // falls below a certain threshold.
3825 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3826 std::vector<EVT> MemOps;
3827 bool DstAlignCanChange = false;
3828 MachineFunction &MF = DAG.getMachineFunction();
3829 MachineFrameInfo *MFI = MF.getFrameInfo();
3830 bool OptSize = MF.getFunction()->getAttributes().
3831 hasAttribute(AttributeSet::FunctionIndex, Attribute::OptimizeForSize);
3832 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3833 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3834 DstAlignCanChange = true;
3836 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3837 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3838 Size, (DstAlignCanChange ? 0 : Align), 0,
3839 true, IsZeroVal, false, true, DAG, TLI))
3842 if (DstAlignCanChange) {
3843 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3844 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3845 if (NewAlign > Align) {
3846 // Give the stack frame object a larger alignment if needed.
3847 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3848 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3853 SmallVector<SDValue, 8> OutChains;
3854 uint64_t DstOff = 0;
3855 unsigned NumMemOps = MemOps.size();
3857 // Find the largest store and generate the bit pattern for it.
3858 EVT LargestVT = MemOps[0];
3859 for (unsigned i = 1; i < NumMemOps; i++)
3860 if (MemOps[i].bitsGT(LargestVT))
3861 LargestVT = MemOps[i];
3862 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3864 for (unsigned i = 0; i < NumMemOps; i++) {
3866 unsigned VTSize = VT.getSizeInBits() / 8;
3867 if (VTSize > Size) {
3868 // Issuing an unaligned load / store pair that overlaps with the previous
3869 // pair. Adjust the offset accordingly.
3870 assert(i == NumMemOps-1 && i != 0);
3871 DstOff -= VTSize - Size;
3874 // If this store is smaller than the largest store see whether we can get
3875 // the smaller value for free with a truncate.
3876 SDValue Value = MemSetValue;
3877 if (VT.bitsLT(LargestVT)) {
3878 if (!LargestVT.isVector() && !VT.isVector() &&
3879 TLI.isTruncateFree(LargestVT, VT))
3880 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3882 Value = getMemsetValue(Src, VT, DAG, dl);
3884 assert(Value.getValueType() == VT && "Value with wrong type.");
3885 SDValue Store = DAG.getStore(Chain, dl, Value,
3886 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
3887 DstPtrInfo.getWithOffset(DstOff),
3888 isVol, false, Align);
3889 OutChains.push_back(Store);
3890 DstOff += VT.getSizeInBits() / 8;
3894 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3895 &OutChains[0], OutChains.size());
3898 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
3899 SDValue Src, SDValue Size,
3900 unsigned Align, bool isVol, bool AlwaysInline,
3901 MachinePointerInfo DstPtrInfo,
3902 MachinePointerInfo SrcPtrInfo) {
3903 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
3905 // Check to see if we should lower the memcpy to loads and stores first.
3906 // For cases within the target-specified limits, this is the best choice.
3907 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3909 // Memcpy with size zero? Just return the original chain.
3910 if (ConstantSize->isNullValue())
3913 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3914 ConstantSize->getZExtValue(),Align,
3915 isVol, false, DstPtrInfo, SrcPtrInfo);
3916 if (Result.getNode())
3920 // Then check to see if we should lower the memcpy with target-specific
3921 // code. If the target chooses to do this, this is the next best.
3923 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3924 isVol, AlwaysInline,
3925 DstPtrInfo, SrcPtrInfo);
3926 if (Result.getNode())
3929 // If we really need inline code and the target declined to provide it,
3930 // use a (potentially long) sequence of loads and stores.
3932 assert(ConstantSize && "AlwaysInline requires a constant size!");
3933 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3934 ConstantSize->getZExtValue(), Align, isVol,
3935 true, DstPtrInfo, SrcPtrInfo);
3938 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3939 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3940 // respect volatile, so they may do things like read or write memory
3941 // beyond the given memory regions. But fixing this isn't easy, and most
3942 // people don't care.
3944 const TargetLowering *TLI = TM.getTargetLowering();
3946 // Emit a library call.
3947 TargetLowering::ArgListTy Args;
3948 TargetLowering::ArgListEntry Entry;
3949 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
3950 Entry.Node = Dst; Args.push_back(Entry);
3951 Entry.Node = Src; Args.push_back(Entry);
3952 Entry.Node = Size; Args.push_back(Entry);
3953 // FIXME: pass in SDLoc
3955 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3956 false, false, false, false, 0,
3957 TLI->getLibcallCallingConv(RTLIB::MEMCPY),
3958 /*isTailCall=*/false,
3959 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3960 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
3961 TLI->getPointerTy()),
3963 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
3965 return CallResult.second;
3968 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
3969 SDValue Src, SDValue Size,
3970 unsigned Align, bool isVol,
3971 MachinePointerInfo DstPtrInfo,
3972 MachinePointerInfo SrcPtrInfo) {
3973 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
3975 // Check to see if we should lower the memmove to loads and stores first.
3976 // For cases within the target-specified limits, this is the best choice.
3977 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3979 // Memmove with size zero? Just return the original chain.
3980 if (ConstantSize->isNullValue())
3984 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3985 ConstantSize->getZExtValue(), Align, isVol,
3986 false, DstPtrInfo, SrcPtrInfo);
3987 if (Result.getNode())
3991 // Then check to see if we should lower the memmove with target-specific
3992 // code. If the target chooses to do this, this is the next best.
3994 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3995 DstPtrInfo, SrcPtrInfo);
3996 if (Result.getNode())
3999 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4000 // not be safe. See memcpy above for more details.
4002 const TargetLowering *TLI = TM.getTargetLowering();
4004 // Emit a library call.
4005 TargetLowering::ArgListTy Args;
4006 TargetLowering::ArgListEntry Entry;
4007 Entry.Ty = TLI->getDataLayout()->getIntPtrType(*getContext());
4008 Entry.Node = Dst; Args.push_back(Entry);
4009 Entry.Node = Src; Args.push_back(Entry);
4010 Entry.Node = Size; Args.push_back(Entry);
4011 // FIXME: pass in SDLoc
4013 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
4014 false, false, false, false, 0,
4015 TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4016 /*isTailCall=*/false,
4017 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
4018 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4019 TLI->getPointerTy()),
4021 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4023 return CallResult.second;
4026 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4027 SDValue Src, SDValue Size,
4028 unsigned Align, bool isVol,
4029 MachinePointerInfo DstPtrInfo) {
4030 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4032 // Check to see if we should lower the memset to stores first.
4033 // For cases within the target-specified limits, this is the best choice.
4034 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4036 // Memset with size zero? Just return the original chain.
4037 if (ConstantSize->isNullValue())
4041 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4042 Align, isVol, DstPtrInfo);
4044 if (Result.getNode())
4048 // Then check to see if we should lower the memset with target-specific
4049 // code. If the target chooses to do this, this is the next best.
4051 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
4053 if (Result.getNode())
4056 // Emit a library call.
4057 const TargetLowering *TLI = TM.getTargetLowering();
4058 Type *IntPtrTy = TLI->getDataLayout()->getIntPtrType(*getContext());
4059 TargetLowering::ArgListTy Args;
4060 TargetLowering::ArgListEntry Entry;
4061 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4062 Args.push_back(Entry);
4063 // Extend or truncate the argument to be an i32 value for the call.
4064 if (Src.getValueType().bitsGT(MVT::i32))
4065 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
4067 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
4069 Entry.Ty = Type::getInt32Ty(*getContext());
4070 Entry.isSExt = true;
4071 Args.push_back(Entry);
4073 Entry.Ty = IntPtrTy;
4074 Entry.isSExt = false;
4075 Args.push_back(Entry);
4076 // FIXME: pass in SDLoc
4078 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
4079 false, false, false, false, 0,
4080 TLI->getLibcallCallingConv(RTLIB::MEMSET),
4081 /*isTailCall=*/false,
4082 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
4083 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4084 TLI->getPointerTy()),
4086 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4088 return CallResult.second;
4091 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4092 SDValue Chain, SDValue Ptr, SDValue Cmp,
4093 SDValue Swp, MachinePointerInfo PtrInfo,
4095 AtomicOrdering Ordering,
4096 SynchronizationScope SynchScope) {
4097 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4098 Alignment = getEVTAlignment(MemVT);
4100 MachineFunction &MF = getMachineFunction();
4102 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE.
4103 // For now, atomics are considered to be volatile always.
4104 // FIXME: Volatile isn't really correct; we should keep track of atomic
4105 // orderings in the memoperand.
4106 unsigned Flags = MachineMemOperand::MOVolatile;
4107 if (Opcode != ISD::ATOMIC_STORE)
4108 Flags |= MachineMemOperand::MOLoad;
4109 if (Opcode != ISD::ATOMIC_LOAD)
4110 Flags |= MachineMemOperand::MOStore;
4112 MachineMemOperand *MMO =
4113 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4115 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
4116 Ordering, SynchScope);
4119 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4121 SDValue Ptr, SDValue Cmp,
4122 SDValue Swp, MachineMemOperand *MMO,
4123 AtomicOrdering Ordering,
4124 SynchronizationScope SynchScope) {
4125 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
4126 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4128 EVT VT = Cmp.getValueType();
4130 SDVTList VTs = getVTList(VT, MVT::Other);
4131 FoldingSetNodeID ID;
4132 ID.AddInteger(MemVT.getRawBits());
4133 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4134 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
4135 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4137 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4138 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4139 return SDValue(E, 0);
4141 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4142 dl.getDebugLoc(), VTs, MemVT,
4143 Chain, Ptr, Cmp, Swp, MMO,
4144 Ordering, SynchScope);
4145 CSEMap.InsertNode(N, IP);
4146 AllNodes.push_back(N);
4147 return SDValue(N, 0);
4150 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4152 SDValue Ptr, SDValue Val,
4153 const Value* PtrVal,
4155 AtomicOrdering Ordering,
4156 SynchronizationScope SynchScope) {
4157 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4158 Alignment = getEVTAlignment(MemVT);
4160 MachineFunction &MF = getMachineFunction();
4161 // An atomic store does not load. An atomic load does not store.
4162 // (An atomicrmw obviously both loads and stores.)
4163 // For now, atomics are considered to be volatile always, and they are
4165 // FIXME: Volatile isn't really correct; we should keep track of atomic
4166 // orderings in the memoperand.
4167 unsigned Flags = MachineMemOperand::MOVolatile;
4168 if (Opcode != ISD::ATOMIC_STORE)
4169 Flags |= MachineMemOperand::MOLoad;
4170 if (Opcode != ISD::ATOMIC_LOAD)
4171 Flags |= MachineMemOperand::MOStore;
4173 MachineMemOperand *MMO =
4174 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4175 MemVT.getStoreSize(), Alignment);
4177 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4178 Ordering, SynchScope);
4181 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4183 SDValue Ptr, SDValue Val,
4184 MachineMemOperand *MMO,
4185 AtomicOrdering Ordering,
4186 SynchronizationScope SynchScope) {
4187 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4188 Opcode == ISD::ATOMIC_LOAD_SUB ||
4189 Opcode == ISD::ATOMIC_LOAD_AND ||
4190 Opcode == ISD::ATOMIC_LOAD_OR ||
4191 Opcode == ISD::ATOMIC_LOAD_XOR ||
4192 Opcode == ISD::ATOMIC_LOAD_NAND ||
4193 Opcode == ISD::ATOMIC_LOAD_MIN ||
4194 Opcode == ISD::ATOMIC_LOAD_MAX ||
4195 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4196 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4197 Opcode == ISD::ATOMIC_SWAP ||
4198 Opcode == ISD::ATOMIC_STORE) &&
4199 "Invalid Atomic Op");
4201 EVT VT = Val.getValueType();
4203 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4204 getVTList(VT, MVT::Other);
4205 FoldingSetNodeID ID;
4206 ID.AddInteger(MemVT.getRawBits());
4207 SDValue Ops[] = {Chain, Ptr, Val};
4208 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
4209 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4211 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4212 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4213 return SDValue(E, 0);
4215 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4216 dl.getDebugLoc(), VTs, MemVT,
4217 Chain, Ptr, Val, MMO,
4218 Ordering, SynchScope);
4219 CSEMap.InsertNode(N, IP);
4220 AllNodes.push_back(N);
4221 return SDValue(N, 0);
4224 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4225 EVT VT, SDValue Chain,
4227 const Value* PtrVal,
4229 AtomicOrdering Ordering,
4230 SynchronizationScope SynchScope) {
4231 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4232 Alignment = getEVTAlignment(MemVT);
4234 MachineFunction &MF = getMachineFunction();
4235 // An atomic store does not load. An atomic load does not store.
4236 // (An atomicrmw obviously both loads and stores.)
4237 // For now, atomics are considered to be volatile always, and they are
4239 // FIXME: Volatile isn't really correct; we should keep track of atomic
4240 // orderings in the memoperand.
4241 unsigned Flags = MachineMemOperand::MOVolatile;
4242 if (Opcode != ISD::ATOMIC_STORE)
4243 Flags |= MachineMemOperand::MOLoad;
4244 if (Opcode != ISD::ATOMIC_LOAD)
4245 Flags |= MachineMemOperand::MOStore;
4247 MachineMemOperand *MMO =
4248 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4249 MemVT.getStoreSize(), Alignment);
4251 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4252 Ordering, SynchScope);
4255 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4256 EVT VT, SDValue Chain,
4258 MachineMemOperand *MMO,
4259 AtomicOrdering Ordering,
4260 SynchronizationScope SynchScope) {
4261 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4263 SDVTList VTs = getVTList(VT, MVT::Other);
4264 FoldingSetNodeID ID;
4265 ID.AddInteger(MemVT.getRawBits());
4266 SDValue Ops[] = {Chain, Ptr};
4267 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4268 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4270 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4271 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4272 return SDValue(E, 0);
4274 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4275 dl.getDebugLoc(), VTs, MemVT,
4276 Chain, Ptr, MMO, Ordering,
4278 CSEMap.InsertNode(N, IP);
4279 AllNodes.push_back(N);
4280 return SDValue(N, 0);
4283 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4284 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4289 SmallVector<EVT, 4> VTs;
4290 VTs.reserve(NumOps);
4291 for (unsigned i = 0; i < NumOps; ++i)
4292 VTs.push_back(Ops[i].getValueType());
4293 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4298 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl,
4299 const EVT *VTs, unsigned NumVTs,
4300 const SDValue *Ops, unsigned NumOps,
4301 EVT MemVT, MachinePointerInfo PtrInfo,
4302 unsigned Align, bool Vol,
4303 bool ReadMem, bool WriteMem) {
4304 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4305 MemVT, PtrInfo, Align, Vol,
4310 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4311 const SDValue *Ops, unsigned NumOps,
4312 EVT MemVT, MachinePointerInfo PtrInfo,
4313 unsigned Align, bool Vol,
4314 bool ReadMem, bool WriteMem) {
4315 if (Align == 0) // Ensure that codegen never sees alignment 0
4316 Align = getEVTAlignment(MemVT);
4318 MachineFunction &MF = getMachineFunction();
4321 Flags |= MachineMemOperand::MOStore;
4323 Flags |= MachineMemOperand::MOLoad;
4325 Flags |= MachineMemOperand::MOVolatile;
4326 MachineMemOperand *MMO =
4327 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4329 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4333 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4334 const SDValue *Ops, unsigned NumOps,
4335 EVT MemVT, MachineMemOperand *MMO) {
4336 assert((Opcode == ISD::INTRINSIC_VOID ||
4337 Opcode == ISD::INTRINSIC_W_CHAIN ||
4338 Opcode == ISD::PREFETCH ||
4339 Opcode == ISD::LIFETIME_START ||
4340 Opcode == ISD::LIFETIME_END ||
4341 (Opcode <= INT_MAX &&
4342 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4343 "Opcode is not a memory-accessing opcode!");
4345 // Memoize the node unless it returns a flag.
4346 MemIntrinsicSDNode *N;
4347 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4348 FoldingSetNodeID ID;
4349 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4350 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4352 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4353 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4354 return SDValue(E, 0);
4357 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4358 dl.getDebugLoc(), VTList, Ops,
4359 NumOps, MemVT, MMO);
4360 CSEMap.InsertNode(N, IP);
4362 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4363 dl.getDebugLoc(), VTList, Ops,
4364 NumOps, MemVT, MMO);
4366 AllNodes.push_back(N);
4367 return SDValue(N, 0);
4370 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4371 /// MachinePointerInfo record from it. This is particularly useful because the
4372 /// code generator has many cases where it doesn't bother passing in a
4373 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4374 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4375 // If this is FI+Offset, we can model it.
4376 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4377 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4379 // If this is (FI+Offset1)+Offset2, we can model it.
4380 if (Ptr.getOpcode() != ISD::ADD ||
4381 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4382 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4383 return MachinePointerInfo();
4385 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4386 return MachinePointerInfo::getFixedStack(FI, Offset+
4387 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4390 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4391 /// MachinePointerInfo record from it. This is particularly useful because the
4392 /// code generator has many cases where it doesn't bother passing in a
4393 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4394 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4395 // If the 'Offset' value isn't a constant, we can't handle this.
4396 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4397 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4398 if (OffsetOp.getOpcode() == ISD::UNDEF)
4399 return InferPointerInfo(Ptr);
4400 return MachinePointerInfo();
4405 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4406 EVT VT, SDLoc dl, SDValue Chain,
4407 SDValue Ptr, SDValue Offset,
4408 MachinePointerInfo PtrInfo, EVT MemVT,
4409 bool isVolatile, bool isNonTemporal, bool isInvariant,
4410 unsigned Alignment, const MDNode *TBAAInfo,
4411 const MDNode *Ranges) {
4412 assert(Chain.getValueType() == MVT::Other &&
4413 "Invalid chain type");
4414 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4415 Alignment = getEVTAlignment(VT);
4417 unsigned Flags = MachineMemOperand::MOLoad;
4419 Flags |= MachineMemOperand::MOVolatile;
4421 Flags |= MachineMemOperand::MONonTemporal;
4423 Flags |= MachineMemOperand::MOInvariant;
4425 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4428 PtrInfo = InferPointerInfo(Ptr, Offset);
4430 MachineFunction &MF = getMachineFunction();
4431 MachineMemOperand *MMO =
4432 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4434 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4438 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4439 EVT VT, SDLoc dl, SDValue Chain,
4440 SDValue Ptr, SDValue Offset, EVT MemVT,
4441 MachineMemOperand *MMO) {
4443 ExtType = ISD::NON_EXTLOAD;
4444 } else if (ExtType == ISD::NON_EXTLOAD) {
4445 assert(VT == MemVT && "Non-extending load from different memory type!");
4448 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4449 "Should only be an extending load, not truncating!");
4450 assert(VT.isInteger() == MemVT.isInteger() &&
4451 "Cannot convert from FP to Int or Int -> FP!");
4452 assert(VT.isVector() == MemVT.isVector() &&
4453 "Cannot use trunc store to convert to or from a vector!");
4454 assert((!VT.isVector() ||
4455 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4456 "Cannot use trunc store to change the number of vector elements!");
4459 bool Indexed = AM != ISD::UNINDEXED;
4460 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4461 "Unindexed load with an offset!");
4463 SDVTList VTs = Indexed ?
4464 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4465 SDValue Ops[] = { Chain, Ptr, Offset };
4466 FoldingSetNodeID ID;
4467 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4468 ID.AddInteger(MemVT.getRawBits());
4469 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4470 MMO->isNonTemporal(),
4471 MMO->isInvariant()));
4472 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4474 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4475 cast<LoadSDNode>(E)->refineAlignment(MMO);
4476 return SDValue(E, 0);
4478 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
4479 dl.getDebugLoc(), VTs, AM, ExtType,
4481 CSEMap.InsertNode(N, IP);
4482 AllNodes.push_back(N);
4483 return SDValue(N, 0);
4486 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
4487 SDValue Chain, SDValue Ptr,
4488 MachinePointerInfo PtrInfo,
4489 bool isVolatile, bool isNonTemporal,
4490 bool isInvariant, unsigned Alignment,
4491 const MDNode *TBAAInfo,
4492 const MDNode *Ranges) {
4493 SDValue Undef = getUNDEF(Ptr.getValueType());
4494 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4495 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4499 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
4500 SDValue Chain, SDValue Ptr,
4501 MachinePointerInfo PtrInfo, EVT MemVT,
4502 bool isVolatile, bool isNonTemporal,
4503 unsigned Alignment, const MDNode *TBAAInfo) {
4504 SDValue Undef = getUNDEF(Ptr.getValueType());
4505 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4506 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4512 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
4513 SDValue Offset, ISD::MemIndexedMode AM) {
4514 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4515 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4516 "Load is already a indexed load!");
4517 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4518 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4519 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4520 false, LD->getAlignment());
4523 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4524 SDValue Ptr, MachinePointerInfo PtrInfo,
4525 bool isVolatile, bool isNonTemporal,
4526 unsigned Alignment, const MDNode *TBAAInfo) {
4527 assert(Chain.getValueType() == MVT::Other &&
4528 "Invalid chain type");
4529 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4530 Alignment = getEVTAlignment(Val.getValueType());
4532 unsigned Flags = MachineMemOperand::MOStore;
4534 Flags |= MachineMemOperand::MOVolatile;
4536 Flags |= MachineMemOperand::MONonTemporal;
4539 PtrInfo = InferPointerInfo(Ptr);
4541 MachineFunction &MF = getMachineFunction();
4542 MachineMemOperand *MMO =
4543 MF.getMachineMemOperand(PtrInfo, Flags,
4544 Val.getValueType().getStoreSize(), Alignment,
4547 return getStore(Chain, dl, Val, Ptr, MMO);
4550 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
4551 SDValue Ptr, MachineMemOperand *MMO) {
4552 assert(Chain.getValueType() == MVT::Other &&
4553 "Invalid chain type");
4554 EVT VT = Val.getValueType();
4555 SDVTList VTs = getVTList(MVT::Other);
4556 SDValue Undef = getUNDEF(Ptr.getValueType());
4557 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4558 FoldingSetNodeID ID;
4559 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4560 ID.AddInteger(VT.getRawBits());
4561 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4562 MMO->isNonTemporal(), MMO->isInvariant()));
4563 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4565 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4566 cast<StoreSDNode>(E)->refineAlignment(MMO);
4567 return SDValue(E, 0);
4569 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4570 dl.getDebugLoc(), VTs,
4571 ISD::UNINDEXED, false, VT, MMO);
4572 CSEMap.InsertNode(N, IP);
4573 AllNodes.push_back(N);
4574 return SDValue(N, 0);
4577 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4578 SDValue Ptr, MachinePointerInfo PtrInfo,
4579 EVT SVT,bool isVolatile, bool isNonTemporal,
4581 const MDNode *TBAAInfo) {
4582 assert(Chain.getValueType() == MVT::Other &&
4583 "Invalid chain type");
4584 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4585 Alignment = getEVTAlignment(SVT);
4587 unsigned Flags = MachineMemOperand::MOStore;
4589 Flags |= MachineMemOperand::MOVolatile;
4591 Flags |= MachineMemOperand::MONonTemporal;
4594 PtrInfo = InferPointerInfo(Ptr);
4596 MachineFunction &MF = getMachineFunction();
4597 MachineMemOperand *MMO =
4598 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4601 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4604 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
4605 SDValue Ptr, EVT SVT,
4606 MachineMemOperand *MMO) {
4607 EVT VT = Val.getValueType();
4609 assert(Chain.getValueType() == MVT::Other &&
4610 "Invalid chain type");
4612 return getStore(Chain, dl, Val, Ptr, MMO);
4614 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4615 "Should only be a truncating store, not extending!");
4616 assert(VT.isInteger() == SVT.isInteger() &&
4617 "Can't do FP-INT conversion!");
4618 assert(VT.isVector() == SVT.isVector() &&
4619 "Cannot use trunc store to convert to or from a vector!");
4620 assert((!VT.isVector() ||
4621 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4622 "Cannot use trunc store to change the number of vector elements!");
4624 SDVTList VTs = getVTList(MVT::Other);
4625 SDValue Undef = getUNDEF(Ptr.getValueType());
4626 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4627 FoldingSetNodeID ID;
4628 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4629 ID.AddInteger(SVT.getRawBits());
4630 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4631 MMO->isNonTemporal(), MMO->isInvariant()));
4632 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4634 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4635 cast<StoreSDNode>(E)->refineAlignment(MMO);
4636 return SDValue(E, 0);
4638 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4639 dl.getDebugLoc(), VTs,
4640 ISD::UNINDEXED, true, SVT, MMO);
4641 CSEMap.InsertNode(N, IP);
4642 AllNodes.push_back(N);
4643 return SDValue(N, 0);
4647 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
4648 SDValue Offset, ISD::MemIndexedMode AM) {
4649 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4650 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4651 "Store is already a indexed store!");
4652 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4653 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4654 FoldingSetNodeID ID;
4655 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4656 ID.AddInteger(ST->getMemoryVT().getRawBits());
4657 ID.AddInteger(ST->getRawSubclassData());
4658 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4660 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4661 return SDValue(E, 0);
4663 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
4664 dl.getDebugLoc(), VTs, AM,
4665 ST->isTruncatingStore(),
4667 ST->getMemOperand());
4668 CSEMap.InsertNode(N, IP);
4669 AllNodes.push_back(N);
4670 return SDValue(N, 0);
4673 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
4674 SDValue Chain, SDValue Ptr,
4677 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4678 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4681 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
4682 const SDUse *Ops, unsigned NumOps) {
4684 case 0: return getNode(Opcode, DL, VT);
4685 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4686 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4687 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4691 // Copy from an SDUse array into an SDValue array for use with
4692 // the regular getNode logic.
4693 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4694 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4697 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
4698 const SDValue *Ops, unsigned NumOps) {
4700 case 0: return getNode(Opcode, DL, VT);
4701 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4702 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4703 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4709 case ISD::SELECT_CC: {
4710 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4711 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4712 "LHS and RHS of condition must have same type!");
4713 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4714 "True and False arms of SelectCC must have same type!");
4715 assert(Ops[2].getValueType() == VT &&
4716 "select_cc node must be of same type as true and false value!");
4720 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4721 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4722 "LHS/RHS of comparison should match types!");
4729 SDVTList VTs = getVTList(VT);
4731 if (VT != MVT::Glue) {
4732 FoldingSetNodeID ID;
4733 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4736 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4737 return SDValue(E, 0);
4739 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4741 CSEMap.InsertNode(N, IP);
4743 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4747 AllNodes.push_back(N);
4751 return SDValue(N, 0);
4754 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
4755 ArrayRef<EVT> ResultTys,
4756 const SDValue *Ops, unsigned NumOps) {
4757 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4761 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
4762 const EVT *VTs, unsigned NumVTs,
4763 const SDValue *Ops, unsigned NumOps) {
4765 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4766 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4769 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
4770 const SDValue *Ops, unsigned NumOps) {
4771 if (VTList.NumVTs == 1)
4772 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4776 // FIXME: figure out how to safely handle things like
4777 // int foo(int x) { return 1 << (x & 255); }
4778 // int bar() { return foo(256); }
4779 case ISD::SRA_PARTS:
4780 case ISD::SRL_PARTS:
4781 case ISD::SHL_PARTS:
4782 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4783 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4784 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4785 else if (N3.getOpcode() == ISD::AND)
4786 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4787 // If the and is only masking out bits that cannot effect the shift,
4788 // eliminate the and.
4789 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4790 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4791 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4797 // Memoize the node unless it returns a flag.
4799 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4800 FoldingSetNodeID ID;
4801 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4803 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4804 return SDValue(E, 0);
4807 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
4808 DL.getDebugLoc(), VTList, Ops[0]);
4809 } else if (NumOps == 2) {
4810 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
4811 DL.getDebugLoc(), VTList, Ops[0],
4813 } else if (NumOps == 3) {
4814 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
4815 DL.getDebugLoc(), VTList, Ops[0],
4818 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4819 VTList, Ops, NumOps);
4821 CSEMap.InsertNode(N, IP);
4824 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
4825 DL.getDebugLoc(), VTList, Ops[0]);
4826 } else if (NumOps == 2) {
4827 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
4828 DL.getDebugLoc(), VTList, Ops[0],
4830 } else if (NumOps == 3) {
4831 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
4832 DL.getDebugLoc(), VTList, Ops[0],
4835 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
4836 VTList, Ops, NumOps);
4839 AllNodes.push_back(N);
4843 return SDValue(N, 0);
4846 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
4847 return getNode(Opcode, DL, VTList, 0, 0);
4850 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
4852 SDValue Ops[] = { N1 };
4853 return getNode(Opcode, DL, VTList, Ops, 1);
4856 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
4857 SDValue N1, SDValue N2) {
4858 SDValue Ops[] = { N1, N2 };
4859 return getNode(Opcode, DL, VTList, Ops, 2);
4862 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
4863 SDValue N1, SDValue N2, SDValue N3) {
4864 SDValue Ops[] = { N1, N2, N3 };
4865 return getNode(Opcode, DL, VTList, Ops, 3);
4868 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
4869 SDValue N1, SDValue N2, SDValue N3,
4871 SDValue Ops[] = { N1, N2, N3, N4 };
4872 return getNode(Opcode, DL, VTList, Ops, 4);
4875 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
4876 SDValue N1, SDValue N2, SDValue N3,
4877 SDValue N4, SDValue N5) {
4878 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4879 return getNode(Opcode, DL, VTList, Ops, 5);
4882 SDVTList SelectionDAG::getVTList(EVT VT) {
4883 return makeVTList(SDNode::getValueTypeList(VT), 1);
4886 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4887 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4888 E = VTList.rend(); I != E; ++I)
4889 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4892 EVT *Array = Allocator.Allocate<EVT>(2);
4895 SDVTList Result = makeVTList(Array, 2);
4896 VTList.push_back(Result);
4900 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4901 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4902 E = VTList.rend(); I != E; ++I)
4903 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4907 EVT *Array = Allocator.Allocate<EVT>(3);
4911 SDVTList Result = makeVTList(Array, 3);
4912 VTList.push_back(Result);
4916 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4917 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4918 E = VTList.rend(); I != E; ++I)
4919 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4920 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4923 EVT *Array = Allocator.Allocate<EVT>(4);
4928 SDVTList Result = makeVTList(Array, 4);
4929 VTList.push_back(Result);
4933 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4935 case 0: llvm_unreachable("Cannot have nodes without results!");
4936 case 1: return getVTList(VTs[0]);
4937 case 2: return getVTList(VTs[0], VTs[1]);
4938 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4939 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4943 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4944 E = VTList.rend(); I != E; ++I) {
4945 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4948 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2]))
4952 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4953 std::copy(VTs, VTs+NumVTs, Array);
4954 SDVTList Result = makeVTList(Array, NumVTs);
4955 VTList.push_back(Result);
4960 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4961 /// specified operands. If the resultant node already exists in the DAG,
4962 /// this does not modify the specified node, instead it returns the node that
4963 /// already exists. If the resultant node does not exist in the DAG, the
4964 /// input node is returned. As a degenerate case, if you specify the same
4965 /// input operands as the node already has, the input node is returned.
4966 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4967 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4969 // Check to see if there is no change.
4970 if (Op == N->getOperand(0)) return N;
4972 // See if the modified node already exists.
4973 void *InsertPos = 0;
4974 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4977 // Nope it doesn't. Remove the node from its current place in the maps.
4979 if (!RemoveNodeFromCSEMaps(N))
4982 // Now we update the operands.
4983 N->OperandList[0].set(Op);
4985 // If this gets put into a CSE map, add it.
4986 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4990 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4991 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4993 // Check to see if there is no change.
4994 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4995 return N; // No operands changed, just return the input node.
4997 // See if the modified node already exists.
4998 void *InsertPos = 0;
4999 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5002 // Nope it doesn't. Remove the node from its current place in the maps.
5004 if (!RemoveNodeFromCSEMaps(N))
5007 // Now we update the operands.
5008 if (N->OperandList[0] != Op1)
5009 N->OperandList[0].set(Op1);
5010 if (N->OperandList[1] != Op2)
5011 N->OperandList[1].set(Op2);
5013 // If this gets put into a CSE map, add it.
5014 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5018 SDNode *SelectionDAG::
5019 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5020 SDValue Ops[] = { Op1, Op2, Op3 };
5021 return UpdateNodeOperands(N, Ops, 3);
5024 SDNode *SelectionDAG::
5025 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5026 SDValue Op3, SDValue Op4) {
5027 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5028 return UpdateNodeOperands(N, Ops, 4);
5031 SDNode *SelectionDAG::
5032 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5033 SDValue Op3, SDValue Op4, SDValue Op5) {
5034 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5035 return UpdateNodeOperands(N, Ops, 5);
5038 SDNode *SelectionDAG::
5039 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
5040 assert(N->getNumOperands() == NumOps &&
5041 "Update with wrong number of operands");
5043 // Check to see if there is no change.
5044 bool AnyChange = false;
5045 for (unsigned i = 0; i != NumOps; ++i) {
5046 if (Ops[i] != N->getOperand(i)) {
5052 // No operands changed, just return the input node.
5053 if (!AnyChange) return N;
5055 // See if the modified node already exists.
5056 void *InsertPos = 0;
5057 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
5060 // Nope it doesn't. Remove the node from its current place in the maps.
5062 if (!RemoveNodeFromCSEMaps(N))
5065 // Now we update the operands.
5066 for (unsigned i = 0; i != NumOps; ++i)
5067 if (N->OperandList[i] != Ops[i])
5068 N->OperandList[i].set(Ops[i]);
5070 // If this gets put into a CSE map, add it.
5071 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5075 /// DropOperands - Release the operands and set this node to have
5077 void SDNode::DropOperands() {
5078 // Unlike the code in MorphNodeTo that does this, we don't need to
5079 // watch for dead nodes here.
5080 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5086 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5089 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5091 SDVTList VTs = getVTList(VT);
5092 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
5095 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5096 EVT VT, SDValue Op1) {
5097 SDVTList VTs = getVTList(VT);
5098 SDValue Ops[] = { Op1 };
5099 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
5102 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5103 EVT VT, SDValue Op1,
5105 SDVTList VTs = getVTList(VT);
5106 SDValue Ops[] = { Op1, Op2 };
5107 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
5110 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5111 EVT VT, SDValue Op1,
5112 SDValue Op2, SDValue Op3) {
5113 SDVTList VTs = getVTList(VT);
5114 SDValue Ops[] = { Op1, Op2, Op3 };
5115 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5118 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5119 EVT VT, const SDValue *Ops,
5121 SDVTList VTs = getVTList(VT);
5122 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5125 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5126 EVT VT1, EVT VT2, const SDValue *Ops,
5128 SDVTList VTs = getVTList(VT1, VT2);
5129 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5132 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5134 SDVTList VTs = getVTList(VT1, VT2);
5135 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
5138 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5139 EVT VT1, EVT VT2, EVT VT3,
5140 const SDValue *Ops, unsigned NumOps) {
5141 SDVTList VTs = getVTList(VT1, VT2, VT3);
5142 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5145 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5146 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5147 const SDValue *Ops, unsigned NumOps) {
5148 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5149 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
5152 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5155 SDVTList VTs = getVTList(VT1, VT2);
5156 SDValue Ops[] = { Op1 };
5157 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
5160 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5162 SDValue Op1, SDValue Op2) {
5163 SDVTList VTs = getVTList(VT1, VT2);
5164 SDValue Ops[] = { Op1, Op2 };
5165 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
5168 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5170 SDValue Op1, SDValue Op2,
5172 SDVTList VTs = getVTList(VT1, VT2);
5173 SDValue Ops[] = { Op1, Op2, Op3 };
5174 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5177 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5178 EVT VT1, EVT VT2, EVT VT3,
5179 SDValue Op1, SDValue Op2,
5181 SDVTList VTs = getVTList(VT1, VT2, VT3);
5182 SDValue Ops[] = { Op1, Op2, Op3 };
5183 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5186 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5187 SDVTList VTs, const SDValue *Ops,
5189 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
5190 // Reset the NodeID to -1.
5195 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5196 /// the line number information on the merged node since it is not possible to
5197 /// preserve the information that operation is associated with multiple lines.
5198 /// This will make the debugger working better at -O0, were there is a higher
5199 /// probability having other instructions associated with that line.
5201 /// For IROrder, we keep the smaller of the two
5202 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5203 DebugLoc NLoc = N->getDebugLoc();
5204 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) &&
5205 (OLoc.getDebugLoc() != NLoc)) {
5206 N->setDebugLoc(DebugLoc());
5208 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5209 N->setIROrder(Order);
5213 /// MorphNodeTo - This *mutates* the specified node to have the specified
5214 /// return type, opcode, and operands.
5216 /// Note that MorphNodeTo returns the resultant node. If there is already a
5217 /// node of the specified opcode and operands, it returns that node instead of
5218 /// the current one. Note that the SDLoc need not be the same.
5220 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5221 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5222 /// node, and because it doesn't require CSE recalculation for any of
5223 /// the node's users.
5225 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5226 SDVTList VTs, const SDValue *Ops,
5228 // If an identical node already exists, use it.
5230 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5231 FoldingSetNodeID ID;
5232 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
5233 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5234 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5237 if (!RemoveNodeFromCSEMaps(N))
5240 // Start the morphing.
5242 N->ValueList = VTs.VTs;
5243 N->NumValues = VTs.NumVTs;
5245 // Clear the operands list, updating used nodes to remove this from their
5246 // use list. Keep track of any operands that become dead as a result.
5247 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5248 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5250 SDNode *Used = Use.getNode();
5252 if (Used->use_empty())
5253 DeadNodeSet.insert(Used);
5256 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5257 // Initialize the memory references information.
5258 MN->setMemRefs(0, 0);
5259 // If NumOps is larger than the # of operands we can have in a
5260 // MachineSDNode, reallocate the operand list.
5261 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5262 if (MN->OperandsNeedDelete)
5263 delete[] MN->OperandList;
5264 if (NumOps > array_lengthof(MN->LocalOperands))
5265 // We're creating a final node that will live unmorphed for the
5266 // remainder of the current SelectionDAG iteration, so we can allocate
5267 // the operands directly out of a pool with no recycling metadata.
5268 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5271 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5272 MN->OperandsNeedDelete = false;
5274 MN->InitOperands(MN->OperandList, Ops, NumOps);
5276 // If NumOps is larger than the # of operands we currently have, reallocate
5277 // the operand list.
5278 if (NumOps > N->NumOperands) {
5279 if (N->OperandsNeedDelete)
5280 delete[] N->OperandList;
5281 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5282 N->OperandsNeedDelete = true;
5284 N->InitOperands(N->OperandList, Ops, NumOps);
5287 // Delete any nodes that are still dead after adding the uses for the
5289 if (!DeadNodeSet.empty()) {
5290 SmallVector<SDNode *, 16> DeadNodes;
5291 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5292 E = DeadNodeSet.end(); I != E; ++I)
5293 if ((*I)->use_empty())
5294 DeadNodes.push_back(*I);
5295 RemoveDeadNodes(DeadNodes);
5299 CSEMap.InsertNode(N, IP); // Memoize the new node.
5304 /// getMachineNode - These are used for target selectors to create a new node
5305 /// with specified return type(s), MachineInstr opcode, and operands.
5307 /// Note that getMachineNode returns the resultant node. If there is already a
5308 /// node of the specified opcode and operands, it returns that node instead of
5309 /// the current one.
5311 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
5312 SDVTList VTs = getVTList(VT);
5313 return getMachineNode(Opcode, dl, VTs, None);
5317 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
5318 SDVTList VTs = getVTList(VT);
5319 SDValue Ops[] = { Op1 };
5320 return getMachineNode(Opcode, dl, VTs, Ops);
5324 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5325 SDValue Op1, SDValue Op2) {
5326 SDVTList VTs = getVTList(VT);
5327 SDValue Ops[] = { Op1, Op2 };
5328 return getMachineNode(Opcode, dl, VTs, Ops);
5332 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5333 SDValue Op1, SDValue Op2, SDValue Op3) {
5334 SDVTList VTs = getVTList(VT);
5335 SDValue Ops[] = { Op1, Op2, Op3 };
5336 return getMachineNode(Opcode, dl, VTs, Ops);
5340 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
5341 ArrayRef<SDValue> Ops) {
5342 SDVTList VTs = getVTList(VT);
5343 return getMachineNode(Opcode, dl, VTs, Ops);
5347 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
5348 SDVTList VTs = getVTList(VT1, VT2);
5349 return getMachineNode(Opcode, dl, VTs, None);
5353 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5354 EVT VT1, EVT VT2, SDValue Op1) {
5355 SDVTList VTs = getVTList(VT1, VT2);
5356 SDValue Ops[] = { Op1 };
5357 return getMachineNode(Opcode, dl, VTs, Ops);
5361 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5362 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5363 SDVTList VTs = getVTList(VT1, VT2);
5364 SDValue Ops[] = { Op1, Op2 };
5365 return getMachineNode(Opcode, dl, VTs, Ops);
5369 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5370 EVT VT1, EVT VT2, SDValue Op1,
5371 SDValue Op2, SDValue Op3) {
5372 SDVTList VTs = getVTList(VT1, VT2);
5373 SDValue Ops[] = { Op1, Op2, Op3 };
5374 return getMachineNode(Opcode, dl, VTs, Ops);
5378 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5380 ArrayRef<SDValue> Ops) {
5381 SDVTList VTs = getVTList(VT1, VT2);
5382 return getMachineNode(Opcode, dl, VTs, Ops);
5386 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5387 EVT VT1, EVT VT2, EVT VT3,
5388 SDValue Op1, SDValue Op2) {
5389 SDVTList VTs = getVTList(VT1, VT2, VT3);
5390 SDValue Ops[] = { Op1, Op2 };
5391 return getMachineNode(Opcode, dl, VTs, Ops);
5395 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5396 EVT VT1, EVT VT2, EVT VT3,
5397 SDValue Op1, SDValue Op2, SDValue Op3) {
5398 SDVTList VTs = getVTList(VT1, VT2, VT3);
5399 SDValue Ops[] = { Op1, Op2, Op3 };
5400 return getMachineNode(Opcode, dl, VTs, Ops);
5404 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5405 EVT VT1, EVT VT2, EVT VT3,
5406 ArrayRef<SDValue> Ops) {
5407 SDVTList VTs = getVTList(VT1, VT2, VT3);
5408 return getMachineNode(Opcode, dl, VTs, Ops);
5412 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
5413 EVT VT2, EVT VT3, EVT VT4,
5414 ArrayRef<SDValue> Ops) {
5415 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5416 return getMachineNode(Opcode, dl, VTs, Ops);
5420 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
5421 ArrayRef<EVT> ResultTys,
5422 ArrayRef<SDValue> Ops) {
5423 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5424 return getMachineNode(Opcode, dl, VTs, Ops);
5428 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
5429 ArrayRef<SDValue> OpsArray) {
5430 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5433 const SDValue *Ops = OpsArray.data();
5434 unsigned NumOps = OpsArray.size();
5437 FoldingSetNodeID ID;
5438 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5440 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5441 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
5445 // Allocate a new MachineSDNode.
5446 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
5447 DL.getDebugLoc(), VTs);
5449 // Initialize the operands list.
5450 if (NumOps > array_lengthof(N->LocalOperands))
5451 // We're creating a final node that will live unmorphed for the
5452 // remainder of the current SelectionDAG iteration, so we can allocate
5453 // the operands directly out of a pool with no recycling metadata.
5454 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5457 N->InitOperands(N->LocalOperands, Ops, NumOps);
5458 N->OperandsNeedDelete = false;
5461 CSEMap.InsertNode(N, IP);
5463 AllNodes.push_back(N);
5465 VerifyMachineNode(N);
5470 /// getTargetExtractSubreg - A convenience function for creating
5471 /// TargetOpcode::EXTRACT_SUBREG nodes.
5473 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
5475 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5476 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5477 VT, Operand, SRIdxVal);
5478 return SDValue(Subreg, 0);
5481 /// getTargetInsertSubreg - A convenience function for creating
5482 /// TargetOpcode::INSERT_SUBREG nodes.
5484 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
5485 SDValue Operand, SDValue Subreg) {
5486 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5487 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5488 VT, Operand, Subreg, SRIdxVal);
5489 return SDValue(Result, 0);
5492 /// getNodeIfExists - Get the specified node if it's already available, or
5493 /// else return NULL.
5494 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5495 const SDValue *Ops, unsigned NumOps) {
5496 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5497 FoldingSetNodeID ID;
5498 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5500 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5506 /// getDbgValue - Creates a SDDbgValue node.
5509 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5510 DebugLoc DL, unsigned O) {
5511 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5515 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5516 DebugLoc DL, unsigned O) {
5517 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5521 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5522 DebugLoc DL, unsigned O) {
5523 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5528 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5529 /// pointed to by a use iterator is deleted, increment the use iterator
5530 /// so that it doesn't dangle.
5532 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5533 SDNode::use_iterator &UI;
5534 SDNode::use_iterator &UE;
5536 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5537 // Increment the iterator as needed.
5538 while (UI != UE && N == *UI)
5543 RAUWUpdateListener(SelectionDAG &d,
5544 SDNode::use_iterator &ui,
5545 SDNode::use_iterator &ue)
5546 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5551 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5552 /// This can cause recursive merging of nodes in the DAG.
5554 /// This version assumes From has a single result value.
5556 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5557 SDNode *From = FromN.getNode();
5558 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5559 "Cannot replace with this method!");
5560 assert(From != To.getNode() && "Cannot replace uses of with self");
5562 // Iterate over all the existing uses of From. New uses will be added
5563 // to the beginning of the use list, which we avoid visiting.
5564 // This specifically avoids visiting uses of From that arise while the
5565 // replacement is happening, because any such uses would be the result
5566 // of CSE: If an existing node looks like From after one of its operands
5567 // is replaced by To, we don't want to replace of all its users with To
5568 // too. See PR3018 for more info.
5569 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5570 RAUWUpdateListener Listener(*this, UI, UE);
5574 // This node is about to morph, remove its old self from the CSE maps.
5575 RemoveNodeFromCSEMaps(User);
5577 // A user can appear in a use list multiple times, and when this
5578 // happens the uses are usually next to each other in the list.
5579 // To help reduce the number of CSE recomputations, process all
5580 // the uses of this user that we can find this way.
5582 SDUse &Use = UI.getUse();
5585 } while (UI != UE && *UI == User);
5587 // Now that we have modified User, add it back to the CSE maps. If it
5588 // already exists there, recursively merge the results together.
5589 AddModifiedNodeToCSEMaps(User);
5592 // If we just RAUW'd the root, take note.
5593 if (FromN == getRoot())
5597 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5598 /// This can cause recursive merging of nodes in the DAG.
5600 /// This version assumes that for each value of From, there is a
5601 /// corresponding value in To in the same position with the same type.
5603 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5605 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5606 assert((!From->hasAnyUseOfValue(i) ||
5607 From->getValueType(i) == To->getValueType(i)) &&
5608 "Cannot use this version of ReplaceAllUsesWith!");
5611 // Handle the trivial case.
5615 // Iterate over just the existing users of From. See the comments in
5616 // the ReplaceAllUsesWith above.
5617 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5618 RAUWUpdateListener Listener(*this, UI, UE);
5622 // This node is about to morph, remove its old self from the CSE maps.
5623 RemoveNodeFromCSEMaps(User);
5625 // A user can appear in a use list multiple times, and when this
5626 // happens the uses are usually next to each other in the list.
5627 // To help reduce the number of CSE recomputations, process all
5628 // the uses of this user that we can find this way.
5630 SDUse &Use = UI.getUse();
5633 } while (UI != UE && *UI == User);
5635 // Now that we have modified User, add it back to the CSE maps. If it
5636 // already exists there, recursively merge the results together.
5637 AddModifiedNodeToCSEMaps(User);
5640 // If we just RAUW'd the root, take note.
5641 if (From == getRoot().getNode())
5642 setRoot(SDValue(To, getRoot().getResNo()));
5645 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5646 /// This can cause recursive merging of nodes in the DAG.
5648 /// This version can replace From with any result values. To must match the
5649 /// number and types of values returned by From.
5650 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5651 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5652 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5654 // Iterate over just the existing users of From. See the comments in
5655 // the ReplaceAllUsesWith above.
5656 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5657 RAUWUpdateListener Listener(*this, UI, UE);
5661 // This node is about to morph, remove its old self from the CSE maps.
5662 RemoveNodeFromCSEMaps(User);
5664 // A user can appear in a use list multiple times, and when this
5665 // happens the uses are usually next to each other in the list.
5666 // To help reduce the number of CSE recomputations, process all
5667 // the uses of this user that we can find this way.
5669 SDUse &Use = UI.getUse();
5670 const SDValue &ToOp = To[Use.getResNo()];
5673 } while (UI != UE && *UI == User);
5675 // Now that we have modified User, add it back to the CSE maps. If it
5676 // already exists there, recursively merge the results together.
5677 AddModifiedNodeToCSEMaps(User);
5680 // If we just RAUW'd the root, take note.
5681 if (From == getRoot().getNode())
5682 setRoot(SDValue(To[getRoot().getResNo()]));
5685 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5686 /// uses of other values produced by From.getNode() alone. The Deleted
5687 /// vector is handled the same way as for ReplaceAllUsesWith.
5688 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5689 // Handle the really simple, really trivial case efficiently.
5690 if (From == To) return;
5692 // Handle the simple, trivial, case efficiently.
5693 if (From.getNode()->getNumValues() == 1) {
5694 ReplaceAllUsesWith(From, To);
5698 // Iterate over just the existing users of From. See the comments in
5699 // the ReplaceAllUsesWith above.
5700 SDNode::use_iterator UI = From.getNode()->use_begin(),
5701 UE = From.getNode()->use_end();
5702 RAUWUpdateListener Listener(*this, UI, UE);
5705 bool UserRemovedFromCSEMaps = false;
5707 // A user can appear in a use list multiple times, and when this
5708 // happens the uses are usually next to each other in the list.
5709 // To help reduce the number of CSE recomputations, process all
5710 // the uses of this user that we can find this way.
5712 SDUse &Use = UI.getUse();
5714 // Skip uses of different values from the same node.
5715 if (Use.getResNo() != From.getResNo()) {
5720 // If this node hasn't been modified yet, it's still in the CSE maps,
5721 // so remove its old self from the CSE maps.
5722 if (!UserRemovedFromCSEMaps) {
5723 RemoveNodeFromCSEMaps(User);
5724 UserRemovedFromCSEMaps = true;
5729 } while (UI != UE && *UI == User);
5731 // We are iterating over all uses of the From node, so if a use
5732 // doesn't use the specific value, no changes are made.
5733 if (!UserRemovedFromCSEMaps)
5736 // Now that we have modified User, add it back to the CSE maps. If it
5737 // already exists there, recursively merge the results together.
5738 AddModifiedNodeToCSEMaps(User);
5741 // If we just RAUW'd the root, take note.
5742 if (From == getRoot())
5747 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5748 /// to record information about a use.
5755 /// operator< - Sort Memos by User.
5756 bool operator<(const UseMemo &L, const UseMemo &R) {
5757 return (intptr_t)L.User < (intptr_t)R.User;
5761 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5762 /// uses of other values produced by From.getNode() alone. The same value
5763 /// may appear in both the From and To list. The Deleted vector is
5764 /// handled the same way as for ReplaceAllUsesWith.
5765 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5768 // Handle the simple, trivial case efficiently.
5770 return ReplaceAllUsesOfValueWith(*From, *To);
5772 // Read up all the uses and make records of them. This helps
5773 // processing new uses that are introduced during the
5774 // replacement process.
5775 SmallVector<UseMemo, 4> Uses;
5776 for (unsigned i = 0; i != Num; ++i) {
5777 unsigned FromResNo = From[i].getResNo();
5778 SDNode *FromNode = From[i].getNode();
5779 for (SDNode::use_iterator UI = FromNode->use_begin(),
5780 E = FromNode->use_end(); UI != E; ++UI) {
5781 SDUse &Use = UI.getUse();
5782 if (Use.getResNo() == FromResNo) {
5783 UseMemo Memo = { *UI, i, &Use };
5784 Uses.push_back(Memo);
5789 // Sort the uses, so that all the uses from a given User are together.
5790 std::sort(Uses.begin(), Uses.end());
5792 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5793 UseIndex != UseIndexEnd; ) {
5794 // We know that this user uses some value of From. If it is the right
5795 // value, update it.
5796 SDNode *User = Uses[UseIndex].User;
5798 // This node is about to morph, remove its old self from the CSE maps.
5799 RemoveNodeFromCSEMaps(User);
5801 // The Uses array is sorted, so all the uses for a given User
5802 // are next to each other in the list.
5803 // To help reduce the number of CSE recomputations, process all
5804 // the uses of this user that we can find this way.
5806 unsigned i = Uses[UseIndex].Index;
5807 SDUse &Use = *Uses[UseIndex].Use;
5811 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5813 // Now that we have modified User, add it back to the CSE maps. If it
5814 // already exists there, recursively merge the results together.
5815 AddModifiedNodeToCSEMaps(User);
5819 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5820 /// based on their topological order. It returns the maximum id and a vector
5821 /// of the SDNodes* in assigned order by reference.
5822 unsigned SelectionDAG::AssignTopologicalOrder() {
5824 unsigned DAGSize = 0;
5826 // SortedPos tracks the progress of the algorithm. Nodes before it are
5827 // sorted, nodes after it are unsorted. When the algorithm completes
5828 // it is at the end of the list.
5829 allnodes_iterator SortedPos = allnodes_begin();
5831 // Visit all the nodes. Move nodes with no operands to the front of
5832 // the list immediately. Annotate nodes that do have operands with their
5833 // operand count. Before we do this, the Node Id fields of the nodes
5834 // may contain arbitrary values. After, the Node Id fields for nodes
5835 // before SortedPos will contain the topological sort index, and the
5836 // Node Id fields for nodes At SortedPos and after will contain the
5837 // count of outstanding operands.
5838 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5841 unsigned Degree = N->getNumOperands();
5843 // A node with no uses, add it to the result array immediately.
5844 N->setNodeId(DAGSize++);
5845 allnodes_iterator Q = N;
5847 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5848 assert(SortedPos != AllNodes.end() && "Overran node list");
5851 // Temporarily use the Node Id as scratch space for the degree count.
5852 N->setNodeId(Degree);
5856 // Visit all the nodes. As we iterate, move nodes into sorted order,
5857 // such that by the time the end is reached all nodes will be sorted.
5858 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5861 // N is in sorted position, so all its uses have one less operand
5862 // that needs to be sorted.
5863 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5866 unsigned Degree = P->getNodeId();
5867 assert(Degree != 0 && "Invalid node degree");
5870 // All of P's operands are sorted, so P may sorted now.
5871 P->setNodeId(DAGSize++);
5873 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5874 assert(SortedPos != AllNodes.end() && "Overran node list");
5877 // Update P's outstanding operand count.
5878 P->setNodeId(Degree);
5881 if (I == SortedPos) {
5884 dbgs() << "Overran sorted position:\n";
5887 llvm_unreachable(0);
5891 assert(SortedPos == AllNodes.end() &&
5892 "Topological sort incomplete!");
5893 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5894 "First node in topological sort is not the entry token!");
5895 assert(AllNodes.front().getNodeId() == 0 &&
5896 "First node in topological sort has non-zero id!");
5897 assert(AllNodes.front().getNumOperands() == 0 &&
5898 "First node in topological sort has operands!");
5899 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5900 "Last node in topologic sort has unexpected id!");
5901 assert(AllNodes.back().use_empty() &&
5902 "Last node in topologic sort has users!");
5903 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5907 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5908 /// value is produced by SD.
5909 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5910 DbgInfo->add(DB, SD, isParameter);
5912 SD->setHasDebugValue(true);
5915 /// TransferDbgValues - Transfer SDDbgValues.
5916 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5917 if (From == To || !From.getNode()->getHasDebugValue())
5919 SDNode *FromNode = From.getNode();
5920 SDNode *ToNode = To.getNode();
5921 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5922 SmallVector<SDDbgValue *, 2> ClonedDVs;
5923 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5925 SDDbgValue *Dbg = *I;
5926 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5927 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5928 Dbg->getOffset(), Dbg->getDebugLoc(),
5930 ClonedDVs.push_back(Clone);
5933 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
5934 E = ClonedDVs.end(); I != E; ++I)
5935 AddDbgValue(*I, ToNode, false);
5938 //===----------------------------------------------------------------------===//
5940 //===----------------------------------------------------------------------===//
5942 HandleSDNode::~HandleSDNode() {
5946 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
5947 DebugLoc DL, const GlobalValue *GA,
5948 EVT VT, int64_t o, unsigned char TF)
5949 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5953 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
5954 EVT memvt, MachineMemOperand *mmo)
5955 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5956 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5957 MMO->isNonTemporal(), MMO->isInvariant());
5958 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5959 assert(isNonTemporal() == MMO->isNonTemporal() &&
5960 "Non-temporal encoding error!");
5961 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5964 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
5965 const SDValue *Ops, unsigned NumOps, EVT memvt,
5966 MachineMemOperand *mmo)
5967 : SDNode(Opc, Order, dl, VTs, Ops, NumOps),
5968 MemoryVT(memvt), MMO(mmo) {
5969 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5970 MMO->isNonTemporal(), MMO->isInvariant());
5971 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5972 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5975 /// Profile - Gather unique data for the node.
5977 void SDNode::Profile(FoldingSetNodeID &ID) const {
5978 AddNodeIDNode(ID, this);
5983 std::vector<EVT> VTs;
5986 VTs.reserve(MVT::LAST_VALUETYPE);
5987 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5988 VTs.push_back(MVT((MVT::SimpleValueType)i));
5993 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5994 static ManagedStatic<EVTArray> SimpleVTArray;
5995 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5997 /// getValueTypeList - Return a pointer to the specified value type.
5999 const EVT *SDNode::getValueTypeList(EVT VT) {
6000 if (VT.isExtended()) {
6001 sys::SmartScopedLock<true> Lock(*VTMutex);
6002 return &(*EVTs->insert(VT).first);
6004 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6005 "Value type out of range!");
6006 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6010 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6011 /// indicated value. This method ignores uses of other values defined by this
6013 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6014 assert(Value < getNumValues() && "Bad value!");
6016 // TODO: Only iterate over uses of a given value of the node
6017 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6018 if (UI.getUse().getResNo() == Value) {
6025 // Found exactly the right number of uses?
6030 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6031 /// value. This method ignores uses of other values defined by this operation.
6032 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6033 assert(Value < getNumValues() && "Bad value!");
6035 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6036 if (UI.getUse().getResNo() == Value)
6043 /// isOnlyUserOf - Return true if this node is the only use of N.
6045 bool SDNode::isOnlyUserOf(SDNode *N) const {
6047 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6058 /// isOperand - Return true if this node is an operand of N.
6060 bool SDValue::isOperandOf(SDNode *N) const {
6061 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6062 if (*this == N->getOperand(i))
6067 bool SDNode::isOperandOf(SDNode *N) const {
6068 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
6069 if (this == N->OperandList[i].getNode())
6074 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6075 /// be a chain) reaches the specified operand without crossing any
6076 /// side-effecting instructions on any chain path. In practice, this looks
6077 /// through token factors and non-volatile loads. In order to remain efficient,
6078 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6079 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6080 unsigned Depth) const {
6081 if (*this == Dest) return true;
6083 // Don't search too deeply, we just want to be able to see through
6084 // TokenFactor's etc.
6085 if (Depth == 0) return false;
6087 // If this is a token factor, all inputs to the TF happen in parallel. If any
6088 // of the operands of the TF does not reach dest, then we cannot do the xform.
6089 if (getOpcode() == ISD::TokenFactor) {
6090 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6091 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6096 // Loads don't have side effects, look through them.
6097 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6098 if (!Ld->isVolatile())
6099 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6104 /// hasPredecessor - Return true if N is a predecessor of this node.
6105 /// N is either an operand of this node, or can be reached by recursively
6106 /// traversing up the operands.
6107 /// NOTE: This is an expensive method. Use it carefully.
6108 bool SDNode::hasPredecessor(const SDNode *N) const {
6109 SmallPtrSet<const SDNode *, 32> Visited;
6110 SmallVector<const SDNode *, 16> Worklist;
6111 return hasPredecessorHelper(N, Visited, Worklist);
6115 SDNode::hasPredecessorHelper(const SDNode *N,
6116 SmallPtrSet<const SDNode *, 32> &Visited,
6117 SmallVectorImpl<const SDNode *> &Worklist) const {
6118 if (Visited.empty()) {
6119 Worklist.push_back(this);
6121 // Take a look in the visited set. If we've already encountered this node
6122 // we needn't search further.
6123 if (Visited.count(N))
6127 // Haven't visited N yet. Continue the search.
6128 while (!Worklist.empty()) {
6129 const SDNode *M = Worklist.pop_back_val();
6130 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
6131 SDNode *Op = M->getOperand(i).getNode();
6132 if (Visited.insert(Op))
6133 Worklist.push_back(Op);
6142 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6143 assert(Num < NumOperands && "Invalid child # of SDNode!");
6144 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6147 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6148 assert(N->getNumValues() == 1 &&
6149 "Can't unroll a vector with multiple results!");
6151 EVT VT = N->getValueType(0);
6152 unsigned NE = VT.getVectorNumElements();
6153 EVT EltVT = VT.getVectorElementType();
6156 SmallVector<SDValue, 8> Scalars;
6157 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6159 // If ResNE is 0, fully unroll the vector op.
6162 else if (NE > ResNE)
6166 for (i= 0; i != NE; ++i) {
6167 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6168 SDValue Operand = N->getOperand(j);
6169 EVT OperandVT = Operand.getValueType();
6170 if (OperandVT.isVector()) {
6171 // A vector operand; extract a single element.
6172 const TargetLowering *TLI = TM.getTargetLowering();
6173 EVT OperandEltVT = OperandVT.getVectorElementType();
6174 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6177 getConstant(i, TLI->getVectorIdxTy()));
6179 // A scalar operand; just use it as is.
6180 Operands[j] = Operand;
6184 switch (N->getOpcode()) {
6186 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6187 &Operands[0], Operands.size()));
6190 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6191 &Operands[0], Operands.size()));
6198 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6199 getShiftAmountOperand(Operands[0].getValueType(),
6202 case ISD::SIGN_EXTEND_INREG:
6203 case ISD::FP_ROUND_INREG: {
6204 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6205 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6207 getValueType(ExtVT)));
6212 for (; i < ResNE; ++i)
6213 Scalars.push_back(getUNDEF(EltVT));
6215 return getNode(ISD::BUILD_VECTOR, dl,
6216 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6217 &Scalars[0], Scalars.size());
6221 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6222 /// location that is 'Dist' units away from the location that the 'Base' load
6223 /// is loading from.
6224 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6225 unsigned Bytes, int Dist) const {
6226 if (LD->getChain() != Base->getChain())
6228 EVT VT = LD->getValueType(0);
6229 if (VT.getSizeInBits() / 8 != Bytes)
6232 SDValue Loc = LD->getOperand(1);
6233 SDValue BaseLoc = Base->getOperand(1);
6234 if (Loc.getOpcode() == ISD::FrameIndex) {
6235 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6237 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6238 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6239 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6240 int FS = MFI->getObjectSize(FI);
6241 int BFS = MFI->getObjectSize(BFI);
6242 if (FS != BFS || FS != (int)Bytes) return false;
6243 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6247 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6248 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6251 const GlobalValue *GV1 = NULL;
6252 const GlobalValue *GV2 = NULL;
6253 int64_t Offset1 = 0;
6254 int64_t Offset2 = 0;
6255 const TargetLowering *TLI = TM.getTargetLowering();
6256 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6257 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6258 if (isGA1 && isGA2 && GV1 == GV2)
6259 return Offset1 == (Offset2 + Dist*Bytes);
6264 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6265 /// it cannot be inferred.
6266 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6267 // If this is a GlobalAddress + cst, return the alignment.
6268 const GlobalValue *GV;
6269 int64_t GVOffset = 0;
6270 const TargetLowering *TLI = TM.getTargetLowering();
6271 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6272 unsigned PtrWidth = TLI->getPointerTy().getSizeInBits();
6273 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6274 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6275 TLI->getDataLayout());
6276 unsigned AlignBits = KnownZero.countTrailingOnes();
6277 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6279 return MinAlign(Align, GVOffset);
6282 // If this is a direct reference to a stack slot, use information about the
6283 // stack slot's alignment.
6284 int FrameIdx = 1 << 31;
6285 int64_t FrameOffset = 0;
6286 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6287 FrameIdx = FI->getIndex();
6288 } else if (isBaseWithConstantOffset(Ptr) &&
6289 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6291 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6292 FrameOffset = Ptr.getConstantOperandVal(1);
6295 if (FrameIdx != (1 << 31)) {
6296 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6297 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6305 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6306 unsigned GlobalAddressSDNode::getAddressSpace() const {
6307 return getGlobal()->getType()->getAddressSpace();
6311 Type *ConstantPoolSDNode::getType() const {
6312 if (isMachineConstantPoolEntry())
6313 return Val.MachineCPVal->getType();
6314 return Val.ConstVal->getType();
6317 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6319 unsigned &SplatBitSize,
6321 unsigned MinSplatBits,
6323 EVT VT = getValueType(0);
6324 assert(VT.isVector() && "Expected a vector type");
6325 unsigned sz = VT.getSizeInBits();
6326 if (MinSplatBits > sz)
6329 SplatValue = APInt(sz, 0);
6330 SplatUndef = APInt(sz, 0);
6332 // Get the bits. Bits with undefined values (when the corresponding element
6333 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6334 // in SplatValue. If any of the values are not constant, give up and return
6336 unsigned int nOps = getNumOperands();
6337 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6338 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6340 for (unsigned j = 0; j < nOps; ++j) {
6341 unsigned i = isBigEndian ? nOps-1-j : j;
6342 SDValue OpVal = getOperand(i);
6343 unsigned BitPos = j * EltBitSize;
6345 if (OpVal.getOpcode() == ISD::UNDEF)
6346 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6347 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6348 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6349 zextOrTrunc(sz) << BitPos;
6350 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6351 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6356 // The build_vector is all constants or undefs. Find the smallest element
6357 // size that splats the vector.
6359 HasAnyUndefs = (SplatUndef != 0);
6362 unsigned HalfSize = sz / 2;
6363 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6364 APInt LowValue = SplatValue.trunc(HalfSize);
6365 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6366 APInt LowUndef = SplatUndef.trunc(HalfSize);
6368 // If the two halves do not match (ignoring undef bits), stop here.
6369 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6370 MinSplatBits > HalfSize)
6373 SplatValue = HighValue | LowValue;
6374 SplatUndef = HighUndef & LowUndef;
6383 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6384 // Find the first non-undef value in the shuffle mask.
6386 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6389 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6391 // Make sure all remaining elements are either undef or the same as the first
6393 for (int Idx = Mask[i]; i != e; ++i)
6394 if (Mask[i] >= 0 && Mask[i] != Idx)
6400 static void checkForCyclesHelper(const SDNode *N,
6401 SmallPtrSet<const SDNode*, 32> &Visited,
6402 SmallPtrSet<const SDNode*, 32> &Checked) {
6403 // If this node has already been checked, don't check it again.
6404 if (Checked.count(N))
6407 // If a node has already been visited on this depth-first walk, reject it as
6409 if (!Visited.insert(N)) {
6410 dbgs() << "Offending node:\n";
6412 errs() << "Detected cycle in SelectionDAG\n";
6416 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6417 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6424 void llvm::checkForCycles(const llvm::SDNode *N) {
6426 assert(N && "Checking nonexistant SDNode");
6427 SmallPtrSet<const SDNode*, 32> visited;
6428 SmallPtrSet<const SDNode*, 32> checked;
6429 checkForCyclesHelper(N, visited, checked);
6433 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6434 checkForCycles(DAG->getRoot().getNode());