1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Analysis/DebugInfo.h"
19 #include "llvm/Analysis/ValueTracking.h"
20 #include "llvm/Function.h"
21 #include "llvm/GlobalAlias.h"
22 #include "llvm/GlobalVariable.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/DerivedTypes.h"
25 #include "llvm/Assembly/Writer.h"
26 #include "llvm/CallingConv.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetSelectionDAGInfo.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Support/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f32: return &APFloat::IEEEsingle;
66 case MVT::f64: return &APFloat::IEEEdouble;
67 case MVT::f80: return &APFloat::x87DoubleExtended;
68 case MVT::f128: return &APFloat::IEEEquad;
69 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
73 SelectionDAG::DAGUpdateListener::~DAGUpdateListener() {}
75 //===----------------------------------------------------------------------===//
76 // ConstantFPSDNode Class
77 //===----------------------------------------------------------------------===//
79 /// isExactlyValue - We don't rely on operator== working on double values, as
80 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
81 /// As such, this method can be used to do an exact bit-for-bit comparison of
82 /// two floating point values.
83 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
84 return getValueAPF().bitwiseIsEqual(V);
87 bool ConstantFPSDNode::isValueValidForType(EVT VT,
89 assert(VT.isFloatingPoint() && "Can only convert between FP types");
91 // PPC long double cannot be converted to any other type.
92 if (VT == MVT::ppcf128 ||
93 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
96 // convert modifies in place, so make a copy.
97 APFloat Val2 = APFloat(Val);
99 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
104 //===----------------------------------------------------------------------===//
106 //===----------------------------------------------------------------------===//
108 /// isBuildVectorAllOnes - Return true if the specified node is a
109 /// BUILD_VECTOR where all of the elements are ~0 or undef.
110 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
111 // Look through a bit convert.
112 if (N->getOpcode() == ISD::BITCAST)
113 N = N->getOperand(0).getNode();
115 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
117 unsigned i = 0, e = N->getNumOperands();
119 // Skip over all of the undef values.
120 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
123 // Do not accept an all-undef vector.
124 if (i == e) return false;
126 // Do not accept build_vectors that aren't all constants or which have non-~0
127 // elements. We have to be a bit careful here, as the type of the constant
128 // may not be the same as the type of the vector elements due to type
129 // legalization (the elements are promoted to a legal type for the target and
130 // a vector of a type may be legal when the base element type is not).
131 // We only want to check enough bits to cover the vector elements, because
132 // we care if the resultant vector is all ones, not whether the individual
134 SDValue NotZero = N->getOperand(i);
135 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
136 if (isa<ConstantSDNode>(NotZero)) {
137 if (cast<ConstantSDNode>(NotZero)->getAPIntValue().countTrailingOnes() <
140 } else if (isa<ConstantFPSDNode>(NotZero)) {
141 if (cast<ConstantFPSDNode>(NotZero)->getValueAPF()
142 .bitcastToAPInt().countTrailingOnes() < EltSize)
147 // Okay, we have at least one ~0 value, check to see if the rest match or are
148 // undefs. Even with the above element type twiddling, this should be OK, as
149 // the same type legalization should have applied to all the elements.
150 for (++i; i != e; ++i)
151 if (N->getOperand(i) != NotZero &&
152 N->getOperand(i).getOpcode() != ISD::UNDEF)
158 /// isBuildVectorAllZeros - Return true if the specified node is a
159 /// BUILD_VECTOR where all of the elements are 0 or undef.
160 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
161 // Look through a bit convert.
162 if (N->getOpcode() == ISD::BITCAST)
163 N = N->getOperand(0).getNode();
165 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
167 unsigned i = 0, e = N->getNumOperands();
169 // Skip over all of the undef values.
170 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
173 // Do not accept an all-undef vector.
174 if (i == e) return false;
176 // Do not accept build_vectors that aren't all constants or which have non-0
178 SDValue Zero = N->getOperand(i);
179 if (isa<ConstantSDNode>(Zero)) {
180 if (!cast<ConstantSDNode>(Zero)->isNullValue())
182 } else if (isa<ConstantFPSDNode>(Zero)) {
183 if (!cast<ConstantFPSDNode>(Zero)->getValueAPF().isPosZero())
188 // Okay, we have at least one 0 value, check to see if the rest match or are
190 for (++i; i != e; ++i)
191 if (N->getOperand(i) != Zero &&
192 N->getOperand(i).getOpcode() != ISD::UNDEF)
197 /// isScalarToVector - Return true if the specified node is a
198 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
199 /// element is not an undef.
200 bool ISD::isScalarToVector(const SDNode *N) {
201 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
204 if (N->getOpcode() != ISD::BUILD_VECTOR)
206 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
208 unsigned NumElems = N->getNumOperands();
211 for (unsigned i = 1; i < NumElems; ++i) {
212 SDValue V = N->getOperand(i);
213 if (V.getOpcode() != ISD::UNDEF)
219 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
220 /// when given the operation for (X op Y).
221 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
222 // To perform this operation, we just need to swap the L and G bits of the
224 unsigned OldL = (Operation >> 2) & 1;
225 unsigned OldG = (Operation >> 1) & 1;
226 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
227 (OldL << 1) | // New G bit
228 (OldG << 2)); // New L bit.
231 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
232 /// 'op' is a valid SetCC operation.
233 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
234 unsigned Operation = Op;
236 Operation ^= 7; // Flip L, G, E bits, but not U.
238 Operation ^= 15; // Flip all of the condition bits.
240 if (Operation > ISD::SETTRUE2)
241 Operation &= ~8; // Don't let N and U bits get set.
243 return ISD::CondCode(Operation);
247 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
248 /// signed operation and 2 if the result is an unsigned comparison. Return zero
249 /// if the operation does not depend on the sign of the input (setne and seteq).
250 static int isSignedOp(ISD::CondCode Opcode) {
252 default: llvm_unreachable("Illegal integer setcc operation!");
254 case ISD::SETNE: return 0;
258 case ISD::SETGE: return 1;
262 case ISD::SETUGE: return 2;
266 /// getSetCCOrOperation - Return the result of a logical OR between different
267 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
268 /// returns SETCC_INVALID if it is not possible to represent the resultant
270 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
272 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
273 // Cannot fold a signed integer setcc with an unsigned integer setcc.
274 return ISD::SETCC_INVALID;
276 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
278 // If the N and U bits get set then the resultant comparison DOES suddenly
279 // care about orderedness, and is true when ordered.
280 if (Op > ISD::SETTRUE2)
281 Op &= ~16; // Clear the U bit if the N bit is set.
283 // Canonicalize illegal integer setcc's.
284 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
287 return ISD::CondCode(Op);
290 /// getSetCCAndOperation - Return the result of a logical AND between different
291 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
292 /// function returns zero if it is not possible to represent the resultant
294 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
296 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
297 // Cannot fold a signed setcc with an unsigned setcc.
298 return ISD::SETCC_INVALID;
300 // Combine all of the condition bits.
301 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
303 // Canonicalize illegal integer setcc's.
307 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
308 case ISD::SETOEQ: // SETEQ & SETU[LG]E
309 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
310 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
311 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
318 //===----------------------------------------------------------------------===//
319 // SDNode Profile Support
320 //===----------------------------------------------------------------------===//
322 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
324 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
328 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
329 /// solely with their pointer.
330 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
331 ID.AddPointer(VTList.VTs);
334 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
336 static void AddNodeIDOperands(FoldingSetNodeID &ID,
337 const SDValue *Ops, unsigned NumOps) {
338 for (; NumOps; --NumOps, ++Ops) {
339 ID.AddPointer(Ops->getNode());
340 ID.AddInteger(Ops->getResNo());
344 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
346 static void AddNodeIDOperands(FoldingSetNodeID &ID,
347 const SDUse *Ops, unsigned NumOps) {
348 for (; NumOps; --NumOps, ++Ops) {
349 ID.AddPointer(Ops->getNode());
350 ID.AddInteger(Ops->getResNo());
354 static void AddNodeIDNode(FoldingSetNodeID &ID,
355 unsigned short OpC, SDVTList VTList,
356 const SDValue *OpList, unsigned N) {
357 AddNodeIDOpcode(ID, OpC);
358 AddNodeIDValueTypes(ID, VTList);
359 AddNodeIDOperands(ID, OpList, N);
362 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
364 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
365 switch (N->getOpcode()) {
366 case ISD::TargetExternalSymbol:
367 case ISD::ExternalSymbol:
368 llvm_unreachable("Should only be used on nodes with operands");
369 default: break; // Normal nodes don't need extra info.
370 case ISD::TargetConstant:
372 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
374 case ISD::TargetConstantFP:
375 case ISD::ConstantFP: {
376 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
379 case ISD::TargetGlobalAddress:
380 case ISD::GlobalAddress:
381 case ISD::TargetGlobalTLSAddress:
382 case ISD::GlobalTLSAddress: {
383 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
384 ID.AddPointer(GA->getGlobal());
385 ID.AddInteger(GA->getOffset());
386 ID.AddInteger(GA->getTargetFlags());
389 case ISD::BasicBlock:
390 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
393 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
395 case ISD::RegisterMask:
396 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
399 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
401 case ISD::FrameIndex:
402 case ISD::TargetFrameIndex:
403 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
406 case ISD::TargetJumpTable:
407 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
408 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
410 case ISD::ConstantPool:
411 case ISD::TargetConstantPool: {
412 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
413 ID.AddInteger(CP->getAlignment());
414 ID.AddInteger(CP->getOffset());
415 if (CP->isMachineConstantPoolEntry())
416 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
418 ID.AddPointer(CP->getConstVal());
419 ID.AddInteger(CP->getTargetFlags());
423 const LoadSDNode *LD = cast<LoadSDNode>(N);
424 ID.AddInteger(LD->getMemoryVT().getRawBits());
425 ID.AddInteger(LD->getRawSubclassData());
429 const StoreSDNode *ST = cast<StoreSDNode>(N);
430 ID.AddInteger(ST->getMemoryVT().getRawBits());
431 ID.AddInteger(ST->getRawSubclassData());
434 case ISD::ATOMIC_CMP_SWAP:
435 case ISD::ATOMIC_SWAP:
436 case ISD::ATOMIC_LOAD_ADD:
437 case ISD::ATOMIC_LOAD_SUB:
438 case ISD::ATOMIC_LOAD_AND:
439 case ISD::ATOMIC_LOAD_OR:
440 case ISD::ATOMIC_LOAD_XOR:
441 case ISD::ATOMIC_LOAD_NAND:
442 case ISD::ATOMIC_LOAD_MIN:
443 case ISD::ATOMIC_LOAD_MAX:
444 case ISD::ATOMIC_LOAD_UMIN:
445 case ISD::ATOMIC_LOAD_UMAX:
446 case ISD::ATOMIC_LOAD:
447 case ISD::ATOMIC_STORE: {
448 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
449 ID.AddInteger(AT->getMemoryVT().getRawBits());
450 ID.AddInteger(AT->getRawSubclassData());
453 case ISD::VECTOR_SHUFFLE: {
454 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
455 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
457 ID.AddInteger(SVN->getMaskElt(i));
460 case ISD::TargetBlockAddress:
461 case ISD::BlockAddress: {
462 ID.AddPointer(cast<BlockAddressSDNode>(N)->getBlockAddress());
463 ID.AddInteger(cast<BlockAddressSDNode>(N)->getTargetFlags());
466 } // end switch (N->getOpcode())
469 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
471 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
472 AddNodeIDOpcode(ID, N->getOpcode());
473 // Add the return value info.
474 AddNodeIDValueTypes(ID, N->getVTList());
475 // Add the operand info.
476 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
478 // Handle SDNode leafs with special info.
479 AddNodeIDCustom(ID, N);
482 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
483 /// the CSE map that carries volatility, temporalness, indexing mode, and
484 /// extension/truncation information.
486 static inline unsigned
487 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
488 bool isNonTemporal, bool isInvariant) {
489 assert((ConvType & 3) == ConvType &&
490 "ConvType may not require more than 2 bits!");
491 assert((AM & 7) == AM &&
492 "AM may not require more than 3 bits!");
496 (isNonTemporal << 6) |
500 //===----------------------------------------------------------------------===//
501 // SelectionDAG Class
502 //===----------------------------------------------------------------------===//
504 /// doNotCSE - Return true if CSE should not be performed for this node.
505 static bool doNotCSE(SDNode *N) {
506 if (N->getValueType(0) == MVT::Glue)
507 return true; // Never CSE anything that produces a flag.
509 switch (N->getOpcode()) {
511 case ISD::HANDLENODE:
513 return true; // Never CSE these nodes.
516 // Check that remaining values produced are not flags.
517 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
518 if (N->getValueType(i) == MVT::Glue)
519 return true; // Never CSE anything that produces a flag.
524 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
526 void SelectionDAG::RemoveDeadNodes() {
527 // Create a dummy node (which is not added to allnodes), that adds a reference
528 // to the root node, preventing it from being deleted.
529 HandleSDNode Dummy(getRoot());
531 SmallVector<SDNode*, 128> DeadNodes;
533 // Add all obviously-dead nodes to the DeadNodes worklist.
534 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
536 DeadNodes.push_back(I);
538 RemoveDeadNodes(DeadNodes);
540 // If the root changed (e.g. it was a dead load, update the root).
541 setRoot(Dummy.getValue());
544 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
545 /// given list, and any nodes that become unreachable as a result.
546 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes,
547 DAGUpdateListener *UpdateListener) {
549 // Process the worklist, deleting the nodes and adding their uses to the
551 while (!DeadNodes.empty()) {
552 SDNode *N = DeadNodes.pop_back_val();
555 UpdateListener->NodeDeleted(N, 0);
557 // Take the node out of the appropriate CSE map.
558 RemoveNodeFromCSEMaps(N);
560 // Next, brutally remove the operand list. This is safe to do, as there are
561 // no cycles in the graph.
562 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
564 SDNode *Operand = Use.getNode();
567 // Now that we removed this operand, see if there are no uses of it left.
568 if (Operand->use_empty())
569 DeadNodes.push_back(Operand);
576 void SelectionDAG::RemoveDeadNode(SDNode *N, DAGUpdateListener *UpdateListener){
577 SmallVector<SDNode*, 16> DeadNodes(1, N);
579 // Create a dummy node that adds a reference to the root node, preventing
580 // it from being deleted. (This matters if the root is an operand of the
582 HandleSDNode Dummy(getRoot());
584 RemoveDeadNodes(DeadNodes, UpdateListener);
587 void SelectionDAG::DeleteNode(SDNode *N) {
588 // First take this out of the appropriate CSE map.
589 RemoveNodeFromCSEMaps(N);
591 // Finally, remove uses due to operands of this node, remove from the
592 // AllNodes list, and delete the node.
593 DeleteNodeNotInCSEMaps(N);
596 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
597 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
598 assert(N->use_empty() && "Cannot delete a node that is not dead!");
600 // Drop all of the operands and decrement used node's use counts.
606 void SelectionDAG::DeallocateNode(SDNode *N) {
607 if (N->OperandsNeedDelete)
608 delete[] N->OperandList;
610 // Set the opcode to DELETED_NODE to help catch bugs when node
611 // memory is reallocated.
612 N->NodeType = ISD::DELETED_NODE;
614 NodeAllocator.Deallocate(AllNodes.remove(N));
616 // Remove the ordering of this node.
619 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
620 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
621 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
622 DbgVals[i]->setIsInvalidated();
625 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
626 /// correspond to it. This is useful when we're about to delete or repurpose
627 /// the node. We don't want future request for structurally identical nodes
628 /// to return N anymore.
629 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
631 switch (N->getOpcode()) {
632 case ISD::HANDLENODE: return false; // noop.
634 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
635 "Cond code doesn't exist!");
636 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
637 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
639 case ISD::ExternalSymbol:
640 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
642 case ISD::TargetExternalSymbol: {
643 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
644 Erased = TargetExternalSymbols.erase(
645 std::pair<std::string,unsigned char>(ESN->getSymbol(),
646 ESN->getTargetFlags()));
649 case ISD::VALUETYPE: {
650 EVT VT = cast<VTSDNode>(N)->getVT();
651 if (VT.isExtended()) {
652 Erased = ExtendedValueTypeNodes.erase(VT);
654 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
655 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
660 // Remove it from the CSE Map.
661 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
662 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
663 Erased = CSEMap.RemoveNode(N);
667 // Verify that the node was actually in one of the CSE maps, unless it has a
668 // flag result (which cannot be CSE'd) or is one of the special cases that are
669 // not subject to CSE.
670 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
671 !N->isMachineOpcode() && !doNotCSE(N)) {
674 llvm_unreachable("Node is not in map!");
680 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
681 /// maps and modified in place. Add it back to the CSE maps, unless an identical
682 /// node already exists, in which case transfer all its users to the existing
683 /// node. This transfer can potentially trigger recursive merging.
686 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N,
687 DAGUpdateListener *UpdateListener) {
688 // For node types that aren't CSE'd, just act as if no identical node
691 SDNode *Existing = CSEMap.GetOrInsertNode(N);
693 // If there was already an existing matching node, use ReplaceAllUsesWith
694 // to replace the dead one with the existing one. This can cause
695 // recursive merging of other unrelated nodes down the line.
696 ReplaceAllUsesWith(N, Existing, UpdateListener);
698 // N is now dead. Inform the listener if it exists and delete it.
700 UpdateListener->NodeDeleted(N, Existing);
701 DeleteNodeNotInCSEMaps(N);
706 // If the node doesn't already exist, we updated it. Inform a listener if
709 UpdateListener->NodeUpdated(N);
712 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
713 /// were replaced with those specified. If this node is never memoized,
714 /// return null, otherwise return a pointer to the slot it would take. If a
715 /// node already exists with these operands, the slot will be non-null.
716 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
721 SDValue Ops[] = { Op };
723 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
724 AddNodeIDCustom(ID, N);
725 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
729 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
730 /// were replaced with those specified. If this node is never memoized,
731 /// return null, otherwise return a pointer to the slot it would take. If a
732 /// node already exists with these operands, the slot will be non-null.
733 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
734 SDValue Op1, SDValue Op2,
739 SDValue Ops[] = { Op1, Op2 };
741 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
742 AddNodeIDCustom(ID, N);
743 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
748 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
749 /// were replaced with those specified. If this node is never memoized,
750 /// return null, otherwise return a pointer to the slot it would take. If a
751 /// node already exists with these operands, the slot will be non-null.
752 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
753 const SDValue *Ops,unsigned NumOps,
759 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
760 AddNodeIDCustom(ID, N);
761 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
766 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
767 static void VerifyNodeCommon(SDNode *N) {
768 switch (N->getOpcode()) {
771 case ISD::BUILD_PAIR: {
772 EVT VT = N->getValueType(0);
773 assert(N->getNumValues() == 1 && "Too many results!");
774 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
775 "Wrong return type!");
776 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
777 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
778 "Mismatched operand types!");
779 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
780 "Wrong operand type!");
781 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
782 "Wrong return type size");
785 case ISD::BUILD_VECTOR: {
786 assert(N->getNumValues() == 1 && "Too many results!");
787 assert(N->getValueType(0).isVector() && "Wrong return type!");
788 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
789 "Wrong number of operands!");
790 EVT EltVT = N->getValueType(0).getVectorElementType();
791 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
792 assert((I->getValueType() == EltVT ||
793 (EltVT.isInteger() && I->getValueType().isInteger() &&
794 EltVT.bitsLE(I->getValueType()))) &&
795 "Wrong operand type!");
796 assert(I->getValueType() == N->getOperand(0).getValueType() &&
797 "Operands must all have the same type");
804 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
805 static void VerifySDNode(SDNode *N) {
806 // The SDNode allocators cannot be used to allocate nodes with fields that are
807 // not present in an SDNode!
808 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
809 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
810 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
811 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
812 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
813 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
814 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
815 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
816 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
817 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
818 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
819 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
820 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
821 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
822 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
823 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
824 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
825 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
826 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
831 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
833 static void VerifyMachineNode(SDNode *N) {
834 // The MachineNode allocators cannot be used to allocate nodes with fields
835 // that are not present in a MachineNode!
836 // Currently there are no such nodes.
842 /// getEVTAlignment - Compute the default alignment value for the
845 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
846 Type *Ty = VT == MVT::iPTR ?
847 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
848 VT.getTypeForEVT(*getContext());
850 return TLI.getTargetData()->getABITypeAlignment(Ty);
853 // EntryNode could meaningfully have debug info if we can find it...
854 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
855 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
856 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
857 Root(getEntryNode()), Ordering(0) {
858 AllNodes.push_back(&EntryNode);
859 Ordering = new SDNodeOrdering();
860 DbgInfo = new SDDbgInfo();
863 void SelectionDAG::init(MachineFunction &mf) {
865 Context = &mf.getFunction()->getContext();
868 SelectionDAG::~SelectionDAG() {
874 void SelectionDAG::allnodes_clear() {
875 assert(&*AllNodes.begin() == &EntryNode);
876 AllNodes.remove(AllNodes.begin());
877 while (!AllNodes.empty())
878 DeallocateNode(AllNodes.begin());
881 void SelectionDAG::clear() {
883 OperandAllocator.Reset();
886 ExtendedValueTypeNodes.clear();
887 ExternalSymbols.clear();
888 TargetExternalSymbols.clear();
889 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
890 static_cast<CondCodeSDNode*>(0));
891 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
892 static_cast<SDNode*>(0));
894 EntryNode.UseList = 0;
895 AllNodes.push_back(&EntryNode);
896 Root = getEntryNode();
901 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
902 return VT.bitsGT(Op.getValueType()) ?
903 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
904 getNode(ISD::TRUNCATE, DL, VT, Op);
907 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
908 return VT.bitsGT(Op.getValueType()) ?
909 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
910 getNode(ISD::TRUNCATE, DL, VT, Op);
913 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
914 return VT.bitsGT(Op.getValueType()) ?
915 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
916 getNode(ISD::TRUNCATE, DL, VT, Op);
919 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
920 assert(!VT.isVector() &&
921 "getZeroExtendInReg should use the vector element type instead of "
923 if (Op.getValueType() == VT) return Op;
924 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
925 APInt Imm = APInt::getLowBitsSet(BitWidth,
927 return getNode(ISD::AND, DL, Op.getValueType(), Op,
928 getConstant(Imm, Op.getValueType()));
931 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
933 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
934 EVT EltVT = VT.getScalarType();
936 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
937 return getNode(ISD::XOR, DL, VT, Val, NegOne);
940 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
941 EVT EltVT = VT.getScalarType();
942 assert((EltVT.getSizeInBits() >= 64 ||
943 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
944 "getConstant with a uint64_t value that doesn't fit in the type!");
945 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
948 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
949 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
952 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
953 assert(VT.isInteger() && "Cannot create FP integer constant!");
955 EVT EltVT = VT.getScalarType();
956 const ConstantInt *Elt = &Val;
958 // In some cases the vector type is legal but the element type is illegal and
959 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
960 // inserted value (the type does not need to match the vector element type).
961 // Any extra bits introduced will be truncated away.
962 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
963 TargetLowering::TypePromoteInteger) {
964 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
965 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
966 Elt = ConstantInt::get(*getContext(), NewVal);
969 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
970 "APInt size does not match type size!");
971 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
973 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
977 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
979 return SDValue(N, 0);
982 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
983 CSEMap.InsertNode(N, IP);
984 AllNodes.push_back(N);
987 SDValue Result(N, 0);
989 SmallVector<SDValue, 8> Ops;
990 Ops.assign(VT.getVectorNumElements(), Result);
991 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
996 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
997 return getConstant(Val, TLI.getPointerTy(), isTarget);
1001 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1002 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1005 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1006 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1008 EVT EltVT = VT.getScalarType();
1010 // Do the map lookup using the actual bit pattern for the floating point
1011 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1012 // we don't have issues with SNANs.
1013 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1014 FoldingSetNodeID ID;
1015 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1019 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1021 return SDValue(N, 0);
1024 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1025 CSEMap.InsertNode(N, IP);
1026 AllNodes.push_back(N);
1029 SDValue Result(N, 0);
1030 if (VT.isVector()) {
1031 SmallVector<SDValue, 8> Ops;
1032 Ops.assign(VT.getVectorNumElements(), Result);
1033 // FIXME DebugLoc info might be appropriate here
1034 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1039 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1040 EVT EltVT = VT.getScalarType();
1041 if (EltVT==MVT::f32)
1042 return getConstantFP(APFloat((float)Val), VT, isTarget);
1043 else if (EltVT==MVT::f64)
1044 return getConstantFP(APFloat(Val), VT, isTarget);
1045 else if (EltVT==MVT::f80 || EltVT==MVT::f128) {
1047 APFloat apf = APFloat(Val);
1048 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1050 return getConstantFP(apf, VT, isTarget);
1052 llvm_unreachable("Unsupported type in getConstantFP");
1055 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1056 EVT VT, int64_t Offset,
1058 unsigned char TargetFlags) {
1059 assert((TargetFlags == 0 || isTargetGA) &&
1060 "Cannot set target flags on target-independent globals");
1062 // Truncate (with sign-extension) the offset value to the pointer size.
1063 EVT PTy = TLI.getPointerTy();
1064 unsigned BitWidth = PTy.getSizeInBits();
1066 Offset = (Offset << (64 - BitWidth) >> (64 - BitWidth));
1068 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1070 // If GV is an alias then use the aliasee for determining thread-localness.
1071 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1072 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1076 if (GVar && GVar->isThreadLocal())
1077 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1079 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1081 FoldingSetNodeID ID;
1082 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1084 ID.AddInteger(Offset);
1085 ID.AddInteger(TargetFlags);
1087 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1088 return SDValue(E, 0);
1090 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1091 Offset, TargetFlags);
1092 CSEMap.InsertNode(N, IP);
1093 AllNodes.push_back(N);
1094 return SDValue(N, 0);
1097 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1098 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1099 FoldingSetNodeID ID;
1100 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1103 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1104 return SDValue(E, 0);
1106 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1107 CSEMap.InsertNode(N, IP);
1108 AllNodes.push_back(N);
1109 return SDValue(N, 0);
1112 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1113 unsigned char TargetFlags) {
1114 assert((TargetFlags == 0 || isTarget) &&
1115 "Cannot set target flags on target-independent jump tables");
1116 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1117 FoldingSetNodeID ID;
1118 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1120 ID.AddInteger(TargetFlags);
1122 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1123 return SDValue(E, 0);
1125 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1127 CSEMap.InsertNode(N, IP);
1128 AllNodes.push_back(N);
1129 return SDValue(N, 0);
1132 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1133 unsigned Alignment, int Offset,
1135 unsigned char TargetFlags) {
1136 assert((TargetFlags == 0 || isTarget) &&
1137 "Cannot set target flags on target-independent globals");
1139 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1140 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1141 FoldingSetNodeID ID;
1142 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1143 ID.AddInteger(Alignment);
1144 ID.AddInteger(Offset);
1146 ID.AddInteger(TargetFlags);
1148 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1149 return SDValue(E, 0);
1151 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1152 Alignment, TargetFlags);
1153 CSEMap.InsertNode(N, IP);
1154 AllNodes.push_back(N);
1155 return SDValue(N, 0);
1159 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1160 unsigned Alignment, int Offset,
1162 unsigned char TargetFlags) {
1163 assert((TargetFlags == 0 || isTarget) &&
1164 "Cannot set target flags on target-independent globals");
1166 Alignment = TLI.getTargetData()->getPrefTypeAlignment(C->getType());
1167 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1168 FoldingSetNodeID ID;
1169 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1170 ID.AddInteger(Alignment);
1171 ID.AddInteger(Offset);
1172 C->addSelectionDAGCSEId(ID);
1173 ID.AddInteger(TargetFlags);
1175 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1176 return SDValue(E, 0);
1178 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1179 Alignment, TargetFlags);
1180 CSEMap.InsertNode(N, IP);
1181 AllNodes.push_back(N);
1182 return SDValue(N, 0);
1185 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1186 FoldingSetNodeID ID;
1187 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1190 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1191 return SDValue(E, 0);
1193 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1194 CSEMap.InsertNode(N, IP);
1195 AllNodes.push_back(N);
1196 return SDValue(N, 0);
1199 SDValue SelectionDAG::getValueType(EVT VT) {
1200 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1201 ValueTypeNodes.size())
1202 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1204 SDNode *&N = VT.isExtended() ?
1205 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1207 if (N) return SDValue(N, 0);
1208 N = new (NodeAllocator) VTSDNode(VT);
1209 AllNodes.push_back(N);
1210 return SDValue(N, 0);
1213 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1214 SDNode *&N = ExternalSymbols[Sym];
1215 if (N) return SDValue(N, 0);
1216 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1217 AllNodes.push_back(N);
1218 return SDValue(N, 0);
1221 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1222 unsigned char TargetFlags) {
1224 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1226 if (N) return SDValue(N, 0);
1227 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1228 AllNodes.push_back(N);
1229 return SDValue(N, 0);
1232 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1233 if ((unsigned)Cond >= CondCodeNodes.size())
1234 CondCodeNodes.resize(Cond+1);
1236 if (CondCodeNodes[Cond] == 0) {
1237 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1238 CondCodeNodes[Cond] = N;
1239 AllNodes.push_back(N);
1242 return SDValue(CondCodeNodes[Cond], 0);
1245 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1246 // the shuffle mask M that point at N1 to point at N2, and indices that point
1247 // N2 to point at N1.
1248 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1250 int NElts = M.size();
1251 for (int i = 0; i != NElts; ++i) {
1259 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1260 SDValue N2, const int *Mask) {
1261 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1262 assert(VT.isVector() && N1.getValueType().isVector() &&
1263 "Vector Shuffle VTs must be a vectors");
1264 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1265 && "Vector Shuffle VTs must have same element type");
1267 // Canonicalize shuffle undef, undef -> undef
1268 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1269 return getUNDEF(VT);
1271 // Validate that all indices in Mask are within the range of the elements
1272 // input to the shuffle.
1273 unsigned NElts = VT.getVectorNumElements();
1274 SmallVector<int, 8> MaskVec;
1275 for (unsigned i = 0; i != NElts; ++i) {
1276 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1277 MaskVec.push_back(Mask[i]);
1280 // Canonicalize shuffle v, v -> v, undef
1283 for (unsigned i = 0; i != NElts; ++i)
1284 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1287 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1288 if (N1.getOpcode() == ISD::UNDEF)
1289 commuteShuffle(N1, N2, MaskVec);
1291 // Canonicalize all index into lhs, -> shuffle lhs, undef
1292 // Canonicalize all index into rhs, -> shuffle rhs, undef
1293 bool AllLHS = true, AllRHS = true;
1294 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1295 for (unsigned i = 0; i != NElts; ++i) {
1296 if (MaskVec[i] >= (int)NElts) {
1301 } else if (MaskVec[i] >= 0) {
1305 if (AllLHS && AllRHS)
1306 return getUNDEF(VT);
1307 if (AllLHS && !N2Undef)
1311 commuteShuffle(N1, N2, MaskVec);
1314 // If Identity shuffle, or all shuffle in to undef, return that node.
1315 bool AllUndef = true;
1316 bool Identity = true;
1317 for (unsigned i = 0; i != NElts; ++i) {
1318 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1319 if (MaskVec[i] >= 0) AllUndef = false;
1321 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1324 return getUNDEF(VT);
1326 FoldingSetNodeID ID;
1327 SDValue Ops[2] = { N1, N2 };
1328 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1329 for (unsigned i = 0; i != NElts; ++i)
1330 ID.AddInteger(MaskVec[i]);
1333 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1334 return SDValue(E, 0);
1336 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1337 // SDNode doesn't have access to it. This memory will be "leaked" when
1338 // the node is deallocated, but recovered when the NodeAllocator is released.
1339 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1340 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1342 ShuffleVectorSDNode *N =
1343 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1344 CSEMap.InsertNode(N, IP);
1345 AllNodes.push_back(N);
1346 return SDValue(N, 0);
1349 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1350 SDValue Val, SDValue DTy,
1351 SDValue STy, SDValue Rnd, SDValue Sat,
1352 ISD::CvtCode Code) {
1353 // If the src and dest types are the same and the conversion is between
1354 // integer types of the same sign or two floats, no conversion is necessary.
1356 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1359 FoldingSetNodeID ID;
1360 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1361 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1363 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1364 return SDValue(E, 0);
1366 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1368 CSEMap.InsertNode(N, IP);
1369 AllNodes.push_back(N);
1370 return SDValue(N, 0);
1373 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1374 FoldingSetNodeID ID;
1375 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1376 ID.AddInteger(RegNo);
1378 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1379 return SDValue(E, 0);
1381 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1382 CSEMap.InsertNode(N, IP);
1383 AllNodes.push_back(N);
1384 return SDValue(N, 0);
1387 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1388 FoldingSetNodeID ID;
1389 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1390 ID.AddPointer(RegMask);
1392 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1393 return SDValue(E, 0);
1395 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1396 CSEMap.InsertNode(N, IP);
1397 AllNodes.push_back(N);
1398 return SDValue(N, 0);
1401 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1402 FoldingSetNodeID ID;
1403 SDValue Ops[] = { Root };
1404 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1405 ID.AddPointer(Label);
1407 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1408 return SDValue(E, 0);
1410 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1411 CSEMap.InsertNode(N, IP);
1412 AllNodes.push_back(N);
1413 return SDValue(N, 0);
1417 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1419 unsigned char TargetFlags) {
1420 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1422 FoldingSetNodeID ID;
1423 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1425 ID.AddInteger(TargetFlags);
1427 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1428 return SDValue(E, 0);
1430 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, TargetFlags);
1431 CSEMap.InsertNode(N, IP);
1432 AllNodes.push_back(N);
1433 return SDValue(N, 0);
1436 SDValue SelectionDAG::getSrcValue(const Value *V) {
1437 assert((!V || V->getType()->isPointerTy()) &&
1438 "SrcValue is not a pointer?");
1440 FoldingSetNodeID ID;
1441 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1445 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1446 return SDValue(E, 0);
1448 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1449 CSEMap.InsertNode(N, IP);
1450 AllNodes.push_back(N);
1451 return SDValue(N, 0);
1454 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1455 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1456 FoldingSetNodeID ID;
1457 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1461 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1462 return SDValue(E, 0);
1464 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1465 CSEMap.InsertNode(N, IP);
1466 AllNodes.push_back(N);
1467 return SDValue(N, 0);
1471 /// getShiftAmountOperand - Return the specified value casted to
1472 /// the target's desired shift amount type.
1473 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1474 EVT OpTy = Op.getValueType();
1475 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1476 if (OpTy == ShTy || OpTy.isVector()) return Op;
1478 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1479 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1482 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1483 /// specified value type.
1484 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1485 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1486 unsigned ByteSize = VT.getStoreSize();
1487 Type *Ty = VT.getTypeForEVT(*getContext());
1488 unsigned StackAlign =
1489 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty), minAlign);
1491 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1492 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1495 /// CreateStackTemporary - Create a stack temporary suitable for holding
1496 /// either of the specified value types.
1497 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1498 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1499 VT2.getStoreSizeInBits())/8;
1500 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1501 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1502 const TargetData *TD = TLI.getTargetData();
1503 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1504 TD->getPrefTypeAlignment(Ty2));
1506 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1507 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1508 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1511 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1512 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1513 // These setcc operations always fold.
1517 case ISD::SETFALSE2: return getConstant(0, VT);
1519 case ISD::SETTRUE2: return getConstant(1, VT);
1531 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1535 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1536 const APInt &C2 = N2C->getAPIntValue();
1537 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1538 const APInt &C1 = N1C->getAPIntValue();
1541 default: llvm_unreachable("Unknown integer setcc!");
1542 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1543 case ISD::SETNE: return getConstant(C1 != C2, VT);
1544 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1545 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1546 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1547 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1548 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1549 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1550 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1551 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1555 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1556 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1557 // No compile time operations on this type yet.
1558 if (N1C->getValueType(0) == MVT::ppcf128)
1561 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1564 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1565 return getUNDEF(VT);
1567 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1568 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1569 return getUNDEF(VT);
1571 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1572 R==APFloat::cmpLessThan, VT);
1573 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1574 return getUNDEF(VT);
1576 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1577 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1578 return getUNDEF(VT);
1580 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1581 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1582 return getUNDEF(VT);
1584 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1585 R==APFloat::cmpEqual, VT);
1586 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1587 return getUNDEF(VT);
1589 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1590 R==APFloat::cmpEqual, VT);
1591 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1592 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1593 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1594 R==APFloat::cmpEqual, VT);
1595 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1596 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1597 R==APFloat::cmpLessThan, VT);
1598 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1599 R==APFloat::cmpUnordered, VT);
1600 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1601 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1604 // Ensure that the constant occurs on the RHS.
1605 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1609 // Could not fold it.
1613 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1614 /// use this predicate to simplify operations downstream.
1615 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1616 // This predicate is not safe for vector operations.
1617 if (Op.getValueType().isVector())
1620 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1621 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1624 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1625 /// this predicate to simplify operations downstream. Mask is known to be zero
1626 /// for bits that V cannot have.
1627 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1628 unsigned Depth) const {
1629 APInt KnownZero, KnownOne;
1630 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1631 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1632 return (KnownZero & Mask) == Mask;
1635 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1636 /// known to be either zero or one and return them in the KnownZero/KnownOne
1637 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1639 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1640 APInt &KnownOne, unsigned Depth) const {
1641 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1643 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1645 return; // Limit search depth.
1647 APInt KnownZero2, KnownOne2;
1649 switch (Op.getOpcode()) {
1651 // We know all of the bits for a constant!
1652 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1653 KnownZero = ~KnownOne;
1656 // If either the LHS or the RHS are Zero, the result is zero.
1657 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1658 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1659 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1660 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1662 // Output known-1 bits are only known if set in both the LHS & RHS.
1663 KnownOne &= KnownOne2;
1664 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1665 KnownZero |= KnownZero2;
1668 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1669 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1670 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1671 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1673 // Output known-0 bits are only known if clear in both the LHS & RHS.
1674 KnownZero &= KnownZero2;
1675 // Output known-1 are known to be set if set in either the LHS | RHS.
1676 KnownOne |= KnownOne2;
1679 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1680 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1681 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1682 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1684 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1685 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1686 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1687 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1688 KnownZero = KnownZeroOut;
1692 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1693 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1694 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1695 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1697 // If low bits are zero in either operand, output low known-0 bits.
1698 // Also compute a conserative estimate for high known-0 bits.
1699 // More trickiness is possible, but this is sufficient for the
1700 // interesting case of alignment computation.
1701 KnownOne.clearAllBits();
1702 unsigned TrailZ = KnownZero.countTrailingOnes() +
1703 KnownZero2.countTrailingOnes();
1704 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1705 KnownZero2.countLeadingOnes(),
1706 BitWidth) - BitWidth;
1708 TrailZ = std::min(TrailZ, BitWidth);
1709 LeadZ = std::min(LeadZ, BitWidth);
1710 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1711 APInt::getHighBitsSet(BitWidth, LeadZ);
1715 // For the purposes of computing leading zeros we can conservatively
1716 // treat a udiv as a logical right shift by the power of 2 known to
1717 // be less than the denominator.
1718 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1719 unsigned LeadZ = KnownZero2.countLeadingOnes();
1721 KnownOne2.clearAllBits();
1722 KnownZero2.clearAllBits();
1723 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1724 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1725 if (RHSUnknownLeadingOnes != BitWidth)
1726 LeadZ = std::min(BitWidth,
1727 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1729 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1733 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1734 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1735 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1736 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1738 // Only known if known in both the LHS and RHS.
1739 KnownOne &= KnownOne2;
1740 KnownZero &= KnownZero2;
1742 case ISD::SELECT_CC:
1743 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1744 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1745 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1746 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1748 // Only known if known in both the LHS and RHS.
1749 KnownOne &= KnownOne2;
1750 KnownZero &= KnownZero2;
1758 if (Op.getResNo() != 1)
1760 // The boolean result conforms to getBooleanContents. Fall through.
1762 // If we know the result of a setcc has the top bits zero, use this info.
1763 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1764 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1765 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1768 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1769 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1770 unsigned ShAmt = SA->getZExtValue();
1772 // If the shift count is an invalid immediate, don't do anything.
1773 if (ShAmt >= BitWidth)
1776 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1777 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1778 KnownZero <<= ShAmt;
1780 // low bits known zero.
1781 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1785 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1786 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1787 unsigned ShAmt = SA->getZExtValue();
1789 // If the shift count is an invalid immediate, don't do anything.
1790 if (ShAmt >= BitWidth)
1793 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1794 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1795 KnownZero = KnownZero.lshr(ShAmt);
1796 KnownOne = KnownOne.lshr(ShAmt);
1798 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1799 KnownZero |= HighBits; // High bits known zero.
1803 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1804 unsigned ShAmt = SA->getZExtValue();
1806 // If the shift count is an invalid immediate, don't do anything.
1807 if (ShAmt >= BitWidth)
1810 // If any of the demanded bits are produced by the sign extension, we also
1811 // demand the input sign bit.
1812 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1814 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1815 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1816 KnownZero = KnownZero.lshr(ShAmt);
1817 KnownOne = KnownOne.lshr(ShAmt);
1819 // Handle the sign bits.
1820 APInt SignBit = APInt::getSignBit(BitWidth);
1821 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1823 if (KnownZero.intersects(SignBit)) {
1824 KnownZero |= HighBits; // New bits are known zero.
1825 } else if (KnownOne.intersects(SignBit)) {
1826 KnownOne |= HighBits; // New bits are known one.
1830 case ISD::SIGN_EXTEND_INREG: {
1831 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1832 unsigned EBits = EVT.getScalarType().getSizeInBits();
1834 // Sign extension. Compute the demanded bits in the result that are not
1835 // present in the input.
1836 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1838 APInt InSignBit = APInt::getSignBit(EBits);
1839 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1841 // If the sign extended bits are demanded, we know that the sign
1843 InSignBit = InSignBit.zext(BitWidth);
1844 if (NewBits.getBoolValue())
1845 InputDemandedBits |= InSignBit;
1847 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1848 KnownOne &= InputDemandedBits;
1849 KnownZero &= InputDemandedBits;
1850 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1852 // If the sign bit of the input is known set or clear, then we know the
1853 // top bits of the result.
1854 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1855 KnownZero |= NewBits;
1856 KnownOne &= ~NewBits;
1857 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1858 KnownOne |= NewBits;
1859 KnownZero &= ~NewBits;
1860 } else { // Input sign bit unknown
1861 KnownZero &= ~NewBits;
1862 KnownOne &= ~NewBits;
1867 case ISD::CTTZ_ZERO_UNDEF:
1869 case ISD::CTLZ_ZERO_UNDEF:
1871 unsigned LowBits = Log2_32(BitWidth)+1;
1872 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1873 KnownOne.clearAllBits();
1877 LoadSDNode *LD = cast<LoadSDNode>(Op);
1878 if (ISD::isZEXTLoad(Op.getNode())) {
1879 EVT VT = LD->getMemoryVT();
1880 unsigned MemBits = VT.getScalarType().getSizeInBits();
1881 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1882 } else if (const MDNode *Ranges = LD->getRanges()) {
1883 computeMaskedBitsLoad(*Ranges, KnownZero);
1887 case ISD::ZERO_EXTEND: {
1888 EVT InVT = Op.getOperand(0).getValueType();
1889 unsigned InBits = InVT.getScalarType().getSizeInBits();
1890 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1891 KnownZero = KnownZero.trunc(InBits);
1892 KnownOne = KnownOne.trunc(InBits);
1893 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1894 KnownZero = KnownZero.zext(BitWidth);
1895 KnownOne = KnownOne.zext(BitWidth);
1896 KnownZero |= NewBits;
1899 case ISD::SIGN_EXTEND: {
1900 EVT InVT = Op.getOperand(0).getValueType();
1901 unsigned InBits = InVT.getScalarType().getSizeInBits();
1902 APInt InSignBit = APInt::getSignBit(InBits);
1903 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1905 KnownZero = KnownZero.trunc(InBits);
1906 KnownOne = KnownOne.trunc(InBits);
1907 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1909 // Note if the sign bit is known to be zero or one.
1910 bool SignBitKnownZero = KnownZero.isNegative();
1911 bool SignBitKnownOne = KnownOne.isNegative();
1912 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1913 "Sign bit can't be known to be both zero and one!");
1915 KnownZero = KnownZero.zext(BitWidth);
1916 KnownOne = KnownOne.zext(BitWidth);
1918 // If the sign bit is known zero or one, the top bits match.
1919 if (SignBitKnownZero)
1920 KnownZero |= NewBits;
1921 else if (SignBitKnownOne)
1922 KnownOne |= NewBits;
1925 case ISD::ANY_EXTEND: {
1926 EVT InVT = Op.getOperand(0).getValueType();
1927 unsigned InBits = InVT.getScalarType().getSizeInBits();
1928 KnownZero = KnownZero.trunc(InBits);
1929 KnownOne = KnownOne.trunc(InBits);
1930 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1931 KnownZero = KnownZero.zext(BitWidth);
1932 KnownOne = KnownOne.zext(BitWidth);
1935 case ISD::TRUNCATE: {
1936 EVT InVT = Op.getOperand(0).getValueType();
1937 unsigned InBits = InVT.getScalarType().getSizeInBits();
1938 KnownZero = KnownZero.zext(InBits);
1939 KnownOne = KnownOne.zext(InBits);
1940 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1941 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1942 KnownZero = KnownZero.trunc(BitWidth);
1943 KnownOne = KnownOne.trunc(BitWidth);
1946 case ISD::AssertZext: {
1947 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1948 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
1949 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1950 KnownZero |= (~InMask);
1954 // All bits are zero except the low bit.
1955 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1959 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
1960 // We know that the top bits of C-X are clear if X contains less bits
1961 // than C (i.e. no wrap-around can happen). For example, 20-X is
1962 // positive if we can prove that X is >= 0 and < 16.
1963 if (CLHS->getAPIntValue().isNonNegative()) {
1964 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
1965 // NLZ can't be BitWidth with no sign bit
1966 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
1967 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1969 // If all of the MaskV bits are known to be zero, then we know the
1970 // output top bits are zero, because we now know that the output is
1972 if ((KnownZero2 & MaskV) == MaskV) {
1973 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
1974 // Top bits known zero.
1975 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
1983 // Output known-0 bits are known if clear or set in both the low clear bits
1984 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
1985 // low 3 bits clear.
1986 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1987 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1988 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
1990 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1991 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1992 KnownZeroOut = std::min(KnownZeroOut,
1993 KnownZero2.countTrailingOnes());
1995 if (Op.getOpcode() == ISD::ADD) {
1996 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2000 // With ADDE, a carry bit may be added in, so we can only use this
2001 // information if we know (at least) that the low two bits are clear. We
2002 // then return to the caller that the low bit is unknown but that other bits
2004 if (KnownZeroOut >= 2) // ADDE
2005 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2009 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2010 const APInt &RA = Rem->getAPIntValue().abs();
2011 if (RA.isPowerOf2()) {
2012 APInt LowBits = RA - 1;
2013 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2014 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2016 // The low bits of the first operand are unchanged by the srem.
2017 KnownZero = KnownZero2 & LowBits;
2018 KnownOne = KnownOne2 & LowBits;
2020 // If the first operand is non-negative or has all low bits zero, then
2021 // the upper bits are all zero.
2022 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2023 KnownZero |= ~LowBits;
2025 // If the first operand is negative and not all low bits are zero, then
2026 // the upper bits are all one.
2027 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2028 KnownOne |= ~LowBits;
2029 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2034 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2035 const APInt &RA = Rem->getAPIntValue();
2036 if (RA.isPowerOf2()) {
2037 APInt LowBits = (RA - 1);
2038 KnownZero |= ~LowBits;
2039 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2040 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2045 // Since the result is less than or equal to either operand, any leading
2046 // zero bits in either operand must also exist in the result.
2047 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2048 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2050 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2051 KnownZero2.countLeadingOnes());
2052 KnownOne.clearAllBits();
2053 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2056 case ISD::FrameIndex:
2057 case ISD::TargetFrameIndex:
2058 if (unsigned Align = InferPtrAlignment(Op)) {
2059 // The low bits are known zero if the pointer is aligned.
2060 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2066 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2069 case ISD::INTRINSIC_WO_CHAIN:
2070 case ISD::INTRINSIC_W_CHAIN:
2071 case ISD::INTRINSIC_VOID:
2072 // Allow the target to implement this method for its nodes.
2073 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2078 /// ComputeNumSignBits - Return the number of times the sign bit of the
2079 /// register is replicated into the other bits. We know that at least 1 bit
2080 /// is always equal to the sign bit (itself), but other cases can give us
2081 /// information. For example, immediately after an "SRA X, 2", we know that
2082 /// the top 3 bits are all equal to each other, so we return 3.
2083 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2084 EVT VT = Op.getValueType();
2085 assert(VT.isInteger() && "Invalid VT!");
2086 unsigned VTBits = VT.getScalarType().getSizeInBits();
2088 unsigned FirstAnswer = 1;
2091 return 1; // Limit search depth.
2093 switch (Op.getOpcode()) {
2095 case ISD::AssertSext:
2096 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2097 return VTBits-Tmp+1;
2098 case ISD::AssertZext:
2099 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2102 case ISD::Constant: {
2103 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2104 return Val.getNumSignBits();
2107 case ISD::SIGN_EXTEND:
2108 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2109 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2111 case ISD::SIGN_EXTEND_INREG:
2112 // Max of the input and what this extends.
2114 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2117 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2118 return std::max(Tmp, Tmp2);
2121 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2122 // SRA X, C -> adds C sign bits.
2123 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2124 Tmp += C->getZExtValue();
2125 if (Tmp > VTBits) Tmp = VTBits;
2129 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2130 // shl destroys sign bits.
2131 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2132 if (C->getZExtValue() >= VTBits || // Bad shift.
2133 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2134 return Tmp - C->getZExtValue();
2139 case ISD::XOR: // NOT is handled here.
2140 // Logical binary ops preserve the number of sign bits at the worst.
2141 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2143 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2144 FirstAnswer = std::min(Tmp, Tmp2);
2145 // We computed what we know about the sign bits as our first
2146 // answer. Now proceed to the generic code that uses
2147 // ComputeMaskedBits, and pick whichever answer is better.
2152 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2153 if (Tmp == 1) return 1; // Early out.
2154 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2155 return std::min(Tmp, Tmp2);
2163 if (Op.getResNo() != 1)
2165 // The boolean result conforms to getBooleanContents. Fall through.
2167 // If setcc returns 0/-1, all bits are sign bits.
2168 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2169 TargetLowering::ZeroOrNegativeOneBooleanContent)
2174 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2175 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2177 // Handle rotate right by N like a rotate left by 32-N.
2178 if (Op.getOpcode() == ISD::ROTR)
2179 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2181 // If we aren't rotating out all of the known-in sign bits, return the
2182 // number that are left. This handles rotl(sext(x), 1) for example.
2183 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2184 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2188 // Add can have at most one carry bit. Thus we know that the output
2189 // is, at worst, one more bit than the inputs.
2190 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2191 if (Tmp == 1) return 1; // Early out.
2193 // Special case decrementing a value (ADD X, -1):
2194 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2195 if (CRHS->isAllOnesValue()) {
2196 APInt KnownZero, KnownOne;
2197 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2199 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2201 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2204 // If we are subtracting one from a positive number, there is no carry
2205 // out of the result.
2206 if (KnownZero.isNegative())
2210 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2211 if (Tmp2 == 1) return 1;
2212 return std::min(Tmp, Tmp2)-1;
2215 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2216 if (Tmp2 == 1) return 1;
2219 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2220 if (CLHS->isNullValue()) {
2221 APInt KnownZero, KnownOne;
2222 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2223 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2225 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2228 // If the input is known to be positive (the sign bit is known clear),
2229 // the output of the NEG has the same number of sign bits as the input.
2230 if (KnownZero.isNegative())
2233 // Otherwise, we treat this like a SUB.
2236 // Sub can have at most one carry bit. Thus we know that the output
2237 // is, at worst, one more bit than the inputs.
2238 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2239 if (Tmp == 1) return 1; // Early out.
2240 return std::min(Tmp, Tmp2)-1;
2242 // FIXME: it's tricky to do anything useful for this, but it is an important
2243 // case for targets like X86.
2247 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2248 if (Op.getOpcode() == ISD::LOAD) {
2249 LoadSDNode *LD = cast<LoadSDNode>(Op);
2250 unsigned ExtType = LD->getExtensionType();
2253 case ISD::SEXTLOAD: // '17' bits known
2254 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2255 return VTBits-Tmp+1;
2256 case ISD::ZEXTLOAD: // '16' bits known
2257 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2262 // Allow the target to implement this method for its nodes.
2263 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2264 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2265 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2266 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2267 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2268 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2271 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2272 // use this information.
2273 APInt KnownZero, KnownOne;
2274 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2277 if (KnownZero.isNegative()) { // sign bit is 0
2279 } else if (KnownOne.isNegative()) { // sign bit is 1;
2286 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2287 // the number of identical bits in the top of the input value.
2289 Mask <<= Mask.getBitWidth()-VTBits;
2290 // Return # leading zeros. We use 'min' here in case Val was zero before
2291 // shifting. We don't want to return '64' as for an i32 "0".
2292 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2295 /// isBaseWithConstantOffset - Return true if the specified operand is an
2296 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2297 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2298 /// semantics as an ADD. This handles the equivalence:
2299 /// X|Cst == X+Cst iff X&Cst = 0.
2300 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2301 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2302 !isa<ConstantSDNode>(Op.getOperand(1)))
2305 if (Op.getOpcode() == ISD::OR &&
2306 !MaskedValueIsZero(Op.getOperand(0),
2307 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2314 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2315 // If we're told that NaNs won't happen, assume they won't.
2316 if (getTarget().Options.NoNaNsFPMath)
2319 // If the value is a constant, we can obviously see if it is a NaN or not.
2320 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2321 return !C->getValueAPF().isNaN();
2323 // TODO: Recognize more cases here.
2328 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2329 // If the value is a constant, we can obviously see if it is a zero or not.
2330 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2331 return !C->isZero();
2333 // TODO: Recognize more cases here.
2334 switch (Op.getOpcode()) {
2337 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2338 return !C->isNullValue();
2345 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2346 // Check the obvious case.
2347 if (A == B) return true;
2349 // For for negative and positive zero.
2350 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2351 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2352 if (CA->isZero() && CB->isZero()) return true;
2354 // Otherwise they may not be equal.
2358 /// getNode - Gets or creates the specified node.
2360 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2361 FoldingSetNodeID ID;
2362 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2364 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2365 return SDValue(E, 0);
2367 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2368 CSEMap.InsertNode(N, IP);
2370 AllNodes.push_back(N);
2374 return SDValue(N, 0);
2377 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2378 EVT VT, SDValue Operand) {
2379 // Constant fold unary operations with an integer constant operand.
2380 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2381 const APInt &Val = C->getAPIntValue();
2384 case ISD::SIGN_EXTEND:
2385 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2386 case ISD::ANY_EXTEND:
2387 case ISD::ZERO_EXTEND:
2389 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2390 case ISD::UINT_TO_FP:
2391 case ISD::SINT_TO_FP: {
2392 // No compile time operations on ppcf128.
2393 if (VT == MVT::ppcf128) break;
2394 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2395 (void)apf.convertFromAPInt(Val,
2396 Opcode==ISD::SINT_TO_FP,
2397 APFloat::rmNearestTiesToEven);
2398 return getConstantFP(apf, VT);
2401 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2402 return getConstantFP(Val.bitsToFloat(), VT);
2403 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2404 return getConstantFP(Val.bitsToDouble(), VT);
2407 return getConstant(Val.byteSwap(), VT);
2409 return getConstant(Val.countPopulation(), VT);
2411 case ISD::CTLZ_ZERO_UNDEF:
2412 return getConstant(Val.countLeadingZeros(), VT);
2414 case ISD::CTTZ_ZERO_UNDEF:
2415 return getConstant(Val.countTrailingZeros(), VT);
2419 // Constant fold unary operations with a floating point constant operand.
2420 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2421 APFloat V = C->getValueAPF(); // make copy
2422 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2426 return getConstantFP(V, VT);
2429 return getConstantFP(V, VT);
2431 case ISD::FP_EXTEND: {
2433 // This can return overflow, underflow, or inexact; we don't care.
2434 // FIXME need to be more flexible about rounding mode.
2435 (void)V.convert(*EVTToAPFloatSemantics(VT),
2436 APFloat::rmNearestTiesToEven, &ignored);
2437 return getConstantFP(V, VT);
2439 case ISD::FP_TO_SINT:
2440 case ISD::FP_TO_UINT: {
2443 assert(integerPartWidth >= 64);
2444 // FIXME need to be more flexible about rounding mode.
2445 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2446 Opcode==ISD::FP_TO_SINT,
2447 APFloat::rmTowardZero, &ignored);
2448 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2450 APInt api(VT.getSizeInBits(), x);
2451 return getConstant(api, VT);
2454 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2455 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2456 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2457 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2463 unsigned OpOpcode = Operand.getNode()->getOpcode();
2465 case ISD::TokenFactor:
2466 case ISD::MERGE_VALUES:
2467 case ISD::CONCAT_VECTORS:
2468 return Operand; // Factor, merge or concat of one node? No need.
2469 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2470 case ISD::FP_EXTEND:
2471 assert(VT.isFloatingPoint() &&
2472 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2473 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2474 assert((!VT.isVector() ||
2475 VT.getVectorNumElements() ==
2476 Operand.getValueType().getVectorNumElements()) &&
2477 "Vector element count mismatch!");
2478 if (Operand.getOpcode() == ISD::UNDEF)
2479 return getUNDEF(VT);
2481 case ISD::SIGN_EXTEND:
2482 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2483 "Invalid SIGN_EXTEND!");
2484 if (Operand.getValueType() == VT) return Operand; // noop extension
2485 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2486 "Invalid sext node, dst < src!");
2487 assert((!VT.isVector() ||
2488 VT.getVectorNumElements() ==
2489 Operand.getValueType().getVectorNumElements()) &&
2490 "Vector element count mismatch!");
2491 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2492 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2493 else if (OpOpcode == ISD::UNDEF)
2494 // sext(undef) = 0, because the top bits will all be the same.
2495 return getConstant(0, VT);
2497 case ISD::ZERO_EXTEND:
2498 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2499 "Invalid ZERO_EXTEND!");
2500 if (Operand.getValueType() == VT) return Operand; // noop extension
2501 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2502 "Invalid zext node, dst < src!");
2503 assert((!VT.isVector() ||
2504 VT.getVectorNumElements() ==
2505 Operand.getValueType().getVectorNumElements()) &&
2506 "Vector element count mismatch!");
2507 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2508 return getNode(ISD::ZERO_EXTEND, DL, VT,
2509 Operand.getNode()->getOperand(0));
2510 else if (OpOpcode == ISD::UNDEF)
2511 // zext(undef) = 0, because the top bits will be zero.
2512 return getConstant(0, VT);
2514 case ISD::ANY_EXTEND:
2515 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2516 "Invalid ANY_EXTEND!");
2517 if (Operand.getValueType() == VT) return Operand; // noop extension
2518 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2519 "Invalid anyext node, dst < src!");
2520 assert((!VT.isVector() ||
2521 VT.getVectorNumElements() ==
2522 Operand.getValueType().getVectorNumElements()) &&
2523 "Vector element count mismatch!");
2525 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2526 OpOpcode == ISD::ANY_EXTEND)
2527 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2528 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2529 else if (OpOpcode == ISD::UNDEF)
2530 return getUNDEF(VT);
2532 // (ext (trunx x)) -> x
2533 if (OpOpcode == ISD::TRUNCATE) {
2534 SDValue OpOp = Operand.getNode()->getOperand(0);
2535 if (OpOp.getValueType() == VT)
2540 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2541 "Invalid TRUNCATE!");
2542 if (Operand.getValueType() == VT) return Operand; // noop truncate
2543 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2544 "Invalid truncate node, src < dst!");
2545 assert((!VT.isVector() ||
2546 VT.getVectorNumElements() ==
2547 Operand.getValueType().getVectorNumElements()) &&
2548 "Vector element count mismatch!");
2549 if (OpOpcode == ISD::TRUNCATE)
2550 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2551 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2552 OpOpcode == ISD::ANY_EXTEND) {
2553 // If the source is smaller than the dest, we still need an extend.
2554 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2555 .bitsLT(VT.getScalarType()))
2556 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2557 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2558 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2559 return Operand.getNode()->getOperand(0);
2561 if (OpOpcode == ISD::UNDEF)
2562 return getUNDEF(VT);
2565 // Basic sanity checking.
2566 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2567 && "Cannot BITCAST between types of different sizes!");
2568 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2569 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2570 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2571 if (OpOpcode == ISD::UNDEF)
2572 return getUNDEF(VT);
2574 case ISD::SCALAR_TO_VECTOR:
2575 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2576 (VT.getVectorElementType() == Operand.getValueType() ||
2577 (VT.getVectorElementType().isInteger() &&
2578 Operand.getValueType().isInteger() &&
2579 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2580 "Illegal SCALAR_TO_VECTOR node!");
2581 if (OpOpcode == ISD::UNDEF)
2582 return getUNDEF(VT);
2583 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2584 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2585 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2586 Operand.getConstantOperandVal(1) == 0 &&
2587 Operand.getOperand(0).getValueType() == VT)
2588 return Operand.getOperand(0);
2591 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2592 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2593 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2594 Operand.getNode()->getOperand(0));
2595 if (OpOpcode == ISD::FNEG) // --X -> X
2596 return Operand.getNode()->getOperand(0);
2599 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2600 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2605 SDVTList VTs = getVTList(VT);
2606 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2607 FoldingSetNodeID ID;
2608 SDValue Ops[1] = { Operand };
2609 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2611 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2612 return SDValue(E, 0);
2614 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2615 CSEMap.InsertNode(N, IP);
2617 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2620 AllNodes.push_back(N);
2624 return SDValue(N, 0);
2627 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2629 ConstantSDNode *Cst1,
2630 ConstantSDNode *Cst2) {
2631 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2634 case ISD::ADD: return getConstant(C1 + C2, VT);
2635 case ISD::SUB: return getConstant(C1 - C2, VT);
2636 case ISD::MUL: return getConstant(C1 * C2, VT);
2638 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2641 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2644 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2647 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2649 case ISD::AND: return getConstant(C1 & C2, VT);
2650 case ISD::OR: return getConstant(C1 | C2, VT);
2651 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2652 case ISD::SHL: return getConstant(C1 << C2, VT);
2653 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2654 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2655 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2656 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2663 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2664 SDValue N1, SDValue N2) {
2665 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2666 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2669 case ISD::TokenFactor:
2670 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2671 N2.getValueType() == MVT::Other && "Invalid token factor!");
2672 // Fold trivial token factors.
2673 if (N1.getOpcode() == ISD::EntryToken) return N2;
2674 if (N2.getOpcode() == ISD::EntryToken) return N1;
2675 if (N1 == N2) return N1;
2677 case ISD::CONCAT_VECTORS:
2678 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2679 // one big BUILD_VECTOR.
2680 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2681 N2.getOpcode() == ISD::BUILD_VECTOR) {
2682 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2683 N1.getNode()->op_end());
2684 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2685 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2689 assert(VT.isInteger() && "This operator does not apply to FP types!");
2690 assert(N1.getValueType() == N2.getValueType() &&
2691 N1.getValueType() == VT && "Binary operator types must match!");
2692 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2693 // worth handling here.
2694 if (N2C && N2C->isNullValue())
2696 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2703 assert(VT.isInteger() && "This operator does not apply to FP types!");
2704 assert(N1.getValueType() == N2.getValueType() &&
2705 N1.getValueType() == VT && "Binary operator types must match!");
2706 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2707 // it's worth handling here.
2708 if (N2C && N2C->isNullValue())
2718 assert(VT.isInteger() && "This operator does not apply to FP types!");
2719 assert(N1.getValueType() == N2.getValueType() &&
2720 N1.getValueType() == VT && "Binary operator types must match!");
2727 if (getTarget().Options.UnsafeFPMath) {
2728 if (Opcode == ISD::FADD) {
2730 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2731 if (CFP->getValueAPF().isZero())
2734 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2735 if (CFP->getValueAPF().isZero())
2737 } else if (Opcode == ISD::FSUB) {
2739 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2740 if (CFP->getValueAPF().isZero())
2744 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2745 assert(N1.getValueType() == N2.getValueType() &&
2746 N1.getValueType() == VT && "Binary operator types must match!");
2748 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2749 assert(N1.getValueType() == VT &&
2750 N1.getValueType().isFloatingPoint() &&
2751 N2.getValueType().isFloatingPoint() &&
2752 "Invalid FCOPYSIGN!");
2759 assert(VT == N1.getValueType() &&
2760 "Shift operators return type must be the same as their first arg");
2761 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2762 "Shifts only work on integers");
2763 // Verify that the shift amount VT is bit enough to hold valid shift
2764 // amounts. This catches things like trying to shift an i1024 value by an
2765 // i8, which is easy to fall into in generic code that uses
2766 // TLI.getShiftAmount().
2767 assert(N2.getValueType().getSizeInBits() >=
2768 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2769 "Invalid use of small shift amount with oversized value!");
2771 // Always fold shifts of i1 values so the code generator doesn't need to
2772 // handle them. Since we know the size of the shift has to be less than the
2773 // size of the value, the shift/rotate count is guaranteed to be zero.
2776 if (N2C && N2C->isNullValue())
2779 case ISD::FP_ROUND_INREG: {
2780 EVT EVT = cast<VTSDNode>(N2)->getVT();
2781 assert(VT == N1.getValueType() && "Not an inreg round!");
2782 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2783 "Cannot FP_ROUND_INREG integer types");
2784 assert(EVT.isVector() == VT.isVector() &&
2785 "FP_ROUND_INREG type should be vector iff the operand "
2787 assert((!EVT.isVector() ||
2788 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2789 "Vector element counts must match in FP_ROUND_INREG");
2790 assert(EVT.bitsLE(VT) && "Not rounding down!");
2792 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2796 assert(VT.isFloatingPoint() &&
2797 N1.getValueType().isFloatingPoint() &&
2798 VT.bitsLE(N1.getValueType()) &&
2799 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2800 if (N1.getValueType() == VT) return N1; // noop conversion.
2802 case ISD::AssertSext:
2803 case ISD::AssertZext: {
2804 EVT EVT = cast<VTSDNode>(N2)->getVT();
2805 assert(VT == N1.getValueType() && "Not an inreg extend!");
2806 assert(VT.isInteger() && EVT.isInteger() &&
2807 "Cannot *_EXTEND_INREG FP types");
2808 assert(!EVT.isVector() &&
2809 "AssertSExt/AssertZExt type should be the vector element type "
2810 "rather than the vector type!");
2811 assert(EVT.bitsLE(VT) && "Not extending!");
2812 if (VT == EVT) return N1; // noop assertion.
2815 case ISD::SIGN_EXTEND_INREG: {
2816 EVT EVT = cast<VTSDNode>(N2)->getVT();
2817 assert(VT == N1.getValueType() && "Not an inreg extend!");
2818 assert(VT.isInteger() && EVT.isInteger() &&
2819 "Cannot *_EXTEND_INREG FP types");
2820 assert(EVT.isVector() == VT.isVector() &&
2821 "SIGN_EXTEND_INREG type should be vector iff the operand "
2823 assert((!EVT.isVector() ||
2824 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2825 "Vector element counts must match in SIGN_EXTEND_INREG");
2826 assert(EVT.bitsLE(VT) && "Not extending!");
2827 if (EVT == VT) return N1; // Not actually extending
2830 APInt Val = N1C->getAPIntValue();
2831 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2832 Val <<= Val.getBitWidth()-FromBits;
2833 Val = Val.ashr(Val.getBitWidth()-FromBits);
2834 return getConstant(Val, VT);
2838 case ISD::EXTRACT_VECTOR_ELT:
2839 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2840 if (N1.getOpcode() == ISD::UNDEF)
2841 return getUNDEF(VT);
2843 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2844 // expanding copies of large vectors from registers.
2846 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2847 N1.getNumOperands() > 0) {
2849 N1.getOperand(0).getValueType().getVectorNumElements();
2850 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2851 N1.getOperand(N2C->getZExtValue() / Factor),
2852 getConstant(N2C->getZExtValue() % Factor,
2853 N2.getValueType()));
2856 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2857 // expanding large vector constants.
2858 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2859 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2860 EVT VEltTy = N1.getValueType().getVectorElementType();
2861 if (Elt.getValueType() != VEltTy) {
2862 // If the vector element type is not legal, the BUILD_VECTOR operands
2863 // are promoted and implicitly truncated. Make that explicit here.
2864 Elt = getNode(ISD::TRUNCATE, DL, VEltTy, Elt);
2867 // If the vector element type is not legal, the EXTRACT_VECTOR_ELT
2868 // result is implicitly extended.
2869 Elt = getNode(ISD::ANY_EXTEND, DL, VT, Elt);
2874 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2875 // operations are lowered to scalars.
2876 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2877 // If the indices are the same, return the inserted element else
2878 // if the indices are known different, extract the element from
2879 // the original vector.
2880 SDValue N1Op2 = N1.getOperand(2);
2881 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2883 if (N1Op2C && N2C) {
2884 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2885 if (VT == N1.getOperand(1).getValueType())
2886 return N1.getOperand(1);
2888 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2891 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2895 case ISD::EXTRACT_ELEMENT:
2896 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2897 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2898 (N1.getValueType().isInteger() == VT.isInteger()) &&
2899 N1.getValueType() != VT &&
2900 "Wrong types for EXTRACT_ELEMENT!");
2902 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2903 // 64-bit integers into 32-bit parts. Instead of building the extract of
2904 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2905 if (N1.getOpcode() == ISD::BUILD_PAIR)
2906 return N1.getOperand(N2C->getZExtValue());
2908 // EXTRACT_ELEMENT of a constant int is also very common.
2909 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
2910 unsigned ElementSize = VT.getSizeInBits();
2911 unsigned Shift = ElementSize * N2C->getZExtValue();
2912 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
2913 return getConstant(ShiftedVal.trunc(ElementSize), VT);
2916 case ISD::EXTRACT_SUBVECTOR: {
2918 if (VT.isSimple() && N1.getValueType().isSimple()) {
2919 assert(VT.isVector() && N1.getValueType().isVector() &&
2920 "Extract subvector VTs must be a vectors!");
2921 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
2922 "Extract subvector VTs must have the same element type!");
2923 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
2924 "Extract subvector must be from larger vector to smaller vector!");
2926 if (isa<ConstantSDNode>(Index.getNode())) {
2927 assert((VT.getVectorNumElements() +
2928 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
2929 <= N1.getValueType().getVectorNumElements())
2930 && "Extract subvector overflow!");
2933 // Trivial extraction.
2934 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
2943 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
2944 if (SV.getNode()) return SV;
2945 } else { // Cannonicalize constant to RHS if commutative
2946 if (isCommutativeBinOp(Opcode)) {
2947 std::swap(N1C, N2C);
2953 // Constant fold FP operations.
2954 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
2955 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
2957 if (!N2CFP && isCommutativeBinOp(Opcode)) {
2958 // Cannonicalize constant to RHS if commutative
2959 std::swap(N1CFP, N2CFP);
2961 } else if (N2CFP && VT != MVT::ppcf128) {
2962 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
2963 APFloat::opStatus s;
2966 s = V1.add(V2, APFloat::rmNearestTiesToEven);
2967 if (s != APFloat::opInvalidOp)
2968 return getConstantFP(V1, VT);
2971 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
2972 if (s!=APFloat::opInvalidOp)
2973 return getConstantFP(V1, VT);
2976 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
2977 if (s!=APFloat::opInvalidOp)
2978 return getConstantFP(V1, VT);
2981 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
2982 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2983 return getConstantFP(V1, VT);
2986 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
2987 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
2988 return getConstantFP(V1, VT);
2990 case ISD::FCOPYSIGN:
2992 return getConstantFP(V1, VT);
2998 // Canonicalize an UNDEF to the RHS, even over a constant.
2999 if (N1.getOpcode() == ISD::UNDEF) {
3000 if (isCommutativeBinOp(Opcode)) {
3004 case ISD::FP_ROUND_INREG:
3005 case ISD::SIGN_EXTEND_INREG:
3011 return N1; // fold op(undef, arg2) -> undef
3019 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3020 // For vectors, we can't easily build an all zero vector, just return
3027 // Fold a bunch of operators when the RHS is undef.
3028 if (N2.getOpcode() == ISD::UNDEF) {
3031 if (N1.getOpcode() == ISD::UNDEF)
3032 // Handle undef ^ undef -> 0 special case. This is a common
3034 return getConstant(0, VT);
3044 return N2; // fold op(arg1, undef) -> undef
3050 if (getTarget().Options.UnsafeFPMath)
3058 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3059 // For vectors, we can't easily build an all zero vector, just return
3064 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3065 // For vectors, we can't easily build an all one vector, just return
3073 // Memoize this node if possible.
3075 SDVTList VTs = getVTList(VT);
3076 if (VT != MVT::Glue) {
3077 SDValue Ops[] = { N1, N2 };
3078 FoldingSetNodeID ID;
3079 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3081 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3082 return SDValue(E, 0);
3084 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3085 CSEMap.InsertNode(N, IP);
3087 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3090 AllNodes.push_back(N);
3094 return SDValue(N, 0);
3097 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3098 SDValue N1, SDValue N2, SDValue N3) {
3099 // Perform various simplifications.
3100 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3102 case ISD::CONCAT_VECTORS:
3103 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3104 // one big BUILD_VECTOR.
3105 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3106 N2.getOpcode() == ISD::BUILD_VECTOR &&
3107 N3.getOpcode() == ISD::BUILD_VECTOR) {
3108 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3109 N1.getNode()->op_end());
3110 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3111 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3112 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3116 // Use FoldSetCC to simplify SETCC's.
3117 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3118 if (Simp.getNode()) return Simp;
3123 if (N1C->getZExtValue())
3124 return N2; // select true, X, Y -> X
3125 return N3; // select false, X, Y -> Y
3128 if (N2 == N3) return N2; // select C, X, X -> X
3130 case ISD::VECTOR_SHUFFLE:
3131 llvm_unreachable("should use getVectorShuffle constructor!");
3132 case ISD::INSERT_SUBVECTOR: {
3134 if (VT.isSimple() && N1.getValueType().isSimple()
3135 && N2.getValueType().isSimple()) {
3136 assert(VT.isVector() && N1.getValueType().isVector() &&
3137 N2.getValueType().isVector() &&
3138 "Insert subvector VTs must be a vectors");
3139 assert(VT == N1.getValueType() &&
3140 "Dest and insert subvector source types must match!");
3141 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3142 "Insert subvector must be from smaller vector to larger vector!");
3143 if (isa<ConstantSDNode>(Index.getNode())) {
3144 assert((N2.getValueType().getVectorNumElements() +
3145 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3146 <= VT.getVectorNumElements())
3147 && "Insert subvector overflow!");
3150 // Trivial insertion.
3151 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3157 // Fold bit_convert nodes from a type to themselves.
3158 if (N1.getValueType() == VT)
3163 // Memoize node if it doesn't produce a flag.
3165 SDVTList VTs = getVTList(VT);
3166 if (VT != MVT::Glue) {
3167 SDValue Ops[] = { N1, N2, N3 };
3168 FoldingSetNodeID ID;
3169 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3171 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3172 return SDValue(E, 0);
3174 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3175 CSEMap.InsertNode(N, IP);
3177 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3180 AllNodes.push_back(N);
3184 return SDValue(N, 0);
3187 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3188 SDValue N1, SDValue N2, SDValue N3,
3190 SDValue Ops[] = { N1, N2, N3, N4 };
3191 return getNode(Opcode, DL, VT, Ops, 4);
3194 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3195 SDValue N1, SDValue N2, SDValue N3,
3196 SDValue N4, SDValue N5) {
3197 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3198 return getNode(Opcode, DL, VT, Ops, 5);
3201 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3202 /// the incoming stack arguments to be loaded from the stack.
3203 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3204 SmallVector<SDValue, 8> ArgChains;
3206 // Include the original chain at the beginning of the list. When this is
3207 // used by target LowerCall hooks, this helps legalize find the
3208 // CALLSEQ_BEGIN node.
3209 ArgChains.push_back(Chain);
3211 // Add a chain value for each stack argument.
3212 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3213 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3214 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3215 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3216 if (FI->getIndex() < 0)
3217 ArgChains.push_back(SDValue(L, 1));
3219 // Build a tokenfactor for all the chains.
3220 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3221 &ArgChains[0], ArgChains.size());
3224 /// SplatByte - Distribute ByteVal over NumBits bits.
3225 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3226 APInt Val = APInt(NumBits, ByteVal);
3228 for (unsigned i = NumBits; i > 8; i >>= 1) {
3229 Val = (Val << Shift) | Val;
3235 /// getMemsetValue - Vectorized representation of the memset value
3237 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3239 assert(Value.getOpcode() != ISD::UNDEF);
3241 unsigned NumBits = VT.getScalarType().getSizeInBits();
3242 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3243 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3245 return DAG.getConstant(Val, VT);
3246 return DAG.getConstantFP(APFloat(Val), VT);
3249 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3251 // Use a multiplication with 0x010101... to extend the input to the
3253 APInt Magic = SplatByte(NumBits, 0x01);
3254 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3260 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3261 /// used when a memcpy is turned into a memset when the source is a constant
3263 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3264 const TargetLowering &TLI, StringRef Str) {
3265 // Handle vector with all elements zero.
3268 return DAG.getConstant(0, VT);
3269 else if (VT == MVT::f32 || VT == MVT::f64)
3270 return DAG.getConstantFP(0.0, VT);
3271 else if (VT.isVector()) {
3272 unsigned NumElts = VT.getVectorNumElements();
3273 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3274 return DAG.getNode(ISD::BITCAST, dl, VT,
3275 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3278 llvm_unreachable("Expected type!");
3281 assert(!VT.isVector() && "Can't handle vector type here!");
3282 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3283 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3286 if (TLI.isLittleEndian()) {
3287 for (unsigned i = 0; i != NumBytes; ++i)
3288 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3290 for (unsigned i = 0; i != NumBytes; ++i)
3291 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3294 return DAG.getConstant(Val, VT);
3297 /// getMemBasePlusOffset - Returns base and offset node for the
3299 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3300 SelectionDAG &DAG) {
3301 EVT VT = Base.getValueType();
3302 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3303 VT, Base, DAG.getConstant(Offset, VT));
3306 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3308 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3309 unsigned SrcDelta = 0;
3310 GlobalAddressSDNode *G = NULL;
3311 if (Src.getOpcode() == ISD::GlobalAddress)
3312 G = cast<GlobalAddressSDNode>(Src);
3313 else if (Src.getOpcode() == ISD::ADD &&
3314 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3315 Src.getOperand(1).getOpcode() == ISD::Constant) {
3316 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3317 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3322 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3325 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3326 /// to replace the memset / memcpy. Return true if the number of memory ops
3327 /// is below the threshold. It returns the types of the sequence of
3328 /// memory ops to perform memset / memcpy by reference.
3329 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3330 unsigned Limit, uint64_t Size,
3331 unsigned DstAlign, unsigned SrcAlign,
3335 const TargetLowering &TLI) {
3336 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3337 "Expecting memcpy / memset source to meet alignment requirement!");
3338 // If 'SrcAlign' is zero, that means the memory operation does not need to
3339 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3340 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3341 // is the specified alignment of the memory operation. If it is zero, that
3342 // means it's possible to change the alignment of the destination.
3343 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3344 // not need to be loaded.
3345 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3346 IsZeroVal, MemcpyStrSrc,
3347 DAG.getMachineFunction());
3349 if (VT == MVT::Other) {
3350 if (DstAlign >= TLI.getTargetData()->getPointerPrefAlignment() ||
3351 TLI.allowsUnalignedMemoryAccesses(VT)) {
3352 VT = TLI.getPointerTy();
3354 switch (DstAlign & 7) {
3355 case 0: VT = MVT::i64; break;
3356 case 4: VT = MVT::i32; break;
3357 case 2: VT = MVT::i16; break;
3358 default: VT = MVT::i8; break;
3363 while (!TLI.isTypeLegal(LVT))
3364 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3365 assert(LVT.isInteger());
3371 unsigned NumMemOps = 0;
3373 unsigned VTSize = VT.getSizeInBits() / 8;
3374 while (VTSize > Size) {
3375 // For now, only use non-vector load / store's for the left-over pieces.
3376 if (VT.isVector() || VT.isFloatingPoint()) {
3378 while (!TLI.isTypeLegal(VT))
3379 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3380 VTSize = VT.getSizeInBits() / 8;
3382 // This can result in a type that is not legal on the target, e.g.
3383 // 1 or 2 bytes on PPC.
3384 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3389 if (++NumMemOps > Limit)
3391 MemOps.push_back(VT);
3398 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3399 SDValue Chain, SDValue Dst,
3400 SDValue Src, uint64_t Size,
3401 unsigned Align, bool isVol,
3403 MachinePointerInfo DstPtrInfo,
3404 MachinePointerInfo SrcPtrInfo) {
3405 // Turn a memcpy of undef to nop.
3406 if (Src.getOpcode() == ISD::UNDEF)
3409 // Expand memcpy to a series of load and store ops if the size operand falls
3410 // below a certain threshold.
3411 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3412 // rather than maybe a humongous number of loads and stores.
3413 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3414 std::vector<EVT> MemOps;
3415 bool DstAlignCanChange = false;
3416 MachineFunction &MF = DAG.getMachineFunction();
3417 MachineFrameInfo *MFI = MF.getFrameInfo();
3418 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3419 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3420 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3421 DstAlignCanChange = true;
3422 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3423 if (Align > SrcAlign)
3426 bool CopyFromStr = isMemSrcFromString(Src, Str);
3427 bool isZeroStr = CopyFromStr && Str.empty();
3428 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3430 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3431 (DstAlignCanChange ? 0 : Align),
3432 (isZeroStr ? 0 : SrcAlign),
3433 true, CopyFromStr, DAG, TLI))
3436 if (DstAlignCanChange) {
3437 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3438 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3439 if (NewAlign > Align) {
3440 // Give the stack frame object a larger alignment if needed.
3441 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3442 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3447 SmallVector<SDValue, 8> OutChains;
3448 unsigned NumMemOps = MemOps.size();
3449 uint64_t SrcOff = 0, DstOff = 0;
3450 for (unsigned i = 0; i != NumMemOps; ++i) {
3452 unsigned VTSize = VT.getSizeInBits() / 8;
3453 SDValue Value, Store;
3456 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3457 // It's unlikely a store of a vector immediate can be done in a single
3458 // instruction. It would require a load from a constantpool first.
3459 // We only handle zero vectors here.
3460 // FIXME: Handle other cases where store of vector immediate is done in
3461 // a single instruction.
3462 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3463 Store = DAG.getStore(Chain, dl, Value,
3464 getMemBasePlusOffset(Dst, DstOff, DAG),
3465 DstPtrInfo.getWithOffset(DstOff), isVol,
3468 // The type might not be legal for the target. This should only happen
3469 // if the type is smaller than a legal type, as on PPC, so the right
3470 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3471 // to Load/Store if NVT==VT.
3472 // FIXME does the case above also need this?
3473 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3474 assert(NVT.bitsGE(VT));
3475 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3476 getMemBasePlusOffset(Src, SrcOff, DAG),
3477 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3478 MinAlign(SrcAlign, SrcOff));
3479 Store = DAG.getTruncStore(Chain, dl, Value,
3480 getMemBasePlusOffset(Dst, DstOff, DAG),
3481 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3484 OutChains.push_back(Store);
3489 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3490 &OutChains[0], OutChains.size());
3493 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3494 SDValue Chain, SDValue Dst,
3495 SDValue Src, uint64_t Size,
3496 unsigned Align, bool isVol,
3498 MachinePointerInfo DstPtrInfo,
3499 MachinePointerInfo SrcPtrInfo) {
3500 // Turn a memmove of undef to nop.
3501 if (Src.getOpcode() == ISD::UNDEF)
3504 // Expand memmove to a series of load and store ops if the size operand falls
3505 // below a certain threshold.
3506 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3507 std::vector<EVT> MemOps;
3508 bool DstAlignCanChange = false;
3509 MachineFunction &MF = DAG.getMachineFunction();
3510 MachineFrameInfo *MFI = MF.getFrameInfo();
3511 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3512 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3513 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3514 DstAlignCanChange = true;
3515 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3516 if (Align > SrcAlign)
3518 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3520 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3521 (DstAlignCanChange ? 0 : Align),
3522 SrcAlign, true, false, DAG, TLI))
3525 if (DstAlignCanChange) {
3526 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3527 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3528 if (NewAlign > Align) {
3529 // Give the stack frame object a larger alignment if needed.
3530 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3531 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3536 uint64_t SrcOff = 0, DstOff = 0;
3537 SmallVector<SDValue, 8> LoadValues;
3538 SmallVector<SDValue, 8> LoadChains;
3539 SmallVector<SDValue, 8> OutChains;
3540 unsigned NumMemOps = MemOps.size();
3541 for (unsigned i = 0; i < NumMemOps; i++) {
3543 unsigned VTSize = VT.getSizeInBits() / 8;
3544 SDValue Value, Store;
3546 Value = DAG.getLoad(VT, dl, Chain,
3547 getMemBasePlusOffset(Src, SrcOff, DAG),
3548 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3549 false, false, SrcAlign);
3550 LoadValues.push_back(Value);
3551 LoadChains.push_back(Value.getValue(1));
3554 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3555 &LoadChains[0], LoadChains.size());
3557 for (unsigned i = 0; i < NumMemOps; i++) {
3559 unsigned VTSize = VT.getSizeInBits() / 8;
3560 SDValue Value, Store;
3562 Store = DAG.getStore(Chain, dl, LoadValues[i],
3563 getMemBasePlusOffset(Dst, DstOff, DAG),
3564 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3565 OutChains.push_back(Store);
3569 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3570 &OutChains[0], OutChains.size());
3573 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3574 SDValue Chain, SDValue Dst,
3575 SDValue Src, uint64_t Size,
3576 unsigned Align, bool isVol,
3577 MachinePointerInfo DstPtrInfo) {
3578 // Turn a memset of undef to nop.
3579 if (Src.getOpcode() == ISD::UNDEF)
3582 // Expand memset to a series of load/store ops if the size operand
3583 // falls below a certain threshold.
3584 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3585 std::vector<EVT> MemOps;
3586 bool DstAlignCanChange = false;
3587 MachineFunction &MF = DAG.getMachineFunction();
3588 MachineFrameInfo *MFI = MF.getFrameInfo();
3589 bool OptSize = MF.getFunction()->hasFnAttr(Attribute::OptimizeForSize);
3590 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3591 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3592 DstAlignCanChange = true;
3594 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3595 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3596 Size, (DstAlignCanChange ? 0 : Align), 0,
3597 IsZeroVal, false, DAG, TLI))
3600 if (DstAlignCanChange) {
3601 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3602 unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(Ty);
3603 if (NewAlign > Align) {
3604 // Give the stack frame object a larger alignment if needed.
3605 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3606 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3611 SmallVector<SDValue, 8> OutChains;
3612 uint64_t DstOff = 0;
3613 unsigned NumMemOps = MemOps.size();
3615 // Find the largest store and generate the bit pattern for it.
3616 EVT LargestVT = MemOps[0];
3617 for (unsigned i = 1; i < NumMemOps; i++)
3618 if (MemOps[i].bitsGT(LargestVT))
3619 LargestVT = MemOps[i];
3620 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3622 for (unsigned i = 0; i < NumMemOps; i++) {
3625 // If this store is smaller than the largest store see whether we can get
3626 // the smaller value for free with a truncate.
3627 SDValue Value = MemSetValue;
3628 if (VT.bitsLT(LargestVT)) {
3629 if (!LargestVT.isVector() && !VT.isVector() &&
3630 TLI.isTruncateFree(LargestVT, VT))
3631 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3633 Value = getMemsetValue(Src, VT, DAG, dl);
3635 assert(Value.getValueType() == VT && "Value with wrong type.");
3636 SDValue Store = DAG.getStore(Chain, dl, Value,
3637 getMemBasePlusOffset(Dst, DstOff, DAG),
3638 DstPtrInfo.getWithOffset(DstOff),
3639 isVol, false, Align);
3640 OutChains.push_back(Store);
3641 DstOff += VT.getSizeInBits() / 8;
3644 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3645 &OutChains[0], OutChains.size());
3648 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3649 SDValue Src, SDValue Size,
3650 unsigned Align, bool isVol, bool AlwaysInline,
3651 MachinePointerInfo DstPtrInfo,
3652 MachinePointerInfo SrcPtrInfo) {
3654 // Check to see if we should lower the memcpy to loads and stores first.
3655 // For cases within the target-specified limits, this is the best choice.
3656 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3658 // Memcpy with size zero? Just return the original chain.
3659 if (ConstantSize->isNullValue())
3662 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3663 ConstantSize->getZExtValue(),Align,
3664 isVol, false, DstPtrInfo, SrcPtrInfo);
3665 if (Result.getNode())
3669 // Then check to see if we should lower the memcpy with target-specific
3670 // code. If the target chooses to do this, this is the next best.
3672 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3673 isVol, AlwaysInline,
3674 DstPtrInfo, SrcPtrInfo);
3675 if (Result.getNode())
3678 // If we really need inline code and the target declined to provide it,
3679 // use a (potentially long) sequence of loads and stores.
3681 assert(ConstantSize && "AlwaysInline requires a constant size!");
3682 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3683 ConstantSize->getZExtValue(), Align, isVol,
3684 true, DstPtrInfo, SrcPtrInfo);
3687 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3688 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3689 // respect volatile, so they may do things like read or write memory
3690 // beyond the given memory regions. But fixing this isn't easy, and most
3691 // people don't care.
3693 // Emit a library call.
3694 TargetLowering::ArgListTy Args;
3695 TargetLowering::ArgListEntry Entry;
3696 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3697 Entry.Node = Dst; Args.push_back(Entry);
3698 Entry.Node = Src; Args.push_back(Entry);
3699 Entry.Node = Size; Args.push_back(Entry);
3700 // FIXME: pass in DebugLoc
3701 std::pair<SDValue,SDValue> CallResult =
3702 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3703 false, false, false, false, 0,
3704 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3705 /*isTailCall=*/false,
3706 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3707 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3708 TLI.getPointerTy()),
3710 return CallResult.second;
3713 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3714 SDValue Src, SDValue Size,
3715 unsigned Align, bool isVol,
3716 MachinePointerInfo DstPtrInfo,
3717 MachinePointerInfo SrcPtrInfo) {
3719 // Check to see if we should lower the memmove to loads and stores first.
3720 // For cases within the target-specified limits, this is the best choice.
3721 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3723 // Memmove with size zero? Just return the original chain.
3724 if (ConstantSize->isNullValue())
3728 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3729 ConstantSize->getZExtValue(), Align, isVol,
3730 false, DstPtrInfo, SrcPtrInfo);
3731 if (Result.getNode())
3735 // Then check to see if we should lower the memmove with target-specific
3736 // code. If the target chooses to do this, this is the next best.
3738 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3739 DstPtrInfo, SrcPtrInfo);
3740 if (Result.getNode())
3743 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3744 // not be safe. See memcpy above for more details.
3746 // Emit a library call.
3747 TargetLowering::ArgListTy Args;
3748 TargetLowering::ArgListEntry Entry;
3749 Entry.Ty = TLI.getTargetData()->getIntPtrType(*getContext());
3750 Entry.Node = Dst; Args.push_back(Entry);
3751 Entry.Node = Src; Args.push_back(Entry);
3752 Entry.Node = Size; Args.push_back(Entry);
3753 // FIXME: pass in DebugLoc
3754 std::pair<SDValue,SDValue> CallResult =
3755 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3756 false, false, false, false, 0,
3757 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3758 /*isTailCall=*/false,
3759 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3760 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3761 TLI.getPointerTy()),
3763 return CallResult.second;
3766 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3767 SDValue Src, SDValue Size,
3768 unsigned Align, bool isVol,
3769 MachinePointerInfo DstPtrInfo) {
3771 // Check to see if we should lower the memset to stores first.
3772 // For cases within the target-specified limits, this is the best choice.
3773 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3775 // Memset with size zero? Just return the original chain.
3776 if (ConstantSize->isNullValue())
3780 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3781 Align, isVol, DstPtrInfo);
3783 if (Result.getNode())
3787 // Then check to see if we should lower the memset with target-specific
3788 // code. If the target chooses to do this, this is the next best.
3790 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3792 if (Result.getNode())
3795 // Emit a library call.
3796 Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(*getContext());
3797 TargetLowering::ArgListTy Args;
3798 TargetLowering::ArgListEntry Entry;
3799 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3800 Args.push_back(Entry);
3801 // Extend or truncate the argument to be an i32 value for the call.
3802 if (Src.getValueType().bitsGT(MVT::i32))
3803 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3805 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3807 Entry.Ty = Type::getInt32Ty(*getContext());
3808 Entry.isSExt = true;
3809 Args.push_back(Entry);
3811 Entry.Ty = IntPtrTy;
3812 Entry.isSExt = false;
3813 Args.push_back(Entry);
3814 // FIXME: pass in DebugLoc
3815 std::pair<SDValue,SDValue> CallResult =
3816 TLI.LowerCallTo(Chain, Type::getVoidTy(*getContext()),
3817 false, false, false, false, 0,
3818 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3819 /*isTailCall=*/false,
3820 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3821 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3822 TLI.getPointerTy()),
3824 return CallResult.second;
3827 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3828 SDValue Chain, SDValue Ptr, SDValue Cmp,
3829 SDValue Swp, MachinePointerInfo PtrInfo,
3831 AtomicOrdering Ordering,
3832 SynchronizationScope SynchScope) {
3833 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3834 Alignment = getEVTAlignment(MemVT);
3836 MachineFunction &MF = getMachineFunction();
3837 unsigned Flags = MachineMemOperand::MOLoad | MachineMemOperand::MOStore;
3839 // For now, atomics are considered to be volatile always.
3840 // FIXME: Volatile isn't really correct; we should keep track of atomic
3841 // orderings in the memoperand.
3842 Flags |= MachineMemOperand::MOVolatile;
3844 MachineMemOperand *MMO =
3845 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3847 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3848 Ordering, SynchScope);
3851 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3853 SDValue Ptr, SDValue Cmp,
3854 SDValue Swp, MachineMemOperand *MMO,
3855 AtomicOrdering Ordering,
3856 SynchronizationScope SynchScope) {
3857 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3858 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3860 EVT VT = Cmp.getValueType();
3862 SDVTList VTs = getVTList(VT, MVT::Other);
3863 FoldingSetNodeID ID;
3864 ID.AddInteger(MemVT.getRawBits());
3865 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3866 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3868 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3869 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3870 return SDValue(E, 0);
3872 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3873 Ptr, Cmp, Swp, MMO, Ordering,
3875 CSEMap.InsertNode(N, IP);
3876 AllNodes.push_back(N);
3877 return SDValue(N, 0);
3880 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3882 SDValue Ptr, SDValue Val,
3883 const Value* PtrVal,
3885 AtomicOrdering Ordering,
3886 SynchronizationScope SynchScope) {
3887 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3888 Alignment = getEVTAlignment(MemVT);
3890 MachineFunction &MF = getMachineFunction();
3891 // A monotonic store does not load; a release store "loads" in the sense
3892 // that other stores cannot be sunk past it.
3893 // (An atomicrmw obviously both loads and stores.)
3894 unsigned Flags = MachineMemOperand::MOStore;
3895 if (Opcode != ISD::ATOMIC_STORE || Ordering > Monotonic)
3896 Flags |= MachineMemOperand::MOLoad;
3898 // For now, atomics are considered to be volatile always.
3899 // FIXME: Volatile isn't really correct; we should keep track of atomic
3900 // orderings in the memoperand.
3901 Flags |= MachineMemOperand::MOVolatile;
3903 MachineMemOperand *MMO =
3904 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3905 MemVT.getStoreSize(), Alignment);
3907 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
3908 Ordering, SynchScope);
3911 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3913 SDValue Ptr, SDValue Val,
3914 MachineMemOperand *MMO,
3915 AtomicOrdering Ordering,
3916 SynchronizationScope SynchScope) {
3917 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
3918 Opcode == ISD::ATOMIC_LOAD_SUB ||
3919 Opcode == ISD::ATOMIC_LOAD_AND ||
3920 Opcode == ISD::ATOMIC_LOAD_OR ||
3921 Opcode == ISD::ATOMIC_LOAD_XOR ||
3922 Opcode == ISD::ATOMIC_LOAD_NAND ||
3923 Opcode == ISD::ATOMIC_LOAD_MIN ||
3924 Opcode == ISD::ATOMIC_LOAD_MAX ||
3925 Opcode == ISD::ATOMIC_LOAD_UMIN ||
3926 Opcode == ISD::ATOMIC_LOAD_UMAX ||
3927 Opcode == ISD::ATOMIC_SWAP ||
3928 Opcode == ISD::ATOMIC_STORE) &&
3929 "Invalid Atomic Op");
3931 EVT VT = Val.getValueType();
3933 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
3934 getVTList(VT, MVT::Other);
3935 FoldingSetNodeID ID;
3936 ID.AddInteger(MemVT.getRawBits());
3937 SDValue Ops[] = {Chain, Ptr, Val};
3938 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3940 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3941 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3942 return SDValue(E, 0);
3944 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3946 Ordering, SynchScope);
3947 CSEMap.InsertNode(N, IP);
3948 AllNodes.push_back(N);
3949 return SDValue(N, 0);
3952 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3953 EVT VT, SDValue Chain,
3955 const Value* PtrVal,
3957 AtomicOrdering Ordering,
3958 SynchronizationScope SynchScope) {
3959 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3960 Alignment = getEVTAlignment(MemVT);
3962 MachineFunction &MF = getMachineFunction();
3963 // A monotonic load does not store; an acquire load "stores" in the sense
3964 // that other loads cannot be hoisted past it.
3965 unsigned Flags = MachineMemOperand::MOLoad;
3966 if (Ordering > Monotonic)
3967 Flags |= MachineMemOperand::MOStore;
3969 // For now, atomics are considered to be volatile always.
3970 // FIXME: Volatile isn't really correct; we should keep track of atomic
3971 // orderings in the memoperand.
3972 Flags |= MachineMemOperand::MOVolatile;
3974 MachineMemOperand *MMO =
3975 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
3976 MemVT.getStoreSize(), Alignment);
3978 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
3979 Ordering, SynchScope);
3982 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3983 EVT VT, SDValue Chain,
3985 MachineMemOperand *MMO,
3986 AtomicOrdering Ordering,
3987 SynchronizationScope SynchScope) {
3988 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
3990 SDVTList VTs = getVTList(VT, MVT::Other);
3991 FoldingSetNodeID ID;
3992 ID.AddInteger(MemVT.getRawBits());
3993 SDValue Ops[] = {Chain, Ptr};
3994 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3996 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3997 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3998 return SDValue(E, 0);
4000 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4001 Ptr, MMO, Ordering, SynchScope);
4002 CSEMap.InsertNode(N, IP);
4003 AllNodes.push_back(N);
4004 return SDValue(N, 0);
4007 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4008 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4013 SmallVector<EVT, 4> VTs;
4014 VTs.reserve(NumOps);
4015 for (unsigned i = 0; i < NumOps; ++i)
4016 VTs.push_back(Ops[i].getValueType());
4017 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4022 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4023 const EVT *VTs, unsigned NumVTs,
4024 const SDValue *Ops, unsigned NumOps,
4025 EVT MemVT, MachinePointerInfo PtrInfo,
4026 unsigned Align, bool Vol,
4027 bool ReadMem, bool WriteMem) {
4028 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4029 MemVT, PtrInfo, Align, Vol,
4034 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4035 const SDValue *Ops, unsigned NumOps,
4036 EVT MemVT, MachinePointerInfo PtrInfo,
4037 unsigned Align, bool Vol,
4038 bool ReadMem, bool WriteMem) {
4039 if (Align == 0) // Ensure that codegen never sees alignment 0
4040 Align = getEVTAlignment(MemVT);
4042 MachineFunction &MF = getMachineFunction();
4045 Flags |= MachineMemOperand::MOStore;
4047 Flags |= MachineMemOperand::MOLoad;
4049 Flags |= MachineMemOperand::MOVolatile;
4050 MachineMemOperand *MMO =
4051 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4053 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4057 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4058 const SDValue *Ops, unsigned NumOps,
4059 EVT MemVT, MachineMemOperand *MMO) {
4060 assert((Opcode == ISD::INTRINSIC_VOID ||
4061 Opcode == ISD::INTRINSIC_W_CHAIN ||
4062 Opcode == ISD::PREFETCH ||
4063 (Opcode <= INT_MAX &&
4064 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4065 "Opcode is not a memory-accessing opcode!");
4067 // Memoize the node unless it returns a flag.
4068 MemIntrinsicSDNode *N;
4069 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4070 FoldingSetNodeID ID;
4071 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4073 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4074 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4075 return SDValue(E, 0);
4078 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4080 CSEMap.InsertNode(N, IP);
4082 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4085 AllNodes.push_back(N);
4086 return SDValue(N, 0);
4089 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4090 /// MachinePointerInfo record from it. This is particularly useful because the
4091 /// code generator has many cases where it doesn't bother passing in a
4092 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4093 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4094 // If this is FI+Offset, we can model it.
4095 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4096 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4098 // If this is (FI+Offset1)+Offset2, we can model it.
4099 if (Ptr.getOpcode() != ISD::ADD ||
4100 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4101 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4102 return MachinePointerInfo();
4104 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4105 return MachinePointerInfo::getFixedStack(FI, Offset+
4106 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4109 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4110 /// MachinePointerInfo record from it. This is particularly useful because the
4111 /// code generator has many cases where it doesn't bother passing in a
4112 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4113 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4114 // If the 'Offset' value isn't a constant, we can't handle this.
4115 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4116 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4117 if (OffsetOp.getOpcode() == ISD::UNDEF)
4118 return InferPointerInfo(Ptr);
4119 return MachinePointerInfo();
4124 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4125 EVT VT, DebugLoc dl, SDValue Chain,
4126 SDValue Ptr, SDValue Offset,
4127 MachinePointerInfo PtrInfo, EVT MemVT,
4128 bool isVolatile, bool isNonTemporal, bool isInvariant,
4129 unsigned Alignment, const MDNode *TBAAInfo,
4130 const MDNode *Ranges) {
4131 assert(Chain.getValueType() == MVT::Other &&
4132 "Invalid chain type");
4133 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4134 Alignment = getEVTAlignment(VT);
4136 unsigned Flags = MachineMemOperand::MOLoad;
4138 Flags |= MachineMemOperand::MOVolatile;
4140 Flags |= MachineMemOperand::MONonTemporal;
4142 Flags |= MachineMemOperand::MOInvariant;
4144 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4147 PtrInfo = InferPointerInfo(Ptr, Offset);
4149 MachineFunction &MF = getMachineFunction();
4150 MachineMemOperand *MMO =
4151 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4153 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4157 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4158 EVT VT, DebugLoc dl, SDValue Chain,
4159 SDValue Ptr, SDValue Offset, EVT MemVT,
4160 MachineMemOperand *MMO) {
4162 ExtType = ISD::NON_EXTLOAD;
4163 } else if (ExtType == ISD::NON_EXTLOAD) {
4164 assert(VT == MemVT && "Non-extending load from different memory type!");
4167 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4168 "Should only be an extending load, not truncating!");
4169 assert(VT.isInteger() == MemVT.isInteger() &&
4170 "Cannot convert from FP to Int or Int -> FP!");
4171 assert(VT.isVector() == MemVT.isVector() &&
4172 "Cannot use trunc store to convert to or from a vector!");
4173 assert((!VT.isVector() ||
4174 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4175 "Cannot use trunc store to change the number of vector elements!");
4178 bool Indexed = AM != ISD::UNINDEXED;
4179 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4180 "Unindexed load with an offset!");
4182 SDVTList VTs = Indexed ?
4183 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4184 SDValue Ops[] = { Chain, Ptr, Offset };
4185 FoldingSetNodeID ID;
4186 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4187 ID.AddInteger(MemVT.getRawBits());
4188 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4189 MMO->isNonTemporal(),
4190 MMO->isInvariant()));
4192 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4193 cast<LoadSDNode>(E)->refineAlignment(MMO);
4194 return SDValue(E, 0);
4196 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4198 CSEMap.InsertNode(N, IP);
4199 AllNodes.push_back(N);
4200 return SDValue(N, 0);
4203 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4204 SDValue Chain, SDValue Ptr,
4205 MachinePointerInfo PtrInfo,
4206 bool isVolatile, bool isNonTemporal,
4207 bool isInvariant, unsigned Alignment,
4208 const MDNode *TBAAInfo,
4209 const MDNode *Ranges) {
4210 SDValue Undef = getUNDEF(Ptr.getValueType());
4211 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4212 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4216 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4217 SDValue Chain, SDValue Ptr,
4218 MachinePointerInfo PtrInfo, EVT MemVT,
4219 bool isVolatile, bool isNonTemporal,
4220 unsigned Alignment, const MDNode *TBAAInfo) {
4221 SDValue Undef = getUNDEF(Ptr.getValueType());
4222 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4223 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4229 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4230 SDValue Offset, ISD::MemIndexedMode AM) {
4231 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4232 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4233 "Load is already a indexed load!");
4234 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4235 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4236 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4237 false, LD->getAlignment());
4240 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4241 SDValue Ptr, MachinePointerInfo PtrInfo,
4242 bool isVolatile, bool isNonTemporal,
4243 unsigned Alignment, const MDNode *TBAAInfo) {
4244 assert(Chain.getValueType() == MVT::Other &&
4245 "Invalid chain type");
4246 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4247 Alignment = getEVTAlignment(Val.getValueType());
4249 unsigned Flags = MachineMemOperand::MOStore;
4251 Flags |= MachineMemOperand::MOVolatile;
4253 Flags |= MachineMemOperand::MONonTemporal;
4256 PtrInfo = InferPointerInfo(Ptr);
4258 MachineFunction &MF = getMachineFunction();
4259 MachineMemOperand *MMO =
4260 MF.getMachineMemOperand(PtrInfo, Flags,
4261 Val.getValueType().getStoreSize(), Alignment,
4264 return getStore(Chain, dl, Val, Ptr, MMO);
4267 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4268 SDValue Ptr, MachineMemOperand *MMO) {
4269 assert(Chain.getValueType() == MVT::Other &&
4270 "Invalid chain type");
4271 EVT VT = Val.getValueType();
4272 SDVTList VTs = getVTList(MVT::Other);
4273 SDValue Undef = getUNDEF(Ptr.getValueType());
4274 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4275 FoldingSetNodeID ID;
4276 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4277 ID.AddInteger(VT.getRawBits());
4278 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4279 MMO->isNonTemporal(), MMO->isInvariant()));
4281 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4282 cast<StoreSDNode>(E)->refineAlignment(MMO);
4283 return SDValue(E, 0);
4285 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4287 CSEMap.InsertNode(N, IP);
4288 AllNodes.push_back(N);
4289 return SDValue(N, 0);
4292 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4293 SDValue Ptr, MachinePointerInfo PtrInfo,
4294 EVT SVT,bool isVolatile, bool isNonTemporal,
4296 const MDNode *TBAAInfo) {
4297 assert(Chain.getValueType() == MVT::Other &&
4298 "Invalid chain type");
4299 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4300 Alignment = getEVTAlignment(SVT);
4302 unsigned Flags = MachineMemOperand::MOStore;
4304 Flags |= MachineMemOperand::MOVolatile;
4306 Flags |= MachineMemOperand::MONonTemporal;
4309 PtrInfo = InferPointerInfo(Ptr);
4311 MachineFunction &MF = getMachineFunction();
4312 MachineMemOperand *MMO =
4313 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4316 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4319 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4320 SDValue Ptr, EVT SVT,
4321 MachineMemOperand *MMO) {
4322 EVT VT = Val.getValueType();
4324 assert(Chain.getValueType() == MVT::Other &&
4325 "Invalid chain type");
4327 return getStore(Chain, dl, Val, Ptr, MMO);
4329 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4330 "Should only be a truncating store, not extending!");
4331 assert(VT.isInteger() == SVT.isInteger() &&
4332 "Can't do FP-INT conversion!");
4333 assert(VT.isVector() == SVT.isVector() &&
4334 "Cannot use trunc store to convert to or from a vector!");
4335 assert((!VT.isVector() ||
4336 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4337 "Cannot use trunc store to change the number of vector elements!");
4339 SDVTList VTs = getVTList(MVT::Other);
4340 SDValue Undef = getUNDEF(Ptr.getValueType());
4341 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4342 FoldingSetNodeID ID;
4343 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4344 ID.AddInteger(SVT.getRawBits());
4345 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4346 MMO->isNonTemporal(), MMO->isInvariant()));
4348 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4349 cast<StoreSDNode>(E)->refineAlignment(MMO);
4350 return SDValue(E, 0);
4352 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4354 CSEMap.InsertNode(N, IP);
4355 AllNodes.push_back(N);
4356 return SDValue(N, 0);
4360 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4361 SDValue Offset, ISD::MemIndexedMode AM) {
4362 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4363 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4364 "Store is already a indexed store!");
4365 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4366 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4367 FoldingSetNodeID ID;
4368 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4369 ID.AddInteger(ST->getMemoryVT().getRawBits());
4370 ID.AddInteger(ST->getRawSubclassData());
4372 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4373 return SDValue(E, 0);
4375 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4376 ST->isTruncatingStore(),
4378 ST->getMemOperand());
4379 CSEMap.InsertNode(N, IP);
4380 AllNodes.push_back(N);
4381 return SDValue(N, 0);
4384 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4385 SDValue Chain, SDValue Ptr,
4388 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4389 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4392 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4393 const SDUse *Ops, unsigned NumOps) {
4395 case 0: return getNode(Opcode, DL, VT);
4396 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4397 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4398 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4402 // Copy from an SDUse array into an SDValue array for use with
4403 // the regular getNode logic.
4404 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4405 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4408 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4409 const SDValue *Ops, unsigned NumOps) {
4411 case 0: return getNode(Opcode, DL, VT);
4412 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4413 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4414 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4420 case ISD::SELECT_CC: {
4421 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4422 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4423 "LHS and RHS of condition must have same type!");
4424 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4425 "True and False arms of SelectCC must have same type!");
4426 assert(Ops[2].getValueType() == VT &&
4427 "select_cc node must be of same type as true and false value!");
4431 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4432 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4433 "LHS/RHS of comparison should match types!");
4440 SDVTList VTs = getVTList(VT);
4442 if (VT != MVT::Glue) {
4443 FoldingSetNodeID ID;
4444 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4447 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4448 return SDValue(E, 0);
4450 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4451 CSEMap.InsertNode(N, IP);
4453 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4456 AllNodes.push_back(N);
4460 return SDValue(N, 0);
4463 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4464 const std::vector<EVT> &ResultTys,
4465 const SDValue *Ops, unsigned NumOps) {
4466 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4470 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4471 const EVT *VTs, unsigned NumVTs,
4472 const SDValue *Ops, unsigned NumOps) {
4474 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4475 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4478 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4479 const SDValue *Ops, unsigned NumOps) {
4480 if (VTList.NumVTs == 1)
4481 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4485 // FIXME: figure out how to safely handle things like
4486 // int foo(int x) { return 1 << (x & 255); }
4487 // int bar() { return foo(256); }
4488 case ISD::SRA_PARTS:
4489 case ISD::SRL_PARTS:
4490 case ISD::SHL_PARTS:
4491 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4492 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4493 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4494 else if (N3.getOpcode() == ISD::AND)
4495 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4496 // If the and is only masking out bits that cannot effect the shift,
4497 // eliminate the and.
4498 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4499 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4500 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4506 // Memoize the node unless it returns a flag.
4508 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4509 FoldingSetNodeID ID;
4510 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4512 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4513 return SDValue(E, 0);
4516 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4517 } else if (NumOps == 2) {
4518 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4519 } else if (NumOps == 3) {
4520 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4523 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4525 CSEMap.InsertNode(N, IP);
4528 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4529 } else if (NumOps == 2) {
4530 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4531 } else if (NumOps == 3) {
4532 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4535 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4538 AllNodes.push_back(N);
4542 return SDValue(N, 0);
4545 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4546 return getNode(Opcode, DL, VTList, 0, 0);
4549 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4551 SDValue Ops[] = { N1 };
4552 return getNode(Opcode, DL, VTList, Ops, 1);
4555 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4556 SDValue N1, SDValue N2) {
4557 SDValue Ops[] = { N1, N2 };
4558 return getNode(Opcode, DL, VTList, Ops, 2);
4561 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4562 SDValue N1, SDValue N2, SDValue N3) {
4563 SDValue Ops[] = { N1, N2, N3 };
4564 return getNode(Opcode, DL, VTList, Ops, 3);
4567 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4568 SDValue N1, SDValue N2, SDValue N3,
4570 SDValue Ops[] = { N1, N2, N3, N4 };
4571 return getNode(Opcode, DL, VTList, Ops, 4);
4574 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4575 SDValue N1, SDValue N2, SDValue N3,
4576 SDValue N4, SDValue N5) {
4577 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4578 return getNode(Opcode, DL, VTList, Ops, 5);
4581 SDVTList SelectionDAG::getVTList(EVT VT) {
4582 return makeVTList(SDNode::getValueTypeList(VT), 1);
4585 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4586 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4587 E = VTList.rend(); I != E; ++I)
4588 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4591 EVT *Array = Allocator.Allocate<EVT>(2);
4594 SDVTList Result = makeVTList(Array, 2);
4595 VTList.push_back(Result);
4599 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4600 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4601 E = VTList.rend(); I != E; ++I)
4602 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4606 EVT *Array = Allocator.Allocate<EVT>(3);
4610 SDVTList Result = makeVTList(Array, 3);
4611 VTList.push_back(Result);
4615 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4616 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4617 E = VTList.rend(); I != E; ++I)
4618 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4619 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4622 EVT *Array = Allocator.Allocate<EVT>(4);
4627 SDVTList Result = makeVTList(Array, 4);
4628 VTList.push_back(Result);
4632 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4634 case 0: llvm_unreachable("Cannot have nodes without results!");
4635 case 1: return getVTList(VTs[0]);
4636 case 2: return getVTList(VTs[0], VTs[1]);
4637 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4638 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4642 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4643 E = VTList.rend(); I != E; ++I) {
4644 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4647 bool NoMatch = false;
4648 for (unsigned i = 2; i != NumVTs; ++i)
4649 if (VTs[i] != I->VTs[i]) {
4657 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4658 std::copy(VTs, VTs+NumVTs, Array);
4659 SDVTList Result = makeVTList(Array, NumVTs);
4660 VTList.push_back(Result);
4665 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4666 /// specified operands. If the resultant node already exists in the DAG,
4667 /// this does not modify the specified node, instead it returns the node that
4668 /// already exists. If the resultant node does not exist in the DAG, the
4669 /// input node is returned. As a degenerate case, if you specify the same
4670 /// input operands as the node already has, the input node is returned.
4671 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4672 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4674 // Check to see if there is no change.
4675 if (Op == N->getOperand(0)) return N;
4677 // See if the modified node already exists.
4678 void *InsertPos = 0;
4679 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4682 // Nope it doesn't. Remove the node from its current place in the maps.
4684 if (!RemoveNodeFromCSEMaps(N))
4687 // Now we update the operands.
4688 N->OperandList[0].set(Op);
4690 // If this gets put into a CSE map, add it.
4691 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4695 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4696 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4698 // Check to see if there is no change.
4699 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4700 return N; // No operands changed, just return the input node.
4702 // See if the modified node already exists.
4703 void *InsertPos = 0;
4704 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4707 // Nope it doesn't. Remove the node from its current place in the maps.
4709 if (!RemoveNodeFromCSEMaps(N))
4712 // Now we update the operands.
4713 if (N->OperandList[0] != Op1)
4714 N->OperandList[0].set(Op1);
4715 if (N->OperandList[1] != Op2)
4716 N->OperandList[1].set(Op2);
4718 // If this gets put into a CSE map, add it.
4719 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4723 SDNode *SelectionDAG::
4724 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4725 SDValue Ops[] = { Op1, Op2, Op3 };
4726 return UpdateNodeOperands(N, Ops, 3);
4729 SDNode *SelectionDAG::
4730 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4731 SDValue Op3, SDValue Op4) {
4732 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4733 return UpdateNodeOperands(N, Ops, 4);
4736 SDNode *SelectionDAG::
4737 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4738 SDValue Op3, SDValue Op4, SDValue Op5) {
4739 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4740 return UpdateNodeOperands(N, Ops, 5);
4743 SDNode *SelectionDAG::
4744 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4745 assert(N->getNumOperands() == NumOps &&
4746 "Update with wrong number of operands");
4748 // Check to see if there is no change.
4749 bool AnyChange = false;
4750 for (unsigned i = 0; i != NumOps; ++i) {
4751 if (Ops[i] != N->getOperand(i)) {
4757 // No operands changed, just return the input node.
4758 if (!AnyChange) return N;
4760 // See if the modified node already exists.
4761 void *InsertPos = 0;
4762 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4765 // Nope it doesn't. Remove the node from its current place in the maps.
4767 if (!RemoveNodeFromCSEMaps(N))
4770 // Now we update the operands.
4771 for (unsigned i = 0; i != NumOps; ++i)
4772 if (N->OperandList[i] != Ops[i])
4773 N->OperandList[i].set(Ops[i]);
4775 // If this gets put into a CSE map, add it.
4776 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4780 /// DropOperands - Release the operands and set this node to have
4782 void SDNode::DropOperands() {
4783 // Unlike the code in MorphNodeTo that does this, we don't need to
4784 // watch for dead nodes here.
4785 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4791 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4794 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4796 SDVTList VTs = getVTList(VT);
4797 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4800 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4801 EVT VT, SDValue Op1) {
4802 SDVTList VTs = getVTList(VT);
4803 SDValue Ops[] = { Op1 };
4804 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4807 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4808 EVT VT, SDValue Op1,
4810 SDVTList VTs = getVTList(VT);
4811 SDValue Ops[] = { Op1, Op2 };
4812 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4815 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4816 EVT VT, SDValue Op1,
4817 SDValue Op2, SDValue Op3) {
4818 SDVTList VTs = getVTList(VT);
4819 SDValue Ops[] = { Op1, Op2, Op3 };
4820 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4823 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4824 EVT VT, const SDValue *Ops,
4826 SDVTList VTs = getVTList(VT);
4827 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4830 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4831 EVT VT1, EVT VT2, const SDValue *Ops,
4833 SDVTList VTs = getVTList(VT1, VT2);
4834 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4837 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4839 SDVTList VTs = getVTList(VT1, VT2);
4840 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4843 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4844 EVT VT1, EVT VT2, EVT VT3,
4845 const SDValue *Ops, unsigned NumOps) {
4846 SDVTList VTs = getVTList(VT1, VT2, VT3);
4847 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4850 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4851 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4852 const SDValue *Ops, unsigned NumOps) {
4853 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4854 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4857 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4860 SDVTList VTs = getVTList(VT1, VT2);
4861 SDValue Ops[] = { Op1 };
4862 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4865 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4867 SDValue Op1, SDValue Op2) {
4868 SDVTList VTs = getVTList(VT1, VT2);
4869 SDValue Ops[] = { Op1, Op2 };
4870 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4873 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4875 SDValue Op1, SDValue Op2,
4877 SDVTList VTs = getVTList(VT1, VT2);
4878 SDValue Ops[] = { Op1, Op2, Op3 };
4879 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4882 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4883 EVT VT1, EVT VT2, EVT VT3,
4884 SDValue Op1, SDValue Op2,
4886 SDVTList VTs = getVTList(VT1, VT2, VT3);
4887 SDValue Ops[] = { Op1, Op2, Op3 };
4888 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4891 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4892 SDVTList VTs, const SDValue *Ops,
4894 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
4895 // Reset the NodeID to -1.
4900 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
4901 /// the line number information on the merged node since it is not possible to
4902 /// preserve the information that operation is associated with multiple lines.
4903 /// This will make the debugger working better at -O0, were there is a higher
4904 /// probability having other instructions associated with that line.
4906 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
4907 DebugLoc NLoc = N->getDebugLoc();
4908 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
4909 N->setDebugLoc(DebugLoc());
4914 /// MorphNodeTo - This *mutates* the specified node to have the specified
4915 /// return type, opcode, and operands.
4917 /// Note that MorphNodeTo returns the resultant node. If there is already a
4918 /// node of the specified opcode and operands, it returns that node instead of
4919 /// the current one. Note that the DebugLoc need not be the same.
4921 /// Using MorphNodeTo is faster than creating a new node and swapping it in
4922 /// with ReplaceAllUsesWith both because it often avoids allocating a new
4923 /// node, and because it doesn't require CSE recalculation for any of
4924 /// the node's users.
4926 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
4927 SDVTList VTs, const SDValue *Ops,
4929 // If an identical node already exists, use it.
4931 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
4932 FoldingSetNodeID ID;
4933 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
4934 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
4935 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
4938 if (!RemoveNodeFromCSEMaps(N))
4941 // Start the morphing.
4943 N->ValueList = VTs.VTs;
4944 N->NumValues = VTs.NumVTs;
4946 // Clear the operands list, updating used nodes to remove this from their
4947 // use list. Keep track of any operands that become dead as a result.
4948 SmallPtrSet<SDNode*, 16> DeadNodeSet;
4949 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
4951 SDNode *Used = Use.getNode();
4953 if (Used->use_empty())
4954 DeadNodeSet.insert(Used);
4957 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
4958 // Initialize the memory references information.
4959 MN->setMemRefs(0, 0);
4960 // If NumOps is larger than the # of operands we can have in a
4961 // MachineSDNode, reallocate the operand list.
4962 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
4963 if (MN->OperandsNeedDelete)
4964 delete[] MN->OperandList;
4965 if (NumOps > array_lengthof(MN->LocalOperands))
4966 // We're creating a final node that will live unmorphed for the
4967 // remainder of the current SelectionDAG iteration, so we can allocate
4968 // the operands directly out of a pool with no recycling metadata.
4969 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
4972 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
4973 MN->OperandsNeedDelete = false;
4975 MN->InitOperands(MN->OperandList, Ops, NumOps);
4977 // If NumOps is larger than the # of operands we currently have, reallocate
4978 // the operand list.
4979 if (NumOps > N->NumOperands) {
4980 if (N->OperandsNeedDelete)
4981 delete[] N->OperandList;
4982 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
4983 N->OperandsNeedDelete = true;
4985 N->InitOperands(N->OperandList, Ops, NumOps);
4988 // Delete any nodes that are still dead after adding the uses for the
4990 if (!DeadNodeSet.empty()) {
4991 SmallVector<SDNode *, 16> DeadNodes;
4992 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
4993 E = DeadNodeSet.end(); I != E; ++I)
4994 if ((*I)->use_empty())
4995 DeadNodes.push_back(*I);
4996 RemoveDeadNodes(DeadNodes);
5000 CSEMap.InsertNode(N, IP); // Memoize the new node.
5005 /// getMachineNode - These are used for target selectors to create a new node
5006 /// with specified return type(s), MachineInstr opcode, and operands.
5008 /// Note that getMachineNode returns the resultant node. If there is already a
5009 /// node of the specified opcode and operands, it returns that node instead of
5010 /// the current one.
5012 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5013 SDVTList VTs = getVTList(VT);
5014 return getMachineNode(Opcode, dl, VTs, 0, 0);
5018 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5019 SDVTList VTs = getVTList(VT);
5020 SDValue Ops[] = { Op1 };
5021 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5025 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5026 SDValue Op1, SDValue Op2) {
5027 SDVTList VTs = getVTList(VT);
5028 SDValue Ops[] = { Op1, Op2 };
5029 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5033 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5034 SDValue Op1, SDValue Op2, SDValue Op3) {
5035 SDVTList VTs = getVTList(VT);
5036 SDValue Ops[] = { Op1, Op2, Op3 };
5037 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5041 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5042 const SDValue *Ops, unsigned NumOps) {
5043 SDVTList VTs = getVTList(VT);
5044 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5048 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5049 SDVTList VTs = getVTList(VT1, VT2);
5050 return getMachineNode(Opcode, dl, VTs, 0, 0);
5054 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5055 EVT VT1, EVT VT2, SDValue Op1) {
5056 SDVTList VTs = getVTList(VT1, VT2);
5057 SDValue Ops[] = { Op1 };
5058 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5062 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5063 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5064 SDVTList VTs = getVTList(VT1, VT2);
5065 SDValue Ops[] = { Op1, Op2 };
5066 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5070 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5071 EVT VT1, EVT VT2, SDValue Op1,
5072 SDValue Op2, SDValue Op3) {
5073 SDVTList VTs = getVTList(VT1, VT2);
5074 SDValue Ops[] = { Op1, Op2, Op3 };
5075 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5079 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5081 const SDValue *Ops, unsigned NumOps) {
5082 SDVTList VTs = getVTList(VT1, VT2);
5083 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5087 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5088 EVT VT1, EVT VT2, EVT VT3,
5089 SDValue Op1, SDValue Op2) {
5090 SDVTList VTs = getVTList(VT1, VT2, VT3);
5091 SDValue Ops[] = { Op1, Op2 };
5092 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5096 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5097 EVT VT1, EVT VT2, EVT VT3,
5098 SDValue Op1, SDValue Op2, SDValue Op3) {
5099 SDVTList VTs = getVTList(VT1, VT2, VT3);
5100 SDValue Ops[] = { Op1, Op2, Op3 };
5101 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5105 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5106 EVT VT1, EVT VT2, EVT VT3,
5107 const SDValue *Ops, unsigned NumOps) {
5108 SDVTList VTs = getVTList(VT1, VT2, VT3);
5109 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5113 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5114 EVT VT2, EVT VT3, EVT VT4,
5115 const SDValue *Ops, unsigned NumOps) {
5116 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5117 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5121 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5122 const std::vector<EVT> &ResultTys,
5123 const SDValue *Ops, unsigned NumOps) {
5124 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5125 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5129 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5130 const SDValue *Ops, unsigned NumOps) {
5131 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5136 FoldingSetNodeID ID;
5137 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5139 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5140 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5144 // Allocate a new MachineSDNode.
5145 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5147 // Initialize the operands list.
5148 if (NumOps > array_lengthof(N->LocalOperands))
5149 // We're creating a final node that will live unmorphed for the
5150 // remainder of the current SelectionDAG iteration, so we can allocate
5151 // the operands directly out of a pool with no recycling metadata.
5152 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5155 N->InitOperands(N->LocalOperands, Ops, NumOps);
5156 N->OperandsNeedDelete = false;
5159 CSEMap.InsertNode(N, IP);
5161 AllNodes.push_back(N);
5163 VerifyMachineNode(N);
5168 /// getTargetExtractSubreg - A convenience function for creating
5169 /// TargetOpcode::EXTRACT_SUBREG nodes.
5171 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5173 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5174 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5175 VT, Operand, SRIdxVal);
5176 return SDValue(Subreg, 0);
5179 /// getTargetInsertSubreg - A convenience function for creating
5180 /// TargetOpcode::INSERT_SUBREG nodes.
5182 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5183 SDValue Operand, SDValue Subreg) {
5184 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5185 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5186 VT, Operand, Subreg, SRIdxVal);
5187 return SDValue(Result, 0);
5190 /// getNodeIfExists - Get the specified node if it's already available, or
5191 /// else return NULL.
5192 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5193 const SDValue *Ops, unsigned NumOps) {
5194 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5195 FoldingSetNodeID ID;
5196 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5198 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5204 /// getDbgValue - Creates a SDDbgValue node.
5207 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5208 DebugLoc DL, unsigned O) {
5209 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5213 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5214 DebugLoc DL, unsigned O) {
5215 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5219 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5220 DebugLoc DL, unsigned O) {
5221 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5226 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5227 /// pointed to by a use iterator is deleted, increment the use iterator
5228 /// so that it doesn't dangle.
5230 /// This class also manages a "downlink" DAGUpdateListener, to forward
5231 /// messages to ReplaceAllUsesWith's callers.
5233 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5234 SelectionDAG::DAGUpdateListener *DownLink;
5235 SDNode::use_iterator &UI;
5236 SDNode::use_iterator &UE;
5238 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5239 // Increment the iterator as needed.
5240 while (UI != UE && N == *UI)
5243 // Then forward the message.
5244 if (DownLink) DownLink->NodeDeleted(N, E);
5247 virtual void NodeUpdated(SDNode *N) {
5248 // Just forward the message.
5249 if (DownLink) DownLink->NodeUpdated(N);
5253 RAUWUpdateListener(SelectionDAG::DAGUpdateListener *dl,
5254 SDNode::use_iterator &ui,
5255 SDNode::use_iterator &ue)
5256 : DownLink(dl), UI(ui), UE(ue) {}
5261 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5262 /// This can cause recursive merging of nodes in the DAG.
5264 /// This version assumes From has a single result value.
5266 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To,
5267 DAGUpdateListener *UpdateListener) {
5268 SDNode *From = FromN.getNode();
5269 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5270 "Cannot replace with this method!");
5271 assert(From != To.getNode() && "Cannot replace uses of with self");
5273 // Iterate over all the existing uses of From. New uses will be added
5274 // to the beginning of the use list, which we avoid visiting.
5275 // This specifically avoids visiting uses of From that arise while the
5276 // replacement is happening, because any such uses would be the result
5277 // of CSE: If an existing node looks like From after one of its operands
5278 // is replaced by To, we don't want to replace of all its users with To
5279 // too. See PR3018 for more info.
5280 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5281 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5285 // This node is about to morph, remove its old self from the CSE maps.
5286 RemoveNodeFromCSEMaps(User);
5288 // A user can appear in a use list multiple times, and when this
5289 // happens the uses are usually next to each other in the list.
5290 // To help reduce the number of CSE recomputations, process all
5291 // the uses of this user that we can find this way.
5293 SDUse &Use = UI.getUse();
5296 } while (UI != UE && *UI == User);
5298 // Now that we have modified User, add it back to the CSE maps. If it
5299 // already exists there, recursively merge the results together.
5300 AddModifiedNodeToCSEMaps(User, &Listener);
5303 // If we just RAUW'd the root, take note.
5304 if (FromN == getRoot())
5308 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5309 /// This can cause recursive merging of nodes in the DAG.
5311 /// This version assumes that for each value of From, there is a
5312 /// corresponding value in To in the same position with the same type.
5314 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To,
5315 DAGUpdateListener *UpdateListener) {
5317 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5318 assert((!From->hasAnyUseOfValue(i) ||
5319 From->getValueType(i) == To->getValueType(i)) &&
5320 "Cannot use this version of ReplaceAllUsesWith!");
5323 // Handle the trivial case.
5327 // Iterate over just the existing users of From. See the comments in
5328 // the ReplaceAllUsesWith above.
5329 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5330 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5334 // This node is about to morph, remove its old self from the CSE maps.
5335 RemoveNodeFromCSEMaps(User);
5337 // A user can appear in a use list multiple times, and when this
5338 // happens the uses are usually next to each other in the list.
5339 // To help reduce the number of CSE recomputations, process all
5340 // the uses of this user that we can find this way.
5342 SDUse &Use = UI.getUse();
5345 } while (UI != UE && *UI == User);
5347 // Now that we have modified User, add it back to the CSE maps. If it
5348 // already exists there, recursively merge the results together.
5349 AddModifiedNodeToCSEMaps(User, &Listener);
5352 // If we just RAUW'd the root, take note.
5353 if (From == getRoot().getNode())
5354 setRoot(SDValue(To, getRoot().getResNo()));
5357 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5358 /// This can cause recursive merging of nodes in the DAG.
5360 /// This version can replace From with any result values. To must match the
5361 /// number and types of values returned by From.
5362 void SelectionDAG::ReplaceAllUsesWith(SDNode *From,
5364 DAGUpdateListener *UpdateListener) {
5365 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5366 return ReplaceAllUsesWith(SDValue(From, 0), To[0], UpdateListener);
5368 // Iterate over just the existing users of From. See the comments in
5369 // the ReplaceAllUsesWith above.
5370 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5371 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5375 // This node is about to morph, remove its old self from the CSE maps.
5376 RemoveNodeFromCSEMaps(User);
5378 // A user can appear in a use list multiple times, and when this
5379 // happens the uses are usually next to each other in the list.
5380 // To help reduce the number of CSE recomputations, process all
5381 // the uses of this user that we can find this way.
5383 SDUse &Use = UI.getUse();
5384 const SDValue &ToOp = To[Use.getResNo()];
5387 } while (UI != UE && *UI == User);
5389 // Now that we have modified User, add it back to the CSE maps. If it
5390 // already exists there, recursively merge the results together.
5391 AddModifiedNodeToCSEMaps(User, &Listener);
5394 // If we just RAUW'd the root, take note.
5395 if (From == getRoot().getNode())
5396 setRoot(SDValue(To[getRoot().getResNo()]));
5399 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5400 /// uses of other values produced by From.getNode() alone. The Deleted
5401 /// vector is handled the same way as for ReplaceAllUsesWith.
5402 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To,
5403 DAGUpdateListener *UpdateListener){
5404 // Handle the really simple, really trivial case efficiently.
5405 if (From == To) return;
5407 // Handle the simple, trivial, case efficiently.
5408 if (From.getNode()->getNumValues() == 1) {
5409 ReplaceAllUsesWith(From, To, UpdateListener);
5413 // Iterate over just the existing users of From. See the comments in
5414 // the ReplaceAllUsesWith above.
5415 SDNode::use_iterator UI = From.getNode()->use_begin(),
5416 UE = From.getNode()->use_end();
5417 RAUWUpdateListener Listener(UpdateListener, UI, UE);
5420 bool UserRemovedFromCSEMaps = false;
5422 // A user can appear in a use list multiple times, and when this
5423 // happens the uses are usually next to each other in the list.
5424 // To help reduce the number of CSE recomputations, process all
5425 // the uses of this user that we can find this way.
5427 SDUse &Use = UI.getUse();
5429 // Skip uses of different values from the same node.
5430 if (Use.getResNo() != From.getResNo()) {
5435 // If this node hasn't been modified yet, it's still in the CSE maps,
5436 // so remove its old self from the CSE maps.
5437 if (!UserRemovedFromCSEMaps) {
5438 RemoveNodeFromCSEMaps(User);
5439 UserRemovedFromCSEMaps = true;
5444 } while (UI != UE && *UI == User);
5446 // We are iterating over all uses of the From node, so if a use
5447 // doesn't use the specific value, no changes are made.
5448 if (!UserRemovedFromCSEMaps)
5451 // Now that we have modified User, add it back to the CSE maps. If it
5452 // already exists there, recursively merge the results together.
5453 AddModifiedNodeToCSEMaps(User, &Listener);
5456 // If we just RAUW'd the root, take note.
5457 if (From == getRoot())
5462 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5463 /// to record information about a use.
5470 /// operator< - Sort Memos by User.
5471 bool operator<(const UseMemo &L, const UseMemo &R) {
5472 return (intptr_t)L.User < (intptr_t)R.User;
5476 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5477 /// uses of other values produced by From.getNode() alone. The same value
5478 /// may appear in both the From and To list. The Deleted vector is
5479 /// handled the same way as for ReplaceAllUsesWith.
5480 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5483 DAGUpdateListener *UpdateListener){
5484 // Handle the simple, trivial case efficiently.
5486 return ReplaceAllUsesOfValueWith(*From, *To, UpdateListener);
5488 // Read up all the uses and make records of them. This helps
5489 // processing new uses that are introduced during the
5490 // replacement process.
5491 SmallVector<UseMemo, 4> Uses;
5492 for (unsigned i = 0; i != Num; ++i) {
5493 unsigned FromResNo = From[i].getResNo();
5494 SDNode *FromNode = From[i].getNode();
5495 for (SDNode::use_iterator UI = FromNode->use_begin(),
5496 E = FromNode->use_end(); UI != E; ++UI) {
5497 SDUse &Use = UI.getUse();
5498 if (Use.getResNo() == FromResNo) {
5499 UseMemo Memo = { *UI, i, &Use };
5500 Uses.push_back(Memo);
5505 // Sort the uses, so that all the uses from a given User are together.
5506 std::sort(Uses.begin(), Uses.end());
5508 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5509 UseIndex != UseIndexEnd; ) {
5510 // We know that this user uses some value of From. If it is the right
5511 // value, update it.
5512 SDNode *User = Uses[UseIndex].User;
5514 // This node is about to morph, remove its old self from the CSE maps.
5515 RemoveNodeFromCSEMaps(User);
5517 // The Uses array is sorted, so all the uses for a given User
5518 // are next to each other in the list.
5519 // To help reduce the number of CSE recomputations, process all
5520 // the uses of this user that we can find this way.
5522 unsigned i = Uses[UseIndex].Index;
5523 SDUse &Use = *Uses[UseIndex].Use;
5527 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5529 // Now that we have modified User, add it back to the CSE maps. If it
5530 // already exists there, recursively merge the results together.
5531 AddModifiedNodeToCSEMaps(User, UpdateListener);
5535 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5536 /// based on their topological order. It returns the maximum id and a vector
5537 /// of the SDNodes* in assigned order by reference.
5538 unsigned SelectionDAG::AssignTopologicalOrder() {
5540 unsigned DAGSize = 0;
5542 // SortedPos tracks the progress of the algorithm. Nodes before it are
5543 // sorted, nodes after it are unsorted. When the algorithm completes
5544 // it is at the end of the list.
5545 allnodes_iterator SortedPos = allnodes_begin();
5547 // Visit all the nodes. Move nodes with no operands to the front of
5548 // the list immediately. Annotate nodes that do have operands with their
5549 // operand count. Before we do this, the Node Id fields of the nodes
5550 // may contain arbitrary values. After, the Node Id fields for nodes
5551 // before SortedPos will contain the topological sort index, and the
5552 // Node Id fields for nodes At SortedPos and after will contain the
5553 // count of outstanding operands.
5554 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5557 unsigned Degree = N->getNumOperands();
5559 // A node with no uses, add it to the result array immediately.
5560 N->setNodeId(DAGSize++);
5561 allnodes_iterator Q = N;
5563 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5564 assert(SortedPos != AllNodes.end() && "Overran node list");
5567 // Temporarily use the Node Id as scratch space for the degree count.
5568 N->setNodeId(Degree);
5572 // Visit all the nodes. As we iterate, moves nodes into sorted order,
5573 // such that by the time the end is reached all nodes will be sorted.
5574 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5577 // N is in sorted position, so all its uses have one less operand
5578 // that needs to be sorted.
5579 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5582 unsigned Degree = P->getNodeId();
5583 assert(Degree != 0 && "Invalid node degree");
5586 // All of P's operands are sorted, so P may sorted now.
5587 P->setNodeId(DAGSize++);
5589 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5590 assert(SortedPos != AllNodes.end() && "Overran node list");
5593 // Update P's outstanding operand count.
5594 P->setNodeId(Degree);
5597 if (I == SortedPos) {
5600 dbgs() << "Overran sorted position:\n";
5603 llvm_unreachable(0);
5607 assert(SortedPos == AllNodes.end() &&
5608 "Topological sort incomplete!");
5609 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5610 "First node in topological sort is not the entry token!");
5611 assert(AllNodes.front().getNodeId() == 0 &&
5612 "First node in topological sort has non-zero id!");
5613 assert(AllNodes.front().getNumOperands() == 0 &&
5614 "First node in topological sort has operands!");
5615 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5616 "Last node in topologic sort has unexpected id!");
5617 assert(AllNodes.back().use_empty() &&
5618 "Last node in topologic sort has users!");
5619 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5623 /// AssignOrdering - Assign an order to the SDNode.
5624 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5625 assert(SD && "Trying to assign an order to a null node!");
5626 Ordering->add(SD, Order);
5629 /// GetOrdering - Get the order for the SDNode.
5630 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5631 assert(SD && "Trying to get the order of a null node!");
5632 return Ordering->getOrder(SD);
5635 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5636 /// value is produced by SD.
5637 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5638 DbgInfo->add(DB, SD, isParameter);
5640 SD->setHasDebugValue(true);
5643 /// TransferDbgValues - Transfer SDDbgValues.
5644 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5645 if (From == To || !From.getNode()->getHasDebugValue())
5647 SDNode *FromNode = From.getNode();
5648 SDNode *ToNode = To.getNode();
5649 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5650 SmallVector<SDDbgValue *, 2> ClonedDVs;
5651 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5653 SDDbgValue *Dbg = *I;
5654 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5655 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5656 Dbg->getOffset(), Dbg->getDebugLoc(),
5658 ClonedDVs.push_back(Clone);
5661 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5662 E = ClonedDVs.end(); I != E; ++I)
5663 AddDbgValue(*I, ToNode, false);
5666 //===----------------------------------------------------------------------===//
5668 //===----------------------------------------------------------------------===//
5670 HandleSDNode::~HandleSDNode() {
5674 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5675 const GlobalValue *GA,
5676 EVT VT, int64_t o, unsigned char TF)
5677 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5681 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5682 MachineMemOperand *mmo)
5683 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5684 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5685 MMO->isNonTemporal(), MMO->isInvariant());
5686 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5687 assert(isNonTemporal() == MMO->isNonTemporal() &&
5688 "Non-temporal encoding error!");
5689 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5692 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5693 const SDValue *Ops, unsigned NumOps, EVT memvt,
5694 MachineMemOperand *mmo)
5695 : SDNode(Opc, dl, VTs, Ops, NumOps),
5696 MemoryVT(memvt), MMO(mmo) {
5697 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5698 MMO->isNonTemporal(), MMO->isInvariant());
5699 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5700 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5703 /// Profile - Gather unique data for the node.
5705 void SDNode::Profile(FoldingSetNodeID &ID) const {
5706 AddNodeIDNode(ID, this);
5711 std::vector<EVT> VTs;
5714 VTs.reserve(MVT::LAST_VALUETYPE);
5715 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5716 VTs.push_back(MVT((MVT::SimpleValueType)i));
5721 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5722 static ManagedStatic<EVTArray> SimpleVTArray;
5723 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5725 /// getValueTypeList - Return a pointer to the specified value type.
5727 const EVT *SDNode::getValueTypeList(EVT VT) {
5728 if (VT.isExtended()) {
5729 sys::SmartScopedLock<true> Lock(*VTMutex);
5730 return &(*EVTs->insert(VT).first);
5732 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5733 "Value type out of range!");
5734 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5738 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5739 /// indicated value. This method ignores uses of other values defined by this
5741 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5742 assert(Value < getNumValues() && "Bad value!");
5744 // TODO: Only iterate over uses of a given value of the node
5745 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5746 if (UI.getUse().getResNo() == Value) {
5753 // Found exactly the right number of uses?
5758 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5759 /// value. This method ignores uses of other values defined by this operation.
5760 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5761 assert(Value < getNumValues() && "Bad value!");
5763 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5764 if (UI.getUse().getResNo() == Value)
5771 /// isOnlyUserOf - Return true if this node is the only use of N.
5773 bool SDNode::isOnlyUserOf(SDNode *N) const {
5775 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5786 /// isOperand - Return true if this node is an operand of N.
5788 bool SDValue::isOperandOf(SDNode *N) const {
5789 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5790 if (*this == N->getOperand(i))
5795 bool SDNode::isOperandOf(SDNode *N) const {
5796 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5797 if (this == N->OperandList[i].getNode())
5802 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5803 /// be a chain) reaches the specified operand without crossing any
5804 /// side-effecting instructions on any chain path. In practice, this looks
5805 /// through token factors and non-volatile loads. In order to remain efficient,
5806 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5807 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5808 unsigned Depth) const {
5809 if (*this == Dest) return true;
5811 // Don't search too deeply, we just want to be able to see through
5812 // TokenFactor's etc.
5813 if (Depth == 0) return false;
5815 // If this is a token factor, all inputs to the TF happen in parallel. If any
5816 // of the operands of the TF does not reach dest, then we cannot do the xform.
5817 if (getOpcode() == ISD::TokenFactor) {
5818 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5819 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5824 // Loads don't have side effects, look through them.
5825 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5826 if (!Ld->isVolatile())
5827 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5832 /// hasPredecessor - Return true if N is a predecessor of this node.
5833 /// N is either an operand of this node, or can be reached by recursively
5834 /// traversing up the operands.
5835 /// NOTE: This is an expensive method. Use it carefully.
5836 bool SDNode::hasPredecessor(const SDNode *N) const {
5837 SmallPtrSet<const SDNode *, 32> Visited;
5838 SmallVector<const SDNode *, 16> Worklist;
5839 return hasPredecessorHelper(N, Visited, Worklist);
5842 bool SDNode::hasPredecessorHelper(const SDNode *N,
5843 SmallPtrSet<const SDNode *, 32> &Visited,
5844 SmallVector<const SDNode *, 16> &Worklist) const {
5845 if (Visited.empty()) {
5846 Worklist.push_back(this);
5848 // Take a look in the visited set. If we've already encountered this node
5849 // we needn't search further.
5850 if (Visited.count(N))
5854 // Haven't visited N yet. Continue the search.
5855 while (!Worklist.empty()) {
5856 const SDNode *M = Worklist.pop_back_val();
5857 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5858 SDNode *Op = M->getOperand(i).getNode();
5859 if (Visited.insert(Op))
5860 Worklist.push_back(Op);
5869 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5870 assert(Num < NumOperands && "Invalid child # of SDNode!");
5871 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5874 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5875 assert(N->getNumValues() == 1 &&
5876 "Can't unroll a vector with multiple results!");
5878 EVT VT = N->getValueType(0);
5879 unsigned NE = VT.getVectorNumElements();
5880 EVT EltVT = VT.getVectorElementType();
5881 DebugLoc dl = N->getDebugLoc();
5883 SmallVector<SDValue, 8> Scalars;
5884 SmallVector<SDValue, 4> Operands(N->getNumOperands());
5886 // If ResNE is 0, fully unroll the vector op.
5889 else if (NE > ResNE)
5893 for (i= 0; i != NE; ++i) {
5894 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
5895 SDValue Operand = N->getOperand(j);
5896 EVT OperandVT = Operand.getValueType();
5897 if (OperandVT.isVector()) {
5898 // A vector operand; extract a single element.
5899 EVT OperandEltVT = OperandVT.getVectorElementType();
5900 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
5903 getConstant(i, TLI.getPointerTy()));
5905 // A scalar operand; just use it as is.
5906 Operands[j] = Operand;
5910 switch (N->getOpcode()) {
5912 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
5913 &Operands[0], Operands.size()));
5916 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
5917 &Operands[0], Operands.size()));
5924 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
5925 getShiftAmountOperand(Operands[0].getValueType(),
5928 case ISD::SIGN_EXTEND_INREG:
5929 case ISD::FP_ROUND_INREG: {
5930 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
5931 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
5933 getValueType(ExtVT)));
5938 for (; i < ResNE; ++i)
5939 Scalars.push_back(getUNDEF(EltVT));
5941 return getNode(ISD::BUILD_VECTOR, dl,
5942 EVT::getVectorVT(*getContext(), EltVT, ResNE),
5943 &Scalars[0], Scalars.size());
5947 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
5948 /// location that is 'Dist' units away from the location that the 'Base' load
5949 /// is loading from.
5950 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
5951 unsigned Bytes, int Dist) const {
5952 if (LD->getChain() != Base->getChain())
5954 EVT VT = LD->getValueType(0);
5955 if (VT.getSizeInBits() / 8 != Bytes)
5958 SDValue Loc = LD->getOperand(1);
5959 SDValue BaseLoc = Base->getOperand(1);
5960 if (Loc.getOpcode() == ISD::FrameIndex) {
5961 if (BaseLoc.getOpcode() != ISD::FrameIndex)
5963 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
5964 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
5965 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
5966 int FS = MFI->getObjectSize(FI);
5967 int BFS = MFI->getObjectSize(BFI);
5968 if (FS != BFS || FS != (int)Bytes) return false;
5969 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
5973 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
5974 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
5977 const GlobalValue *GV1 = NULL;
5978 const GlobalValue *GV2 = NULL;
5979 int64_t Offset1 = 0;
5980 int64_t Offset2 = 0;
5981 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
5982 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
5983 if (isGA1 && isGA2 && GV1 == GV2)
5984 return Offset1 == (Offset2 + Dist*Bytes);
5989 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
5990 /// it cannot be inferred.
5991 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
5992 // If this is a GlobalAddress + cst, return the alignment.
5993 const GlobalValue *GV;
5994 int64_t GVOffset = 0;
5995 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
5996 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
5997 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
5998 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
5999 TLI.getTargetData());
6000 unsigned AlignBits = KnownZero.countTrailingOnes();
6001 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6003 return MinAlign(Align, GVOffset);
6006 // If this is a direct reference to a stack slot, use information about the
6007 // stack slot's alignment.
6008 int FrameIdx = 1 << 31;
6009 int64_t FrameOffset = 0;
6010 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6011 FrameIdx = FI->getIndex();
6012 } else if (isBaseWithConstantOffset(Ptr) &&
6013 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6015 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6016 FrameOffset = Ptr.getConstantOperandVal(1);
6019 if (FrameIdx != (1 << 31)) {
6020 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6021 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6029 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6030 unsigned GlobalAddressSDNode::getAddressSpace() const {
6031 return getGlobal()->getType()->getAddressSpace();
6035 Type *ConstantPoolSDNode::getType() const {
6036 if (isMachineConstantPoolEntry())
6037 return Val.MachineCPVal->getType();
6038 return Val.ConstVal->getType();
6041 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6043 unsigned &SplatBitSize,
6045 unsigned MinSplatBits,
6047 EVT VT = getValueType(0);
6048 assert(VT.isVector() && "Expected a vector type");
6049 unsigned sz = VT.getSizeInBits();
6050 if (MinSplatBits > sz)
6053 SplatValue = APInt(sz, 0);
6054 SplatUndef = APInt(sz, 0);
6056 // Get the bits. Bits with undefined values (when the corresponding element
6057 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6058 // in SplatValue. If any of the values are not constant, give up and return
6060 unsigned int nOps = getNumOperands();
6061 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6062 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6064 for (unsigned j = 0; j < nOps; ++j) {
6065 unsigned i = isBigEndian ? nOps-1-j : j;
6066 SDValue OpVal = getOperand(i);
6067 unsigned BitPos = j * EltBitSize;
6069 if (OpVal.getOpcode() == ISD::UNDEF)
6070 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6071 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6072 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6073 zextOrTrunc(sz) << BitPos;
6074 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6075 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6080 // The build_vector is all constants or undefs. Find the smallest element
6081 // size that splats the vector.
6083 HasAnyUndefs = (SplatUndef != 0);
6086 unsigned HalfSize = sz / 2;
6087 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6088 APInt LowValue = SplatValue.trunc(HalfSize);
6089 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6090 APInt LowUndef = SplatUndef.trunc(HalfSize);
6092 // If the two halves do not match (ignoring undef bits), stop here.
6093 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6094 MinSplatBits > HalfSize)
6097 SplatValue = HighValue | LowValue;
6098 SplatUndef = HighUndef & LowUndef;
6107 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6108 // Find the first non-undef value in the shuffle mask.
6110 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6113 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6115 // Make sure all remaining elements are either undef or the same as the first
6117 for (int Idx = Mask[i]; i != e; ++i)
6118 if (Mask[i] >= 0 && Mask[i] != Idx)
6124 static void checkForCyclesHelper(const SDNode *N,
6125 SmallPtrSet<const SDNode*, 32> &Visited,
6126 SmallPtrSet<const SDNode*, 32> &Checked) {
6127 // If this node has already been checked, don't check it again.
6128 if (Checked.count(N))
6131 // If a node has already been visited on this depth-first walk, reject it as
6133 if (!Visited.insert(N)) {
6134 dbgs() << "Offending node:\n";
6136 errs() << "Detected cycle in SelectionDAG\n";
6140 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6141 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6148 void llvm::checkForCycles(const llvm::SDNode *N) {
6150 assert(N && "Checking nonexistant SDNode");
6151 SmallPtrSet<const SDNode*, 32> visited;
6152 SmallPtrSet<const SDNode*, 32> checked;
6153 checkForCyclesHelper(N, visited, checked);
6157 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6158 checkForCycles(DAG->getRoot().getNode());