1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeOrdering.h"
16 #include "SDNodeDbgValue.h"
17 #include "llvm/CallingConv.h"
18 #include "llvm/Constants.h"
19 #include "llvm/DebugInfo.h"
20 #include "llvm/DerivedTypes.h"
21 #include "llvm/Function.h"
22 #include "llvm/GlobalAlias.h"
23 #include "llvm/GlobalVariable.h"
24 #include "llvm/Intrinsics.h"
25 #include "llvm/Analysis/ValueTracking.h"
26 #include "llvm/Assembly/Writer.h"
27 #include "llvm/CodeGen/MachineBasicBlock.h"
28 #include "llvm/CodeGen/MachineConstantPool.h"
29 #include "llvm/CodeGen/MachineFrameInfo.h"
30 #include "llvm/CodeGen/MachineModuleInfo.h"
31 #include "llvm/Target/TargetRegisterInfo.h"
32 #include "llvm/DataLayout.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetSelectionDAGInfo.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetIntrinsicInfo.h"
38 #include "llvm/Target/TargetMachine.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Debug.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/ManagedStatic.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Support/Mutex.h"
46 #include "llvm/ADT/SetVector.h"
47 #include "llvm/ADT/SmallPtrSet.h"
48 #include "llvm/ADT/SmallSet.h"
49 #include "llvm/ADT/SmallVector.h"
50 #include "llvm/ADT/StringExtras.h"
55 /// makeVTList - Return an instance of the SDVTList struct initialized with the
56 /// specified members.
57 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
58 SDVTList Res = {VTs, NumVTs};
62 static const fltSemantics *EVTToAPFloatSemantics(EVT VT) {
63 switch (VT.getSimpleVT().SimpleTy) {
64 default: llvm_unreachable("Unknown FP format");
65 case MVT::f16: return &APFloat::IEEEhalf;
66 case MVT::f32: return &APFloat::IEEEsingle;
67 case MVT::f64: return &APFloat::IEEEdouble;
68 case MVT::f80: return &APFloat::x87DoubleExtended;
69 case MVT::f128: return &APFloat::IEEEquad;
70 case MVT::ppcf128: return &APFloat::PPCDoubleDouble;
74 // Default null implementations of the callbacks.
75 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
76 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
78 //===----------------------------------------------------------------------===//
79 // ConstantFPSDNode Class
80 //===----------------------------------------------------------------------===//
82 /// isExactlyValue - We don't rely on operator== working on double values, as
83 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
84 /// As such, this method can be used to do an exact bit-for-bit comparison of
85 /// two floating point values.
86 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
87 return getValueAPF().bitwiseIsEqual(V);
90 bool ConstantFPSDNode::isValueValidForType(EVT VT,
92 assert(VT.isFloatingPoint() && "Can only convert between FP types");
94 // PPC long double cannot be converted to any other type.
95 if (VT == MVT::ppcf128 ||
96 &Val.getSemantics() == &APFloat::PPCDoubleDouble)
99 // convert modifies in place, so make a copy.
100 APFloat Val2 = APFloat(Val);
102 (void) Val2.convert(*EVTToAPFloatSemantics(VT), APFloat::rmNearestTiesToEven,
107 //===----------------------------------------------------------------------===//
109 //===----------------------------------------------------------------------===//
111 /// isBuildVectorAllOnes - Return true if the specified node is a
112 /// BUILD_VECTOR where all of the elements are ~0 or undef.
113 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
114 // Look through a bit convert.
115 if (N->getOpcode() == ISD::BITCAST)
116 N = N->getOperand(0).getNode();
118 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
120 unsigned i = 0, e = N->getNumOperands();
122 // Skip over all of the undef values.
123 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
126 // Do not accept an all-undef vector.
127 if (i == e) return false;
129 // Do not accept build_vectors that aren't all constants or which have non-~0
130 // elements. We have to be a bit careful here, as the type of the constant
131 // may not be the same as the type of the vector elements due to type
132 // legalization (the elements are promoted to a legal type for the target and
133 // a vector of a type may be legal when the base element type is not).
134 // We only want to check enough bits to cover the vector elements, because
135 // we care if the resultant vector is all ones, not whether the individual
137 SDValue NotZero = N->getOperand(i);
138 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
139 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
140 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
142 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
143 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
148 // Okay, we have at least one ~0 value, check to see if the rest match or are
149 // undefs. Even with the above element type twiddling, this should be OK, as
150 // the same type legalization should have applied to all the elements.
151 for (++i; i != e; ++i)
152 if (N->getOperand(i) != NotZero &&
153 N->getOperand(i).getOpcode() != ISD::UNDEF)
159 /// isBuildVectorAllZeros - Return true if the specified node is a
160 /// BUILD_VECTOR where all of the elements are 0 or undef.
161 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
162 // Look through a bit convert.
163 if (N->getOpcode() == ISD::BITCAST)
164 N = N->getOperand(0).getNode();
166 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
168 unsigned i = 0, e = N->getNumOperands();
170 // Skip over all of the undef values.
171 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
174 // Do not accept an all-undef vector.
175 if (i == e) return false;
177 // Do not accept build_vectors that aren't all constants or which have non-0
179 SDValue Zero = N->getOperand(i);
180 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Zero)) {
181 if (!CN->isNullValue())
183 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Zero)) {
184 if (!CFPN->getValueAPF().isPosZero())
189 // Okay, we have at least one 0 value, check to see if the rest match or are
191 for (++i; i != e; ++i)
192 if (N->getOperand(i) != Zero &&
193 N->getOperand(i).getOpcode() != ISD::UNDEF)
198 /// isScalarToVector - Return true if the specified node is a
199 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low
200 /// element is not an undef.
201 bool ISD::isScalarToVector(const SDNode *N) {
202 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR)
205 if (N->getOpcode() != ISD::BUILD_VECTOR)
207 if (N->getOperand(0).getOpcode() == ISD::UNDEF)
209 unsigned NumElems = N->getNumOperands();
212 for (unsigned i = 1; i < NumElems; ++i) {
213 SDValue V = N->getOperand(i);
214 if (V.getOpcode() != ISD::UNDEF)
220 /// allOperandsUndef - Return true if the node has at least one operand
221 /// and all operands of the specified node are ISD::UNDEF.
222 bool ISD::allOperandsUndef(const SDNode *N) {
223 // Return false if the node has no operands.
224 // This is "logically inconsistent" with the definition of "all" but
225 // is probably the desired behavior.
226 if (N->getNumOperands() == 0)
229 for (unsigned i = 0, e = N->getNumOperands(); i != e ; ++i)
230 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
236 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
237 /// when given the operation for (X op Y).
238 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
239 // To perform this operation, we just need to swap the L and G bits of the
241 unsigned OldL = (Operation >> 2) & 1;
242 unsigned OldG = (Operation >> 1) & 1;
243 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
244 (OldL << 1) | // New G bit
245 (OldG << 2)); // New L bit.
248 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
249 /// 'op' is a valid SetCC operation.
250 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
251 unsigned Operation = Op;
253 Operation ^= 7; // Flip L, G, E bits, but not U.
255 Operation ^= 15; // Flip all of the condition bits.
257 if (Operation > ISD::SETTRUE2)
258 Operation &= ~8; // Don't let N and U bits get set.
260 return ISD::CondCode(Operation);
264 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
265 /// signed operation and 2 if the result is an unsigned comparison. Return zero
266 /// if the operation does not depend on the sign of the input (setne and seteq).
267 static int isSignedOp(ISD::CondCode Opcode) {
269 default: llvm_unreachable("Illegal integer setcc operation!");
271 case ISD::SETNE: return 0;
275 case ISD::SETGE: return 1;
279 case ISD::SETUGE: return 2;
283 /// getSetCCOrOperation - Return the result of a logical OR between different
284 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
285 /// returns SETCC_INVALID if it is not possible to represent the resultant
287 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
289 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
290 // Cannot fold a signed integer setcc with an unsigned integer setcc.
291 return ISD::SETCC_INVALID;
293 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
295 // If the N and U bits get set then the resultant comparison DOES suddenly
296 // care about orderedness, and is true when ordered.
297 if (Op > ISD::SETTRUE2)
298 Op &= ~16; // Clear the U bit if the N bit is set.
300 // Canonicalize illegal integer setcc's.
301 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
304 return ISD::CondCode(Op);
307 /// getSetCCAndOperation - Return the result of a logical AND between different
308 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
309 /// function returns zero if it is not possible to represent the resultant
311 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
313 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
314 // Cannot fold a signed setcc with an unsigned setcc.
315 return ISD::SETCC_INVALID;
317 // Combine all of the condition bits.
318 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
320 // Canonicalize illegal integer setcc's.
324 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
325 case ISD::SETOEQ: // SETEQ & SETU[LG]E
326 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
327 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
328 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
335 //===----------------------------------------------------------------------===//
336 // SDNode Profile Support
337 //===----------------------------------------------------------------------===//
339 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
341 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
345 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
346 /// solely with their pointer.
347 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
348 ID.AddPointer(VTList.VTs);
351 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
353 static void AddNodeIDOperands(FoldingSetNodeID &ID,
354 const SDValue *Ops, unsigned NumOps) {
355 for (; NumOps; --NumOps, ++Ops) {
356 ID.AddPointer(Ops->getNode());
357 ID.AddInteger(Ops->getResNo());
361 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
363 static void AddNodeIDOperands(FoldingSetNodeID &ID,
364 const SDUse *Ops, unsigned NumOps) {
365 for (; NumOps; --NumOps, ++Ops) {
366 ID.AddPointer(Ops->getNode());
367 ID.AddInteger(Ops->getResNo());
371 static void AddNodeIDNode(FoldingSetNodeID &ID,
372 unsigned short OpC, SDVTList VTList,
373 const SDValue *OpList, unsigned N) {
374 AddNodeIDOpcode(ID, OpC);
375 AddNodeIDValueTypes(ID, VTList);
376 AddNodeIDOperands(ID, OpList, N);
379 /// AddNodeIDCustom - If this is an SDNode with special info, add this info to
381 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
382 switch (N->getOpcode()) {
383 case ISD::TargetExternalSymbol:
384 case ISD::ExternalSymbol:
385 llvm_unreachable("Should only be used on nodes with operands");
386 default: break; // Normal nodes don't need extra info.
387 case ISD::TargetConstant:
389 ID.AddPointer(cast<ConstantSDNode>(N)->getConstantIntValue());
391 case ISD::TargetConstantFP:
392 case ISD::ConstantFP: {
393 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
396 case ISD::TargetGlobalAddress:
397 case ISD::GlobalAddress:
398 case ISD::TargetGlobalTLSAddress:
399 case ISD::GlobalTLSAddress: {
400 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
401 ID.AddPointer(GA->getGlobal());
402 ID.AddInteger(GA->getOffset());
403 ID.AddInteger(GA->getTargetFlags());
404 ID.AddInteger(GA->getAddressSpace());
407 case ISD::BasicBlock:
408 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
411 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
413 case ISD::RegisterMask:
414 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
417 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
419 case ISD::FrameIndex:
420 case ISD::TargetFrameIndex:
421 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
424 case ISD::TargetJumpTable:
425 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
426 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
428 case ISD::ConstantPool:
429 case ISD::TargetConstantPool: {
430 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
431 ID.AddInteger(CP->getAlignment());
432 ID.AddInteger(CP->getOffset());
433 if (CP->isMachineConstantPoolEntry())
434 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
436 ID.AddPointer(CP->getConstVal());
437 ID.AddInteger(CP->getTargetFlags());
440 case ISD::TargetIndex: {
441 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
442 ID.AddInteger(TI->getIndex());
443 ID.AddInteger(TI->getOffset());
444 ID.AddInteger(TI->getTargetFlags());
448 const LoadSDNode *LD = cast<LoadSDNode>(N);
449 ID.AddInteger(LD->getMemoryVT().getRawBits());
450 ID.AddInteger(LD->getRawSubclassData());
451 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
455 const StoreSDNode *ST = cast<StoreSDNode>(N);
456 ID.AddInteger(ST->getMemoryVT().getRawBits());
457 ID.AddInteger(ST->getRawSubclassData());
458 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
461 case ISD::ATOMIC_CMP_SWAP:
462 case ISD::ATOMIC_SWAP:
463 case ISD::ATOMIC_LOAD_ADD:
464 case ISD::ATOMIC_LOAD_SUB:
465 case ISD::ATOMIC_LOAD_AND:
466 case ISD::ATOMIC_LOAD_OR:
467 case ISD::ATOMIC_LOAD_XOR:
468 case ISD::ATOMIC_LOAD_NAND:
469 case ISD::ATOMIC_LOAD_MIN:
470 case ISD::ATOMIC_LOAD_MAX:
471 case ISD::ATOMIC_LOAD_UMIN:
472 case ISD::ATOMIC_LOAD_UMAX:
473 case ISD::ATOMIC_LOAD:
474 case ISD::ATOMIC_STORE: {
475 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
476 ID.AddInteger(AT->getMemoryVT().getRawBits());
477 ID.AddInteger(AT->getRawSubclassData());
478 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
481 case ISD::PREFETCH: {
482 const MemSDNode *PF = cast<MemSDNode>(N);
483 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
486 case ISD::VECTOR_SHUFFLE: {
487 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
488 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
490 ID.AddInteger(SVN->getMaskElt(i));
493 case ISD::TargetBlockAddress:
494 case ISD::BlockAddress: {
495 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
496 ID.AddPointer(BA->getBlockAddress());
497 ID.AddInteger(BA->getOffset());
498 ID.AddInteger(BA->getTargetFlags());
501 } // end switch (N->getOpcode())
503 // Target specific memory nodes could also have address spaces to check.
504 if (N->isTargetMemoryOpcode())
505 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
508 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
510 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
511 AddNodeIDOpcode(ID, N->getOpcode());
512 // Add the return value info.
513 AddNodeIDValueTypes(ID, N->getVTList());
514 // Add the operand info.
515 AddNodeIDOperands(ID, N->op_begin(), N->getNumOperands());
517 // Handle SDNode leafs with special info.
518 AddNodeIDCustom(ID, N);
521 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
522 /// the CSE map that carries volatility, temporalness, indexing mode, and
523 /// extension/truncation information.
525 static inline unsigned
526 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
527 bool isNonTemporal, bool isInvariant) {
528 assert((ConvType & 3) == ConvType &&
529 "ConvType may not require more than 2 bits!");
530 assert((AM & 7) == AM &&
531 "AM may not require more than 3 bits!");
535 (isNonTemporal << 6) |
539 //===----------------------------------------------------------------------===//
540 // SelectionDAG Class
541 //===----------------------------------------------------------------------===//
543 /// doNotCSE - Return true if CSE should not be performed for this node.
544 static bool doNotCSE(SDNode *N) {
545 if (N->getValueType(0) == MVT::Glue)
546 return true; // Never CSE anything that produces a flag.
548 switch (N->getOpcode()) {
550 case ISD::HANDLENODE:
552 return true; // Never CSE these nodes.
555 // Check that remaining values produced are not flags.
556 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
557 if (N->getValueType(i) == MVT::Glue)
558 return true; // Never CSE anything that produces a flag.
563 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
565 void SelectionDAG::RemoveDeadNodes() {
566 // Create a dummy node (which is not added to allnodes), that adds a reference
567 // to the root node, preventing it from being deleted.
568 HandleSDNode Dummy(getRoot());
570 SmallVector<SDNode*, 128> DeadNodes;
572 // Add all obviously-dead nodes to the DeadNodes worklist.
573 for (allnodes_iterator I = allnodes_begin(), E = allnodes_end(); I != E; ++I)
575 DeadNodes.push_back(I);
577 RemoveDeadNodes(DeadNodes);
579 // If the root changed (e.g. it was a dead load, update the root).
580 setRoot(Dummy.getValue());
583 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
584 /// given list, and any nodes that become unreachable as a result.
585 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
587 // Process the worklist, deleting the nodes and adding their uses to the
589 while (!DeadNodes.empty()) {
590 SDNode *N = DeadNodes.pop_back_val();
592 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
593 DUL->NodeDeleted(N, 0);
595 // Take the node out of the appropriate CSE map.
596 RemoveNodeFromCSEMaps(N);
598 // Next, brutally remove the operand list. This is safe to do, as there are
599 // no cycles in the graph.
600 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
602 SDNode *Operand = Use.getNode();
605 // Now that we removed this operand, see if there are no uses of it left.
606 if (Operand->use_empty())
607 DeadNodes.push_back(Operand);
614 void SelectionDAG::RemoveDeadNode(SDNode *N){
615 SmallVector<SDNode*, 16> DeadNodes(1, N);
617 // Create a dummy node that adds a reference to the root node, preventing
618 // it from being deleted. (This matters if the root is an operand of the
620 HandleSDNode Dummy(getRoot());
622 RemoveDeadNodes(DeadNodes);
625 void SelectionDAG::DeleteNode(SDNode *N) {
626 // First take this out of the appropriate CSE map.
627 RemoveNodeFromCSEMaps(N);
629 // Finally, remove uses due to operands of this node, remove from the
630 // AllNodes list, and delete the node.
631 DeleteNodeNotInCSEMaps(N);
634 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
635 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
636 assert(N->use_empty() && "Cannot delete a node that is not dead!");
638 // Drop all of the operands and decrement used node's use counts.
644 void SelectionDAG::DeallocateNode(SDNode *N) {
645 if (N->OperandsNeedDelete)
646 delete[] N->OperandList;
648 // Set the opcode to DELETED_NODE to help catch bugs when node
649 // memory is reallocated.
650 N->NodeType = ISD::DELETED_NODE;
652 NodeAllocator.Deallocate(AllNodes.remove(N));
654 // Remove the ordering of this node.
657 // If any of the SDDbgValue nodes refer to this SDNode, invalidate them.
658 ArrayRef<SDDbgValue*> DbgVals = DbgInfo->getSDDbgValues(N);
659 for (unsigned i = 0, e = DbgVals.size(); i != e; ++i)
660 DbgVals[i]->setIsInvalidated();
663 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
664 /// correspond to it. This is useful when we're about to delete or repurpose
665 /// the node. We don't want future request for structurally identical nodes
666 /// to return N anymore.
667 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
669 switch (N->getOpcode()) {
670 case ISD::HANDLENODE: return false; // noop.
672 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
673 "Cond code doesn't exist!");
674 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != 0;
675 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = 0;
677 case ISD::ExternalSymbol:
678 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
680 case ISD::TargetExternalSymbol: {
681 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
682 Erased = TargetExternalSymbols.erase(
683 std::pair<std::string,unsigned char>(ESN->getSymbol(),
684 ESN->getTargetFlags()));
687 case ISD::VALUETYPE: {
688 EVT VT = cast<VTSDNode>(N)->getVT();
689 if (VT.isExtended()) {
690 Erased = ExtendedValueTypeNodes.erase(VT);
692 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
693 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
698 // Remove it from the CSE Map.
699 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
700 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
701 Erased = CSEMap.RemoveNode(N);
705 // Verify that the node was actually in one of the CSE maps, unless it has a
706 // flag result (which cannot be CSE'd) or is one of the special cases that are
707 // not subject to CSE.
708 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
709 !N->isMachineOpcode() && !doNotCSE(N)) {
712 llvm_unreachable("Node is not in map!");
718 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
719 /// maps and modified in place. Add it back to the CSE maps, unless an identical
720 /// node already exists, in which case transfer all its users to the existing
721 /// node. This transfer can potentially trigger recursive merging.
724 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
725 // For node types that aren't CSE'd, just act as if no identical node
728 SDNode *Existing = CSEMap.GetOrInsertNode(N);
730 // If there was already an existing matching node, use ReplaceAllUsesWith
731 // to replace the dead one with the existing one. This can cause
732 // recursive merging of other unrelated nodes down the line.
733 ReplaceAllUsesWith(N, Existing);
735 // N is now dead. Inform the listeners and delete it.
736 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
737 DUL->NodeDeleted(N, Existing);
738 DeleteNodeNotInCSEMaps(N);
743 // If the node doesn't already exist, we updated it. Inform listeners.
744 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
748 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
749 /// were replaced with those specified. If this node is never memoized,
750 /// return null, otherwise return a pointer to the slot it would take. If a
751 /// node already exists with these operands, the slot will be non-null.
752 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
757 SDValue Ops[] = { Op };
759 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 1);
760 AddNodeIDCustom(ID, N);
761 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
765 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
766 /// were replaced with those specified. If this node is never memoized,
767 /// return null, otherwise return a pointer to the slot it would take. If a
768 /// node already exists with these operands, the slot will be non-null.
769 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
770 SDValue Op1, SDValue Op2,
775 SDValue Ops[] = { Op1, Op2 };
777 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, 2);
778 AddNodeIDCustom(ID, N);
779 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
784 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
785 /// were replaced with those specified. If this node is never memoized,
786 /// return null, otherwise return a pointer to the slot it would take. If a
787 /// node already exists with these operands, the slot will be non-null.
788 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
789 const SDValue *Ops,unsigned NumOps,
795 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops, NumOps);
796 AddNodeIDCustom(ID, N);
797 SDNode *Node = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
802 /// VerifyNodeCommon - Sanity check the given node. Aborts if it is invalid.
803 static void VerifyNodeCommon(SDNode *N) {
804 switch (N->getOpcode()) {
807 case ISD::BUILD_PAIR: {
808 EVT VT = N->getValueType(0);
809 assert(N->getNumValues() == 1 && "Too many results!");
810 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
811 "Wrong return type!");
812 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
813 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
814 "Mismatched operand types!");
815 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
816 "Wrong operand type!");
817 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
818 "Wrong return type size");
821 case ISD::BUILD_VECTOR: {
822 assert(N->getNumValues() == 1 && "Too many results!");
823 assert(N->getValueType(0).isVector() && "Wrong return type!");
824 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
825 "Wrong number of operands!");
826 EVT EltVT = N->getValueType(0).getVectorElementType();
827 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
828 assert((I->getValueType() == EltVT ||
829 (EltVT.isInteger() && I->getValueType().isInteger() &&
830 EltVT.bitsLE(I->getValueType()))) &&
831 "Wrong operand type!");
832 assert(I->getValueType() == N->getOperand(0).getValueType() &&
833 "Operands must all have the same type");
840 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
841 static void VerifySDNode(SDNode *N) {
842 // The SDNode allocators cannot be used to allocate nodes with fields that are
843 // not present in an SDNode!
844 assert(!isa<MemSDNode>(N) && "Bad MemSDNode!");
845 assert(!isa<ShuffleVectorSDNode>(N) && "Bad ShuffleVectorSDNode!");
846 assert(!isa<ConstantSDNode>(N) && "Bad ConstantSDNode!");
847 assert(!isa<ConstantFPSDNode>(N) && "Bad ConstantFPSDNode!");
848 assert(!isa<GlobalAddressSDNode>(N) && "Bad GlobalAddressSDNode!");
849 assert(!isa<FrameIndexSDNode>(N) && "Bad FrameIndexSDNode!");
850 assert(!isa<JumpTableSDNode>(N) && "Bad JumpTableSDNode!");
851 assert(!isa<ConstantPoolSDNode>(N) && "Bad ConstantPoolSDNode!");
852 assert(!isa<BasicBlockSDNode>(N) && "Bad BasicBlockSDNode!");
853 assert(!isa<SrcValueSDNode>(N) && "Bad SrcValueSDNode!");
854 assert(!isa<MDNodeSDNode>(N) && "Bad MDNodeSDNode!");
855 assert(!isa<RegisterSDNode>(N) && "Bad RegisterSDNode!");
856 assert(!isa<BlockAddressSDNode>(N) && "Bad BlockAddressSDNode!");
857 assert(!isa<EHLabelSDNode>(N) && "Bad EHLabelSDNode!");
858 assert(!isa<ExternalSymbolSDNode>(N) && "Bad ExternalSymbolSDNode!");
859 assert(!isa<CondCodeSDNode>(N) && "Bad CondCodeSDNode!");
860 assert(!isa<CvtRndSatSDNode>(N) && "Bad CvtRndSatSDNode!");
861 assert(!isa<VTSDNode>(N) && "Bad VTSDNode!");
862 assert(!isa<MachineSDNode>(N) && "Bad MachineSDNode!");
867 /// VerifyMachineNode - Sanity check the given MachineNode. Aborts if it is
869 static void VerifyMachineNode(SDNode *N) {
870 // The MachineNode allocators cannot be used to allocate nodes with fields
871 // that are not present in a MachineNode!
872 // Currently there are no such nodes.
878 /// getEVTAlignment - Compute the default alignment value for the
881 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
882 Type *Ty = VT == MVT::iPTR ?
883 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
884 VT.getTypeForEVT(*getContext());
886 return TLI.getDataLayout()->getABITypeAlignment(Ty);
889 // EntryNode could meaningfully have debug info if we can find it...
890 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
891 : TM(tm), TLI(*tm.getTargetLowering()), TSI(*tm.getSelectionDAGInfo()),
892 OptLevel(OL), EntryNode(ISD::EntryToken, DebugLoc(), getVTList(MVT::Other)),
893 Root(getEntryNode()), Ordering(0), UpdateListeners(0) {
894 AllNodes.push_back(&EntryNode);
895 Ordering = new SDNodeOrdering();
896 DbgInfo = new SDDbgInfo();
899 void SelectionDAG::init(MachineFunction &mf) {
901 Context = &mf.getFunction()->getContext();
904 SelectionDAG::~SelectionDAG() {
905 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
911 void SelectionDAG::allnodes_clear() {
912 assert(&*AllNodes.begin() == &EntryNode);
913 AllNodes.remove(AllNodes.begin());
914 while (!AllNodes.empty())
915 DeallocateNode(AllNodes.begin());
918 void SelectionDAG::clear() {
920 OperandAllocator.Reset();
923 ExtendedValueTypeNodes.clear();
924 ExternalSymbols.clear();
925 TargetExternalSymbols.clear();
926 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
927 static_cast<CondCodeSDNode*>(0));
928 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
929 static_cast<SDNode*>(0));
931 EntryNode.UseList = 0;
932 AllNodes.push_back(&EntryNode);
933 Root = getEntryNode();
938 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
939 return VT.bitsGT(Op.getValueType()) ?
940 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
941 getNode(ISD::TRUNCATE, DL, VT, Op);
944 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
945 return VT.bitsGT(Op.getValueType()) ?
946 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
947 getNode(ISD::TRUNCATE, DL, VT, Op);
950 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, DebugLoc DL, EVT VT) {
951 return VT.bitsGT(Op.getValueType()) ?
952 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
953 getNode(ISD::TRUNCATE, DL, VT, Op);
956 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, DebugLoc DL, EVT VT) {
957 assert(!VT.isVector() &&
958 "getZeroExtendInReg should use the vector element type instead of "
960 if (Op.getValueType() == VT) return Op;
961 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
962 APInt Imm = APInt::getLowBitsSet(BitWidth,
964 return getNode(ISD::AND, DL, Op.getValueType(), Op,
965 getConstant(Imm, Op.getValueType()));
968 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
970 SDValue SelectionDAG::getNOT(DebugLoc DL, SDValue Val, EVT VT) {
971 EVT EltVT = VT.getScalarType();
973 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), VT);
974 return getNode(ISD::XOR, DL, VT, Val, NegOne);
977 SDValue SelectionDAG::getConstant(uint64_t Val, EVT VT, bool isT) {
978 EVT EltVT = VT.getScalarType();
979 assert((EltVT.getSizeInBits() >= 64 ||
980 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
981 "getConstant with a uint64_t value that doesn't fit in the type!");
982 return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
985 SDValue SelectionDAG::getConstant(const APInt &Val, EVT VT, bool isT) {
986 return getConstant(*ConstantInt::get(*Context, Val), VT, isT);
989 SDValue SelectionDAG::getConstant(const ConstantInt &Val, EVT VT, bool isT) {
990 assert(VT.isInteger() && "Cannot create FP integer constant!");
992 EVT EltVT = VT.getScalarType();
993 const ConstantInt *Elt = &Val;
995 // In some cases the vector type is legal but the element type is illegal and
996 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
997 // inserted value (the type does not need to match the vector element type).
998 // Any extra bits introduced will be truncated away.
999 if (VT.isVector() && TLI.getTypeAction(*getContext(), EltVT) ==
1000 TargetLowering::TypePromoteInteger) {
1001 EltVT = TLI.getTypeToTransformTo(*getContext(), EltVT);
1002 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1003 Elt = ConstantInt::get(*getContext(), NewVal);
1006 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1007 "APInt size does not match type size!");
1008 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1009 FoldingSetNodeID ID;
1010 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1014 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1016 return SDValue(N, 0);
1019 N = new (NodeAllocator) ConstantSDNode(isT, Elt, EltVT);
1020 CSEMap.InsertNode(N, IP);
1021 AllNodes.push_back(N);
1024 SDValue Result(N, 0);
1025 if (VT.isVector()) {
1026 SmallVector<SDValue, 8> Ops;
1027 Ops.assign(VT.getVectorNumElements(), Result);
1028 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1033 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, bool isTarget) {
1034 return getConstant(Val, TLI.getPointerTy(), isTarget);
1038 SDValue SelectionDAG::getConstantFP(const APFloat& V, EVT VT, bool isTarget) {
1039 return getConstantFP(*ConstantFP::get(*getContext(), V), VT, isTarget);
1042 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, EVT VT, bool isTarget){
1043 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1045 EVT EltVT = VT.getScalarType();
1047 // Do the map lookup using the actual bit pattern for the floating point
1048 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1049 // we don't have issues with SNANs.
1050 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1051 FoldingSetNodeID ID;
1052 AddNodeIDNode(ID, Opc, getVTList(EltVT), 0, 0);
1056 if ((N = CSEMap.FindNodeOrInsertPos(ID, IP)))
1058 return SDValue(N, 0);
1061 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, EltVT);
1062 CSEMap.InsertNode(N, IP);
1063 AllNodes.push_back(N);
1066 SDValue Result(N, 0);
1067 if (VT.isVector()) {
1068 SmallVector<SDValue, 8> Ops;
1069 Ops.assign(VT.getVectorNumElements(), Result);
1070 // FIXME DebugLoc info might be appropriate here
1071 Result = getNode(ISD::BUILD_VECTOR, DebugLoc(), VT, &Ops[0], Ops.size());
1076 SDValue SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget) {
1077 EVT EltVT = VT.getScalarType();
1078 if (EltVT==MVT::f32)
1079 return getConstantFP(APFloat((float)Val), VT, isTarget);
1080 else if (EltVT==MVT::f64)
1081 return getConstantFP(APFloat(Val), VT, isTarget);
1082 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::f16) {
1084 APFloat apf = APFloat(Val);
1085 apf.convert(*EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1087 return getConstantFP(apf, VT, isTarget);
1089 llvm_unreachable("Unsupported type in getConstantFP");
1092 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, DebugLoc DL,
1093 EVT VT, int64_t Offset,
1095 unsigned char TargetFlags) {
1096 assert((TargetFlags == 0 || isTargetGA) &&
1097 "Cannot set target flags on target-independent globals");
1099 // Truncate (with sign-extension) the offset value to the pointer size.
1100 unsigned BitWidth = TLI.getPointerTy().getSizeInBits();
1102 Offset = SignExtend64(Offset, BitWidth);
1104 const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV);
1106 // If GV is an alias then use the aliasee for determining thread-localness.
1107 if (const GlobalAlias *GA = dyn_cast<GlobalAlias>(GV))
1108 GVar = dyn_cast_or_null<GlobalVariable>(GA->resolveAliasedGlobal(false));
1112 if (GVar && GVar->isThreadLocal())
1113 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1115 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1117 FoldingSetNodeID ID;
1118 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1120 ID.AddInteger(Offset);
1121 ID.AddInteger(TargetFlags);
1122 ID.AddInteger(GV->getType()->getAddressSpace());
1124 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1125 return SDValue(E, 0);
1127 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL, GV, VT,
1128 Offset, TargetFlags);
1129 CSEMap.InsertNode(N, IP);
1130 AllNodes.push_back(N);
1131 return SDValue(N, 0);
1134 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1135 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1136 FoldingSetNodeID ID;
1137 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1140 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1141 return SDValue(E, 0);
1143 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1144 CSEMap.InsertNode(N, IP);
1145 AllNodes.push_back(N);
1146 return SDValue(N, 0);
1149 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1150 unsigned char TargetFlags) {
1151 assert((TargetFlags == 0 || isTarget) &&
1152 "Cannot set target flags on target-independent jump tables");
1153 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1154 FoldingSetNodeID ID;
1155 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1157 ID.AddInteger(TargetFlags);
1159 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1160 return SDValue(E, 0);
1162 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1164 CSEMap.InsertNode(N, IP);
1165 AllNodes.push_back(N);
1166 return SDValue(N, 0);
1169 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1170 unsigned Alignment, int Offset,
1172 unsigned char TargetFlags) {
1173 assert((TargetFlags == 0 || isTarget) &&
1174 "Cannot set target flags on target-independent globals");
1176 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1177 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1178 FoldingSetNodeID ID;
1179 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1180 ID.AddInteger(Alignment);
1181 ID.AddInteger(Offset);
1183 ID.AddInteger(TargetFlags);
1185 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1186 return SDValue(E, 0);
1188 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1189 Alignment, TargetFlags);
1190 CSEMap.InsertNode(N, IP);
1191 AllNodes.push_back(N);
1192 return SDValue(N, 0);
1196 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1197 unsigned Alignment, int Offset,
1199 unsigned char TargetFlags) {
1200 assert((TargetFlags == 0 || isTarget) &&
1201 "Cannot set target flags on target-independent globals");
1203 Alignment = TLI.getDataLayout()->getPrefTypeAlignment(C->getType());
1204 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1205 FoldingSetNodeID ID;
1206 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1207 ID.AddInteger(Alignment);
1208 ID.AddInteger(Offset);
1209 C->addSelectionDAGCSEId(ID);
1210 ID.AddInteger(TargetFlags);
1212 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1213 return SDValue(E, 0);
1215 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1216 Alignment, TargetFlags);
1217 CSEMap.InsertNode(N, IP);
1218 AllNodes.push_back(N);
1219 return SDValue(N, 0);
1222 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1223 unsigned char TargetFlags) {
1224 FoldingSetNodeID ID;
1225 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), 0, 0);
1226 ID.AddInteger(Index);
1227 ID.AddInteger(Offset);
1228 ID.AddInteger(TargetFlags);
1230 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1231 return SDValue(E, 0);
1233 SDNode *N = new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset,
1235 CSEMap.InsertNode(N, IP);
1236 AllNodes.push_back(N);
1237 return SDValue(N, 0);
1240 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1241 FoldingSetNodeID ID;
1242 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), 0, 0);
1245 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1246 return SDValue(E, 0);
1248 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1249 CSEMap.InsertNode(N, IP);
1250 AllNodes.push_back(N);
1251 return SDValue(N, 0);
1254 SDValue SelectionDAG::getValueType(EVT VT) {
1255 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1256 ValueTypeNodes.size())
1257 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1259 SDNode *&N = VT.isExtended() ?
1260 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1262 if (N) return SDValue(N, 0);
1263 N = new (NodeAllocator) VTSDNode(VT);
1264 AllNodes.push_back(N);
1265 return SDValue(N, 0);
1268 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1269 SDNode *&N = ExternalSymbols[Sym];
1270 if (N) return SDValue(N, 0);
1271 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1272 AllNodes.push_back(N);
1273 return SDValue(N, 0);
1276 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1277 unsigned char TargetFlags) {
1279 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1281 if (N) return SDValue(N, 0);
1282 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1283 AllNodes.push_back(N);
1284 return SDValue(N, 0);
1287 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1288 if ((unsigned)Cond >= CondCodeNodes.size())
1289 CondCodeNodes.resize(Cond+1);
1291 if (CondCodeNodes[Cond] == 0) {
1292 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1293 CondCodeNodes[Cond] = N;
1294 AllNodes.push_back(N);
1297 return SDValue(CondCodeNodes[Cond], 0);
1300 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1301 // the shuffle mask M that point at N1 to point at N2, and indices that point
1302 // N2 to point at N1.
1303 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1305 int NElts = M.size();
1306 for (int i = 0; i != NElts; ++i) {
1314 SDValue SelectionDAG::getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1,
1315 SDValue N2, const int *Mask) {
1316 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE");
1317 assert(VT.isVector() && N1.getValueType().isVector() &&
1318 "Vector Shuffle VTs must be a vectors");
1319 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType()
1320 && "Vector Shuffle VTs must have same element type");
1322 // Canonicalize shuffle undef, undef -> undef
1323 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1324 return getUNDEF(VT);
1326 // Validate that all indices in Mask are within the range of the elements
1327 // input to the shuffle.
1328 unsigned NElts = VT.getVectorNumElements();
1329 SmallVector<int, 8> MaskVec;
1330 for (unsigned i = 0; i != NElts; ++i) {
1331 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1332 MaskVec.push_back(Mask[i]);
1335 // Canonicalize shuffle v, v -> v, undef
1338 for (unsigned i = 0; i != NElts; ++i)
1339 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1342 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1343 if (N1.getOpcode() == ISD::UNDEF)
1344 commuteShuffle(N1, N2, MaskVec);
1346 // Canonicalize all index into lhs, -> shuffle lhs, undef
1347 // Canonicalize all index into rhs, -> shuffle rhs, undef
1348 bool AllLHS = true, AllRHS = true;
1349 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1350 for (unsigned i = 0; i != NElts; ++i) {
1351 if (MaskVec[i] >= (int)NElts) {
1356 } else if (MaskVec[i] >= 0) {
1360 if (AllLHS && AllRHS)
1361 return getUNDEF(VT);
1362 if (AllLHS && !N2Undef)
1366 commuteShuffle(N1, N2, MaskVec);
1369 // If Identity shuffle, or all shuffle in to undef, return that node.
1370 bool AllUndef = true;
1371 bool Identity = true;
1372 for (unsigned i = 0; i != NElts; ++i) {
1373 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1374 if (MaskVec[i] >= 0) AllUndef = false;
1376 if (Identity && NElts == N1.getValueType().getVectorNumElements())
1379 return getUNDEF(VT);
1381 FoldingSetNodeID ID;
1382 SDValue Ops[2] = { N1, N2 };
1383 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops, 2);
1384 for (unsigned i = 0; i != NElts; ++i)
1385 ID.AddInteger(MaskVec[i]);
1388 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1389 return SDValue(E, 0);
1391 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1392 // SDNode doesn't have access to it. This memory will be "leaked" when
1393 // the node is deallocated, but recovered when the NodeAllocator is released.
1394 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1395 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1397 ShuffleVectorSDNode *N =
1398 new (NodeAllocator) ShuffleVectorSDNode(VT, dl, N1, N2, MaskAlloc);
1399 CSEMap.InsertNode(N, IP);
1400 AllNodes.push_back(N);
1401 return SDValue(N, 0);
1404 SDValue SelectionDAG::getConvertRndSat(EVT VT, DebugLoc dl,
1405 SDValue Val, SDValue DTy,
1406 SDValue STy, SDValue Rnd, SDValue Sat,
1407 ISD::CvtCode Code) {
1408 // If the src and dest types are the same and the conversion is between
1409 // integer types of the same sign or two floats, no conversion is necessary.
1411 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1414 FoldingSetNodeID ID;
1415 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1416 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), &Ops[0], 5);
1418 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1419 return SDValue(E, 0);
1421 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl, Ops, 5,
1423 CSEMap.InsertNode(N, IP);
1424 AllNodes.push_back(N);
1425 return SDValue(N, 0);
1428 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1429 FoldingSetNodeID ID;
1430 AddNodeIDNode(ID, ISD::Register, getVTList(VT), 0, 0);
1431 ID.AddInteger(RegNo);
1433 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1434 return SDValue(E, 0);
1436 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1437 CSEMap.InsertNode(N, IP);
1438 AllNodes.push_back(N);
1439 return SDValue(N, 0);
1442 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1443 FoldingSetNodeID ID;
1444 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), 0, 0);
1445 ID.AddPointer(RegMask);
1447 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1448 return SDValue(E, 0);
1450 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1451 CSEMap.InsertNode(N, IP);
1452 AllNodes.push_back(N);
1453 return SDValue(N, 0);
1456 SDValue SelectionDAG::getEHLabel(DebugLoc dl, SDValue Root, MCSymbol *Label) {
1457 FoldingSetNodeID ID;
1458 SDValue Ops[] = { Root };
1459 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), &Ops[0], 1);
1460 ID.AddPointer(Label);
1462 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1463 return SDValue(E, 0);
1465 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl, Root, Label);
1466 CSEMap.InsertNode(N, IP);
1467 AllNodes.push_back(N);
1468 return SDValue(N, 0);
1472 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1475 unsigned char TargetFlags) {
1476 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1478 FoldingSetNodeID ID;
1479 AddNodeIDNode(ID, Opc, getVTList(VT), 0, 0);
1481 ID.AddInteger(Offset);
1482 ID.AddInteger(TargetFlags);
1484 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1485 return SDValue(E, 0);
1487 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1489 CSEMap.InsertNode(N, IP);
1490 AllNodes.push_back(N);
1491 return SDValue(N, 0);
1494 SDValue SelectionDAG::getSrcValue(const Value *V) {
1495 assert((!V || V->getType()->isPointerTy()) &&
1496 "SrcValue is not a pointer?");
1498 FoldingSetNodeID ID;
1499 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), 0, 0);
1503 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1504 return SDValue(E, 0);
1506 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1507 CSEMap.InsertNode(N, IP);
1508 AllNodes.push_back(N);
1509 return SDValue(N, 0);
1512 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1513 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1514 FoldingSetNodeID ID;
1515 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), 0, 0);
1519 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
1520 return SDValue(E, 0);
1522 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1523 CSEMap.InsertNode(N, IP);
1524 AllNodes.push_back(N);
1525 return SDValue(N, 0);
1529 /// getShiftAmountOperand - Return the specified value casted to
1530 /// the target's desired shift amount type.
1531 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1532 EVT OpTy = Op.getValueType();
1533 MVT ShTy = TLI.getShiftAmountTy(LHSTy);
1534 if (OpTy == ShTy || OpTy.isVector()) return Op;
1536 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND;
1537 return getNode(Opcode, Op.getDebugLoc(), ShTy, Op);
1540 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1541 /// specified value type.
1542 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1543 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1544 unsigned ByteSize = VT.getStoreSize();
1545 Type *Ty = VT.getTypeForEVT(*getContext());
1546 unsigned StackAlign =
1547 std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty), minAlign);
1549 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1550 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1553 /// CreateStackTemporary - Create a stack temporary suitable for holding
1554 /// either of the specified value types.
1555 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1556 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1557 VT2.getStoreSizeInBits())/8;
1558 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1559 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1560 const DataLayout *TD = TLI.getDataLayout();
1561 unsigned Align = std::max(TD->getPrefTypeAlignment(Ty1),
1562 TD->getPrefTypeAlignment(Ty2));
1564 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1565 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1566 return getFrameIndex(FrameIdx, TLI.getPointerTy());
1569 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1570 SDValue N2, ISD::CondCode Cond, DebugLoc dl) {
1571 // These setcc operations always fold.
1575 case ISD::SETFALSE2: return getConstant(0, VT);
1577 case ISD::SETTRUE2: return getConstant(1, VT);
1589 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1593 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode())) {
1594 const APInt &C2 = N2C->getAPIntValue();
1595 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) {
1596 const APInt &C1 = N1C->getAPIntValue();
1599 default: llvm_unreachable("Unknown integer setcc!");
1600 case ISD::SETEQ: return getConstant(C1 == C2, VT);
1601 case ISD::SETNE: return getConstant(C1 != C2, VT);
1602 case ISD::SETULT: return getConstant(C1.ult(C2), VT);
1603 case ISD::SETUGT: return getConstant(C1.ugt(C2), VT);
1604 case ISD::SETULE: return getConstant(C1.ule(C2), VT);
1605 case ISD::SETUGE: return getConstant(C1.uge(C2), VT);
1606 case ISD::SETLT: return getConstant(C1.slt(C2), VT);
1607 case ISD::SETGT: return getConstant(C1.sgt(C2), VT);
1608 case ISD::SETLE: return getConstant(C1.sle(C2), VT);
1609 case ISD::SETGE: return getConstant(C1.sge(C2), VT);
1613 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.getNode())) {
1614 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2.getNode())) {
1615 // No compile time operations on this type yet.
1616 if (N1C->getValueType(0) == MVT::ppcf128)
1619 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1622 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1623 return getUNDEF(VT);
1625 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, VT);
1626 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1627 return getUNDEF(VT);
1629 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1630 R==APFloat::cmpLessThan, VT);
1631 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1632 return getUNDEF(VT);
1634 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, VT);
1635 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1636 return getUNDEF(VT);
1638 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, VT);
1639 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1640 return getUNDEF(VT);
1642 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1643 R==APFloat::cmpEqual, VT);
1644 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1645 return getUNDEF(VT);
1647 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1648 R==APFloat::cmpEqual, VT);
1649 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, VT);
1650 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, VT);
1651 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
1652 R==APFloat::cmpEqual, VT);
1653 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, VT);
1654 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
1655 R==APFloat::cmpLessThan, VT);
1656 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
1657 R==APFloat::cmpUnordered, VT);
1658 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, VT);
1659 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, VT);
1662 // Ensure that the constant occurs on the RHS.
1663 return getSetCC(dl, VT, N2, N1, ISD::getSetCCSwappedOperands(Cond));
1667 // Could not fold it.
1671 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
1672 /// use this predicate to simplify operations downstream.
1673 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
1674 // This predicate is not safe for vector operations.
1675 if (Op.getValueType().isVector())
1678 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1679 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
1682 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
1683 /// this predicate to simplify operations downstream. Mask is known to be zero
1684 /// for bits that V cannot have.
1685 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
1686 unsigned Depth) const {
1687 APInt KnownZero, KnownOne;
1688 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
1689 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1690 return (KnownZero & Mask) == Mask;
1693 /// ComputeMaskedBits - Determine which of the bits specified in Mask are
1694 /// known to be either zero or one and return them in the KnownZero/KnownOne
1695 /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
1697 void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
1698 APInt &KnownOne, unsigned Depth) const {
1699 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1701 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
1703 return; // Limit search depth.
1705 APInt KnownZero2, KnownOne2;
1707 switch (Op.getOpcode()) {
1709 // We know all of the bits for a constant!
1710 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
1711 KnownZero = ~KnownOne;
1714 // If either the LHS or the RHS are Zero, the result is zero.
1715 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1716 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1717 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1718 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1720 // Output known-1 bits are only known if set in both the LHS & RHS.
1721 KnownOne &= KnownOne2;
1722 // Output known-0 are known to be clear if zero in either the LHS | RHS.
1723 KnownZero |= KnownZero2;
1726 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1727 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1728 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1729 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1731 // Output known-0 bits are only known if clear in both the LHS & RHS.
1732 KnownZero &= KnownZero2;
1733 // Output known-1 are known to be set if set in either the LHS | RHS.
1734 KnownOne |= KnownOne2;
1737 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1738 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1739 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1740 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1742 // Output known-0 bits are known if clear or set in both the LHS & RHS.
1743 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
1744 // Output known-1 are known to be set if set in only one of the LHS, RHS.
1745 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
1746 KnownZero = KnownZeroOut;
1750 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
1751 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1752 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1753 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1755 // If low bits are zero in either operand, output low known-0 bits.
1756 // Also compute a conserative estimate for high known-0 bits.
1757 // More trickiness is possible, but this is sufficient for the
1758 // interesting case of alignment computation.
1759 KnownOne.clearAllBits();
1760 unsigned TrailZ = KnownZero.countTrailingOnes() +
1761 KnownZero2.countTrailingOnes();
1762 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
1763 KnownZero2.countLeadingOnes(),
1764 BitWidth) - BitWidth;
1766 TrailZ = std::min(TrailZ, BitWidth);
1767 LeadZ = std::min(LeadZ, BitWidth);
1768 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
1769 APInt::getHighBitsSet(BitWidth, LeadZ);
1773 // For the purposes of computing leading zeros we can conservatively
1774 // treat a udiv as a logical right shift by the power of 2 known to
1775 // be less than the denominator.
1776 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
1777 unsigned LeadZ = KnownZero2.countLeadingOnes();
1779 KnownOne2.clearAllBits();
1780 KnownZero2.clearAllBits();
1781 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1782 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
1783 if (RHSUnknownLeadingOnes != BitWidth)
1784 LeadZ = std::min(BitWidth,
1785 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
1787 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
1791 ComputeMaskedBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
1792 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
1793 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1794 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1796 // Only known if known in both the LHS and RHS.
1797 KnownOne &= KnownOne2;
1798 KnownZero &= KnownZero2;
1800 case ISD::SELECT_CC:
1801 ComputeMaskedBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
1802 ComputeMaskedBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
1803 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1804 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
1806 // Only known if known in both the LHS and RHS.
1807 KnownOne &= KnownOne2;
1808 KnownZero &= KnownZero2;
1816 if (Op.getResNo() != 1)
1818 // The boolean result conforms to getBooleanContents. Fall through.
1820 // If we know the result of a setcc has the top bits zero, use this info.
1821 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
1822 TargetLowering::ZeroOrOneBooleanContent && BitWidth > 1)
1823 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
1826 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
1827 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1828 unsigned ShAmt = SA->getZExtValue();
1830 // If the shift count is an invalid immediate, don't do anything.
1831 if (ShAmt >= BitWidth)
1834 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1835 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1836 KnownZero <<= ShAmt;
1838 // low bits known zero.
1839 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
1843 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
1844 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1845 unsigned ShAmt = SA->getZExtValue();
1847 // If the shift count is an invalid immediate, don't do anything.
1848 if (ShAmt >= BitWidth)
1851 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1852 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1853 KnownZero = KnownZero.lshr(ShAmt);
1854 KnownOne = KnownOne.lshr(ShAmt);
1856 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1857 KnownZero |= HighBits; // High bits known zero.
1861 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
1862 unsigned ShAmt = SA->getZExtValue();
1864 // If the shift count is an invalid immediate, don't do anything.
1865 if (ShAmt >= BitWidth)
1868 // If any of the demanded bits are produced by the sign extension, we also
1869 // demand the input sign bit.
1870 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
1872 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1873 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1874 KnownZero = KnownZero.lshr(ShAmt);
1875 KnownOne = KnownOne.lshr(ShAmt);
1877 // Handle the sign bits.
1878 APInt SignBit = APInt::getSignBit(BitWidth);
1879 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
1881 if (KnownZero.intersects(SignBit)) {
1882 KnownZero |= HighBits; // New bits are known zero.
1883 } else if (KnownOne.intersects(SignBit)) {
1884 KnownOne |= HighBits; // New bits are known one.
1888 case ISD::SIGN_EXTEND_INREG: {
1889 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
1890 unsigned EBits = EVT.getScalarType().getSizeInBits();
1892 // Sign extension. Compute the demanded bits in the result that are not
1893 // present in the input.
1894 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
1896 APInt InSignBit = APInt::getSignBit(EBits);
1897 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
1899 // If the sign extended bits are demanded, we know that the sign
1901 InSignBit = InSignBit.zext(BitWidth);
1902 if (NewBits.getBoolValue())
1903 InputDemandedBits |= InSignBit;
1905 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1906 KnownOne &= InputDemandedBits;
1907 KnownZero &= InputDemandedBits;
1908 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
1910 // If the sign bit of the input is known set or clear, then we know the
1911 // top bits of the result.
1912 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
1913 KnownZero |= NewBits;
1914 KnownOne &= ~NewBits;
1915 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
1916 KnownOne |= NewBits;
1917 KnownZero &= ~NewBits;
1918 } else { // Input sign bit unknown
1919 KnownZero &= ~NewBits;
1920 KnownOne &= ~NewBits;
1925 case ISD::CTTZ_ZERO_UNDEF:
1927 case ISD::CTLZ_ZERO_UNDEF:
1929 unsigned LowBits = Log2_32(BitWidth)+1;
1930 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
1931 KnownOne.clearAllBits();
1935 LoadSDNode *LD = cast<LoadSDNode>(Op);
1936 if (ISD::isZEXTLoad(Op.getNode())) {
1937 EVT VT = LD->getMemoryVT();
1938 unsigned MemBits = VT.getScalarType().getSizeInBits();
1939 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
1940 } else if (const MDNode *Ranges = LD->getRanges()) {
1941 computeMaskedBitsLoad(*Ranges, KnownZero);
1945 case ISD::ZERO_EXTEND: {
1946 EVT InVT = Op.getOperand(0).getValueType();
1947 unsigned InBits = InVT.getScalarType().getSizeInBits();
1948 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1949 KnownZero = KnownZero.trunc(InBits);
1950 KnownOne = KnownOne.trunc(InBits);
1951 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1952 KnownZero = KnownZero.zext(BitWidth);
1953 KnownOne = KnownOne.zext(BitWidth);
1954 KnownZero |= NewBits;
1957 case ISD::SIGN_EXTEND: {
1958 EVT InVT = Op.getOperand(0).getValueType();
1959 unsigned InBits = InVT.getScalarType().getSizeInBits();
1960 APInt InSignBit = APInt::getSignBit(InBits);
1961 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
1963 KnownZero = KnownZero.trunc(InBits);
1964 KnownOne = KnownOne.trunc(InBits);
1965 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1967 // Note if the sign bit is known to be zero or one.
1968 bool SignBitKnownZero = KnownZero.isNegative();
1969 bool SignBitKnownOne = KnownOne.isNegative();
1970 assert(!(SignBitKnownZero && SignBitKnownOne) &&
1971 "Sign bit can't be known to be both zero and one!");
1973 KnownZero = KnownZero.zext(BitWidth);
1974 KnownOne = KnownOne.zext(BitWidth);
1976 // If the sign bit is known zero or one, the top bits match.
1977 if (SignBitKnownZero)
1978 KnownZero |= NewBits;
1979 else if (SignBitKnownOne)
1980 KnownOne |= NewBits;
1983 case ISD::ANY_EXTEND: {
1984 EVT InVT = Op.getOperand(0).getValueType();
1985 unsigned InBits = InVT.getScalarType().getSizeInBits();
1986 KnownZero = KnownZero.trunc(InBits);
1987 KnownOne = KnownOne.trunc(InBits);
1988 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1989 KnownZero = KnownZero.zext(BitWidth);
1990 KnownOne = KnownOne.zext(BitWidth);
1993 case ISD::TRUNCATE: {
1994 EVT InVT = Op.getOperand(0).getValueType();
1995 unsigned InBits = InVT.getScalarType().getSizeInBits();
1996 KnownZero = KnownZero.zext(InBits);
1997 KnownOne = KnownOne.zext(InBits);
1998 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
1999 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2000 KnownZero = KnownZero.trunc(BitWidth);
2001 KnownOne = KnownOne.trunc(BitWidth);
2004 case ISD::AssertZext: {
2005 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2006 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2007 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2008 KnownZero |= (~InMask);
2009 KnownOne &= (~KnownZero);
2013 // All bits are zero except the low bit.
2014 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2018 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2019 // We know that the top bits of C-X are clear if X contains less bits
2020 // than C (i.e. no wrap-around can happen). For example, 20-X is
2021 // positive if we can prove that X is >= 0 and < 16.
2022 if (CLHS->getAPIntValue().isNonNegative()) {
2023 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2024 // NLZ can't be BitWidth with no sign bit
2025 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2026 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2028 // If all of the MaskV bits are known to be zero, then we know the
2029 // output top bits are zero, because we now know that the output is
2031 if ((KnownZero2 & MaskV) == MaskV) {
2032 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2033 // Top bits known zero.
2034 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2042 // Output known-0 bits are known if clear or set in both the low clear bits
2043 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2044 // low 3 bits clear.
2045 ComputeMaskedBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2046 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2047 unsigned KnownZeroOut = KnownZero2.countTrailingOnes();
2049 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2050 assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?");
2051 KnownZeroOut = std::min(KnownZeroOut,
2052 KnownZero2.countTrailingOnes());
2054 if (Op.getOpcode() == ISD::ADD) {
2055 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroOut);
2059 // With ADDE, a carry bit may be added in, so we can only use this
2060 // information if we know (at least) that the low two bits are clear. We
2061 // then return to the caller that the low bit is unknown but that other bits
2063 if (KnownZeroOut >= 2) // ADDE
2064 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroOut);
2068 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2069 const APInt &RA = Rem->getAPIntValue().abs();
2070 if (RA.isPowerOf2()) {
2071 APInt LowBits = RA - 1;
2072 APInt Mask2 = LowBits | APInt::getSignBit(BitWidth);
2073 ComputeMaskedBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2075 // The low bits of the first operand are unchanged by the srem.
2076 KnownZero = KnownZero2 & LowBits;
2077 KnownOne = KnownOne2 & LowBits;
2079 // If the first operand is non-negative or has all low bits zero, then
2080 // the upper bits are all zero.
2081 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2082 KnownZero |= ~LowBits;
2084 // If the first operand is negative and not all low bits are zero, then
2085 // the upper bits are all one.
2086 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2087 KnownOne |= ~LowBits;
2088 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2093 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2094 const APInt &RA = Rem->getAPIntValue();
2095 if (RA.isPowerOf2()) {
2096 APInt LowBits = (RA - 1);
2097 KnownZero |= ~LowBits;
2098 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne,Depth+1);
2099 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2104 // Since the result is less than or equal to either operand, any leading
2105 // zero bits in either operand must also exist in the result.
2106 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2107 ComputeMaskedBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2109 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2110 KnownZero2.countLeadingOnes());
2111 KnownOne.clearAllBits();
2112 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2115 case ISD::FrameIndex:
2116 case ISD::TargetFrameIndex:
2117 if (unsigned Align = InferPtrAlignment(Op)) {
2118 // The low bits are known zero if the pointer is aligned.
2119 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2125 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2128 case ISD::INTRINSIC_WO_CHAIN:
2129 case ISD::INTRINSIC_W_CHAIN:
2130 case ISD::INTRINSIC_VOID:
2131 // Allow the target to implement this method for its nodes.
2132 TLI.computeMaskedBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2137 /// ComputeNumSignBits - Return the number of times the sign bit of the
2138 /// register is replicated into the other bits. We know that at least 1 bit
2139 /// is always equal to the sign bit (itself), but other cases can give us
2140 /// information. For example, immediately after an "SRA X, 2", we know that
2141 /// the top 3 bits are all equal to each other, so we return 3.
2142 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2143 EVT VT = Op.getValueType();
2144 assert(VT.isInteger() && "Invalid VT!");
2145 unsigned VTBits = VT.getScalarType().getSizeInBits();
2147 unsigned FirstAnswer = 1;
2150 return 1; // Limit search depth.
2152 switch (Op.getOpcode()) {
2154 case ISD::AssertSext:
2155 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2156 return VTBits-Tmp+1;
2157 case ISD::AssertZext:
2158 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2161 case ISD::Constant: {
2162 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2163 return Val.getNumSignBits();
2166 case ISD::SIGN_EXTEND:
2167 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2168 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2170 case ISD::SIGN_EXTEND_INREG:
2171 // Max of the input and what this extends.
2173 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2176 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2177 return std::max(Tmp, Tmp2);
2180 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2181 // SRA X, C -> adds C sign bits.
2182 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2183 Tmp += C->getZExtValue();
2184 if (Tmp > VTBits) Tmp = VTBits;
2188 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2189 // shl destroys sign bits.
2190 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2191 if (C->getZExtValue() >= VTBits || // Bad shift.
2192 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2193 return Tmp - C->getZExtValue();
2198 case ISD::XOR: // NOT is handled here.
2199 // Logical binary ops preserve the number of sign bits at the worst.
2200 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2202 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2203 FirstAnswer = std::min(Tmp, Tmp2);
2204 // We computed what we know about the sign bits as our first
2205 // answer. Now proceed to the generic code that uses
2206 // ComputeMaskedBits, and pick whichever answer is better.
2211 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2212 if (Tmp == 1) return 1; // Early out.
2213 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2214 return std::min(Tmp, Tmp2);
2222 if (Op.getResNo() != 1)
2224 // The boolean result conforms to getBooleanContents. Fall through.
2226 // If setcc returns 0/-1, all bits are sign bits.
2227 if (TLI.getBooleanContents(Op.getValueType().isVector()) ==
2228 TargetLowering::ZeroOrNegativeOneBooleanContent)
2233 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2234 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2236 // Handle rotate right by N like a rotate left by 32-N.
2237 if (Op.getOpcode() == ISD::ROTR)
2238 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2240 // If we aren't rotating out all of the known-in sign bits, return the
2241 // number that are left. This handles rotl(sext(x), 1) for example.
2242 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2243 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2247 // Add can have at most one carry bit. Thus we know that the output
2248 // is, at worst, one more bit than the inputs.
2249 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2250 if (Tmp == 1) return 1; // Early out.
2252 // Special case decrementing a value (ADD X, -1):
2253 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2254 if (CRHS->isAllOnesValue()) {
2255 APInt KnownZero, KnownOne;
2256 ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2258 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2260 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2263 // If we are subtracting one from a positive number, there is no carry
2264 // out of the result.
2265 if (KnownZero.isNegative())
2269 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2270 if (Tmp2 == 1) return 1;
2271 return std::min(Tmp, Tmp2)-1;
2274 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2275 if (Tmp2 == 1) return 1;
2278 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2279 if (CLHS->isNullValue()) {
2280 APInt KnownZero, KnownOne;
2281 ComputeMaskedBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2282 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2284 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2287 // If the input is known to be positive (the sign bit is known clear),
2288 // the output of the NEG has the same number of sign bits as the input.
2289 if (KnownZero.isNegative())
2292 // Otherwise, we treat this like a SUB.
2295 // Sub can have at most one carry bit. Thus we know that the output
2296 // is, at worst, one more bit than the inputs.
2297 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2298 if (Tmp == 1) return 1; // Early out.
2299 return std::min(Tmp, Tmp2)-1;
2301 // FIXME: it's tricky to do anything useful for this, but it is an important
2302 // case for targets like X86.
2306 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2307 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2308 unsigned ExtType = LD->getExtensionType();
2311 case ISD::SEXTLOAD: // '17' bits known
2312 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2313 return VTBits-Tmp+1;
2314 case ISD::ZEXTLOAD: // '16' bits known
2315 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2320 // Allow the target to implement this method for its nodes.
2321 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2322 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2323 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2324 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2325 unsigned NumBits = TLI.ComputeNumSignBitsForTargetNode(Op, Depth);
2326 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2329 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2330 // use this information.
2331 APInt KnownZero, KnownOne;
2332 ComputeMaskedBits(Op, KnownZero, KnownOne, Depth);
2335 if (KnownZero.isNegative()) { // sign bit is 0
2337 } else if (KnownOne.isNegative()) { // sign bit is 1;
2344 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2345 // the number of identical bits in the top of the input value.
2347 Mask <<= Mask.getBitWidth()-VTBits;
2348 // Return # leading zeros. We use 'min' here in case Val was zero before
2349 // shifting. We don't want to return '64' as for an i32 "0".
2350 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2353 /// isBaseWithConstantOffset - Return true if the specified operand is an
2354 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2355 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2356 /// semantics as an ADD. This handles the equivalence:
2357 /// X|Cst == X+Cst iff X&Cst = 0.
2358 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2359 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2360 !isa<ConstantSDNode>(Op.getOperand(1)))
2363 if (Op.getOpcode() == ISD::OR &&
2364 !MaskedValueIsZero(Op.getOperand(0),
2365 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2372 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2373 // If we're told that NaNs won't happen, assume they won't.
2374 if (getTarget().Options.NoNaNsFPMath)
2377 // If the value is a constant, we can obviously see if it is a NaN or not.
2378 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2379 return !C->getValueAPF().isNaN();
2381 // TODO: Recognize more cases here.
2386 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2387 // If the value is a constant, we can obviously see if it is a zero or not.
2388 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2389 return !C->isZero();
2391 // TODO: Recognize more cases here.
2392 switch (Op.getOpcode()) {
2395 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2396 return !C->isNullValue();
2403 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2404 // Check the obvious case.
2405 if (A == B) return true;
2407 // For for negative and positive zero.
2408 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2409 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2410 if (CA->isZero() && CB->isZero()) return true;
2412 // Otherwise they may not be equal.
2416 /// getNode - Gets or creates the specified node.
2418 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT) {
2419 FoldingSetNodeID ID;
2420 AddNodeIDNode(ID, Opcode, getVTList(VT), 0, 0);
2422 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2423 return SDValue(E, 0);
2425 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL, getVTList(VT));
2426 CSEMap.InsertNode(N, IP);
2428 AllNodes.push_back(N);
2432 return SDValue(N, 0);
2435 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
2436 EVT VT, SDValue Operand) {
2437 // Constant fold unary operations with an integer constant operand.
2438 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand.getNode())) {
2439 const APInt &Val = C->getAPIntValue();
2442 case ISD::SIGN_EXTEND:
2443 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), VT);
2444 case ISD::ANY_EXTEND:
2445 case ISD::ZERO_EXTEND:
2447 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), VT);
2448 case ISD::UINT_TO_FP:
2449 case ISD::SINT_TO_FP: {
2450 // No compile time operations on ppcf128.
2451 if (VT == MVT::ppcf128) break;
2452 APFloat apf(APInt::getNullValue(VT.getSizeInBits()));
2453 (void)apf.convertFromAPInt(Val,
2454 Opcode==ISD::SINT_TO_FP,
2455 APFloat::rmNearestTiesToEven);
2456 return getConstantFP(apf, VT);
2459 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2460 return getConstantFP(APFloat(Val), VT);
2461 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2462 return getConstantFP(APFloat(Val), VT);
2465 return getConstant(Val.byteSwap(), VT);
2467 return getConstant(Val.countPopulation(), VT);
2469 case ISD::CTLZ_ZERO_UNDEF:
2470 return getConstant(Val.countLeadingZeros(), VT);
2472 case ISD::CTTZ_ZERO_UNDEF:
2473 return getConstant(Val.countTrailingZeros(), VT);
2477 // Constant fold unary operations with a floating point constant operand.
2478 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand.getNode())) {
2479 APFloat V = C->getValueAPF(); // make copy
2480 if (VT != MVT::ppcf128 && Operand.getValueType() != MVT::ppcf128) {
2484 return getConstantFP(V, VT);
2487 return getConstantFP(V, VT);
2489 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2490 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2491 return getConstantFP(V, VT);
2495 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2496 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2497 return getConstantFP(V, VT);
2501 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2502 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2503 return getConstantFP(V, VT);
2506 case ISD::FP_EXTEND: {
2508 // This can return overflow, underflow, or inexact; we don't care.
2509 // FIXME need to be more flexible about rounding mode.
2510 (void)V.convert(*EVTToAPFloatSemantics(VT),
2511 APFloat::rmNearestTiesToEven, &ignored);
2512 return getConstantFP(V, VT);
2514 case ISD::FP_TO_SINT:
2515 case ISD::FP_TO_UINT: {
2518 assert(integerPartWidth >= 64);
2519 // FIXME need to be more flexible about rounding mode.
2520 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2521 Opcode==ISD::FP_TO_SINT,
2522 APFloat::rmTowardZero, &ignored);
2523 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2525 APInt api(VT.getSizeInBits(), x);
2526 return getConstant(api, VT);
2529 if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2530 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), VT);
2531 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2532 return getConstant(V.bitcastToAPInt().getZExtValue(), VT);
2538 unsigned OpOpcode = Operand.getNode()->getOpcode();
2540 case ISD::TokenFactor:
2541 case ISD::MERGE_VALUES:
2542 case ISD::CONCAT_VECTORS:
2543 return Operand; // Factor, merge or concat of one node? No need.
2544 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
2545 case ISD::FP_EXTEND:
2546 assert(VT.isFloatingPoint() &&
2547 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
2548 if (Operand.getValueType() == VT) return Operand; // noop conversion.
2549 assert((!VT.isVector() ||
2550 VT.getVectorNumElements() ==
2551 Operand.getValueType().getVectorNumElements()) &&
2552 "Vector element count mismatch!");
2553 if (Operand.getOpcode() == ISD::UNDEF)
2554 return getUNDEF(VT);
2556 case ISD::SIGN_EXTEND:
2557 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2558 "Invalid SIGN_EXTEND!");
2559 if (Operand.getValueType() == VT) return Operand; // noop extension
2560 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2561 "Invalid sext node, dst < src!");
2562 assert((!VT.isVector() ||
2563 VT.getVectorNumElements() ==
2564 Operand.getValueType().getVectorNumElements()) &&
2565 "Vector element count mismatch!");
2566 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
2567 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2568 else if (OpOpcode == ISD::UNDEF)
2569 // sext(undef) = 0, because the top bits will all be the same.
2570 return getConstant(0, VT);
2572 case ISD::ZERO_EXTEND:
2573 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2574 "Invalid ZERO_EXTEND!");
2575 if (Operand.getValueType() == VT) return Operand; // noop extension
2576 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2577 "Invalid zext node, dst < src!");
2578 assert((!VT.isVector() ||
2579 VT.getVectorNumElements() ==
2580 Operand.getValueType().getVectorNumElements()) &&
2581 "Vector element count mismatch!");
2582 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
2583 return getNode(ISD::ZERO_EXTEND, DL, VT,
2584 Operand.getNode()->getOperand(0));
2585 else if (OpOpcode == ISD::UNDEF)
2586 // zext(undef) = 0, because the top bits will be zero.
2587 return getConstant(0, VT);
2589 case ISD::ANY_EXTEND:
2590 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2591 "Invalid ANY_EXTEND!");
2592 if (Operand.getValueType() == VT) return Operand; // noop extension
2593 assert(Operand.getValueType().getScalarType().bitsLT(VT.getScalarType()) &&
2594 "Invalid anyext node, dst < src!");
2595 assert((!VT.isVector() ||
2596 VT.getVectorNumElements() ==
2597 Operand.getValueType().getVectorNumElements()) &&
2598 "Vector element count mismatch!");
2600 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2601 OpOpcode == ISD::ANY_EXTEND)
2602 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
2603 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2604 else if (OpOpcode == ISD::UNDEF)
2605 return getUNDEF(VT);
2607 // (ext (trunx x)) -> x
2608 if (OpOpcode == ISD::TRUNCATE) {
2609 SDValue OpOp = Operand.getNode()->getOperand(0);
2610 if (OpOp.getValueType() == VT)
2615 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
2616 "Invalid TRUNCATE!");
2617 if (Operand.getValueType() == VT) return Operand; // noop truncate
2618 assert(Operand.getValueType().getScalarType().bitsGT(VT.getScalarType()) &&
2619 "Invalid truncate node, src < dst!");
2620 assert((!VT.isVector() ||
2621 VT.getVectorNumElements() ==
2622 Operand.getValueType().getVectorNumElements()) &&
2623 "Vector element count mismatch!");
2624 if (OpOpcode == ISD::TRUNCATE)
2625 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2626 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
2627 OpOpcode == ISD::ANY_EXTEND) {
2628 // If the source is smaller than the dest, we still need an extend.
2629 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
2630 .bitsLT(VT.getScalarType()))
2631 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
2632 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
2633 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
2634 return Operand.getNode()->getOperand(0);
2636 if (OpOpcode == ISD::UNDEF)
2637 return getUNDEF(VT);
2640 // Basic sanity checking.
2641 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
2642 && "Cannot BITCAST between types of different sizes!");
2643 if (VT == Operand.getValueType()) return Operand; // noop conversion.
2644 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
2645 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
2646 if (OpOpcode == ISD::UNDEF)
2647 return getUNDEF(VT);
2649 case ISD::SCALAR_TO_VECTOR:
2650 assert(VT.isVector() && !Operand.getValueType().isVector() &&
2651 (VT.getVectorElementType() == Operand.getValueType() ||
2652 (VT.getVectorElementType().isInteger() &&
2653 Operand.getValueType().isInteger() &&
2654 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
2655 "Illegal SCALAR_TO_VECTOR node!");
2656 if (OpOpcode == ISD::UNDEF)
2657 return getUNDEF(VT);
2658 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
2659 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
2660 isa<ConstantSDNode>(Operand.getOperand(1)) &&
2661 Operand.getConstantOperandVal(1) == 0 &&
2662 Operand.getOperand(0).getValueType() == VT)
2663 return Operand.getOperand(0);
2666 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
2667 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
2668 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
2669 Operand.getNode()->getOperand(0));
2670 if (OpOpcode == ISD::FNEG) // --X -> X
2671 return Operand.getNode()->getOperand(0);
2674 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
2675 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
2680 SDVTList VTs = getVTList(VT);
2681 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
2682 FoldingSetNodeID ID;
2683 SDValue Ops[1] = { Operand };
2684 AddNodeIDNode(ID, Opcode, VTs, Ops, 1);
2686 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
2687 return SDValue(E, 0);
2689 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2690 CSEMap.InsertNode(N, IP);
2692 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTs, Operand);
2695 AllNodes.push_back(N);
2699 return SDValue(N, 0);
2702 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode,
2704 ConstantSDNode *Cst1,
2705 ConstantSDNode *Cst2) {
2706 const APInt &C1 = Cst1->getAPIntValue(), &C2 = Cst2->getAPIntValue();
2709 case ISD::ADD: return getConstant(C1 + C2, VT);
2710 case ISD::SUB: return getConstant(C1 - C2, VT);
2711 case ISD::MUL: return getConstant(C1 * C2, VT);
2713 if (C2.getBoolValue()) return getConstant(C1.udiv(C2), VT);
2716 if (C2.getBoolValue()) return getConstant(C1.urem(C2), VT);
2719 if (C2.getBoolValue()) return getConstant(C1.sdiv(C2), VT);
2722 if (C2.getBoolValue()) return getConstant(C1.srem(C2), VT);
2724 case ISD::AND: return getConstant(C1 & C2, VT);
2725 case ISD::OR: return getConstant(C1 | C2, VT);
2726 case ISD::XOR: return getConstant(C1 ^ C2, VT);
2727 case ISD::SHL: return getConstant(C1 << C2, VT);
2728 case ISD::SRL: return getConstant(C1.lshr(C2), VT);
2729 case ISD::SRA: return getConstant(C1.ashr(C2), VT);
2730 case ISD::ROTL: return getConstant(C1.rotl(C2), VT);
2731 case ISD::ROTR: return getConstant(C1.rotr(C2), VT);
2738 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
2739 SDValue N1, SDValue N2) {
2740 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
2741 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2.getNode());
2744 case ISD::TokenFactor:
2745 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
2746 N2.getValueType() == MVT::Other && "Invalid token factor!");
2747 // Fold trivial token factors.
2748 if (N1.getOpcode() == ISD::EntryToken) return N2;
2749 if (N2.getOpcode() == ISD::EntryToken) return N1;
2750 if (N1 == N2) return N1;
2752 case ISD::CONCAT_VECTORS:
2753 // Concat of UNDEFs is UNDEF.
2754 if (N1.getOpcode() == ISD::UNDEF &&
2755 N2.getOpcode() == ISD::UNDEF)
2756 return getUNDEF(VT);
2758 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
2759 // one big BUILD_VECTOR.
2760 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
2761 N2.getOpcode() == ISD::BUILD_VECTOR) {
2762 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
2763 N1.getNode()->op_end());
2764 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
2765 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
2769 assert(VT.isInteger() && "This operator does not apply to FP types!");
2770 assert(N1.getValueType() == N2.getValueType() &&
2771 N1.getValueType() == VT && "Binary operator types must match!");
2772 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
2773 // worth handling here.
2774 if (N2C && N2C->isNullValue())
2776 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
2783 assert(VT.isInteger() && "This operator does not apply to FP types!");
2784 assert(N1.getValueType() == N2.getValueType() &&
2785 N1.getValueType() == VT && "Binary operator types must match!");
2786 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
2787 // it's worth handling here.
2788 if (N2C && N2C->isNullValue())
2798 assert(VT.isInteger() && "This operator does not apply to FP types!");
2799 assert(N1.getValueType() == N2.getValueType() &&
2800 N1.getValueType() == VT && "Binary operator types must match!");
2807 if (getTarget().Options.UnsafeFPMath) {
2808 if (Opcode == ISD::FADD) {
2810 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1))
2811 if (CFP->getValueAPF().isZero())
2814 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2815 if (CFP->getValueAPF().isZero())
2817 } else if (Opcode == ISD::FSUB) {
2819 if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N2))
2820 if (CFP->getValueAPF().isZero())
2822 } else if (Opcode == ISD::FMUL) {
2823 ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N1);
2826 // If the first operand isn't the constant, try the second
2828 CFP = dyn_cast<ConstantFPSDNode>(N2);
2835 return SDValue(CFP,0);
2837 if (CFP->isExactlyValue(1.0))
2842 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
2843 assert(N1.getValueType() == N2.getValueType() &&
2844 N1.getValueType() == VT && "Binary operator types must match!");
2846 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
2847 assert(N1.getValueType() == VT &&
2848 N1.getValueType().isFloatingPoint() &&
2849 N2.getValueType().isFloatingPoint() &&
2850 "Invalid FCOPYSIGN!");
2857 assert(VT == N1.getValueType() &&
2858 "Shift operators return type must be the same as their first arg");
2859 assert(VT.isInteger() && N2.getValueType().isInteger() &&
2860 "Shifts only work on integers");
2861 // Verify that the shift amount VT is bit enough to hold valid shift
2862 // amounts. This catches things like trying to shift an i1024 value by an
2863 // i8, which is easy to fall into in generic code that uses
2864 // TLI.getShiftAmount().
2865 assert(N2.getValueType().getSizeInBits() >=
2866 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
2867 "Invalid use of small shift amount with oversized value!");
2869 // Always fold shifts of i1 values so the code generator doesn't need to
2870 // handle them. Since we know the size of the shift has to be less than the
2871 // size of the value, the shift/rotate count is guaranteed to be zero.
2874 if (N2C && N2C->isNullValue())
2877 case ISD::FP_ROUND_INREG: {
2878 EVT EVT = cast<VTSDNode>(N2)->getVT();
2879 assert(VT == N1.getValueType() && "Not an inreg round!");
2880 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
2881 "Cannot FP_ROUND_INREG integer types");
2882 assert(EVT.isVector() == VT.isVector() &&
2883 "FP_ROUND_INREG type should be vector iff the operand "
2885 assert((!EVT.isVector() ||
2886 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2887 "Vector element counts must match in FP_ROUND_INREG");
2888 assert(EVT.bitsLE(VT) && "Not rounding down!");
2890 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
2894 assert(VT.isFloatingPoint() &&
2895 N1.getValueType().isFloatingPoint() &&
2896 VT.bitsLE(N1.getValueType()) &&
2897 isa<ConstantSDNode>(N2) && "Invalid FP_ROUND!");
2898 if (N1.getValueType() == VT) return N1; // noop conversion.
2900 case ISD::AssertSext:
2901 case ISD::AssertZext: {
2902 EVT EVT = cast<VTSDNode>(N2)->getVT();
2903 assert(VT == N1.getValueType() && "Not an inreg extend!");
2904 assert(VT.isInteger() && EVT.isInteger() &&
2905 "Cannot *_EXTEND_INREG FP types");
2906 assert(!EVT.isVector() &&
2907 "AssertSExt/AssertZExt type should be the vector element type "
2908 "rather than the vector type!");
2909 assert(EVT.bitsLE(VT) && "Not extending!");
2910 if (VT == EVT) return N1; // noop assertion.
2913 case ISD::SIGN_EXTEND_INREG: {
2914 EVT EVT = cast<VTSDNode>(N2)->getVT();
2915 assert(VT == N1.getValueType() && "Not an inreg extend!");
2916 assert(VT.isInteger() && EVT.isInteger() &&
2917 "Cannot *_EXTEND_INREG FP types");
2918 assert(EVT.isVector() == VT.isVector() &&
2919 "SIGN_EXTEND_INREG type should be vector iff the operand "
2921 assert((!EVT.isVector() ||
2922 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
2923 "Vector element counts must match in SIGN_EXTEND_INREG");
2924 assert(EVT.bitsLE(VT) && "Not extending!");
2925 if (EVT == VT) return N1; // Not actually extending
2928 APInt Val = N1C->getAPIntValue();
2929 unsigned FromBits = EVT.getScalarType().getSizeInBits();
2930 Val <<= Val.getBitWidth()-FromBits;
2931 Val = Val.ashr(Val.getBitWidth()-FromBits);
2932 return getConstant(Val, VT);
2936 case ISD::EXTRACT_VECTOR_ELT:
2937 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
2938 if (N1.getOpcode() == ISD::UNDEF)
2939 return getUNDEF(VT);
2941 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
2942 // expanding copies of large vectors from registers.
2944 N1.getOpcode() == ISD::CONCAT_VECTORS &&
2945 N1.getNumOperands() > 0) {
2947 N1.getOperand(0).getValueType().getVectorNumElements();
2948 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
2949 N1.getOperand(N2C->getZExtValue() / Factor),
2950 getConstant(N2C->getZExtValue() % Factor,
2951 N2.getValueType()));
2954 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
2955 // expanding large vector constants.
2956 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
2957 SDValue Elt = N1.getOperand(N2C->getZExtValue());
2959 if (VT != Elt.getValueType())
2960 // If the vector element type is not legal, the BUILD_VECTOR operands
2961 // are promoted and implicitly truncated, and the result implicitly
2962 // extended. Make that explicit here.
2963 Elt = getAnyExtOrTrunc(Elt, DL, VT);
2968 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
2969 // operations are lowered to scalars.
2970 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
2971 // If the indices are the same, return the inserted element else
2972 // if the indices are known different, extract the element from
2973 // the original vector.
2974 SDValue N1Op2 = N1.getOperand(2);
2975 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2.getNode());
2977 if (N1Op2C && N2C) {
2978 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
2979 if (VT == N1.getOperand(1).getValueType())
2980 return N1.getOperand(1);
2982 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
2985 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
2989 case ISD::EXTRACT_ELEMENT:
2990 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
2991 assert(!N1.getValueType().isVector() && !VT.isVector() &&
2992 (N1.getValueType().isInteger() == VT.isInteger()) &&
2993 N1.getValueType() != VT &&
2994 "Wrong types for EXTRACT_ELEMENT!");
2996 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
2997 // 64-bit integers into 32-bit parts. Instead of building the extract of
2998 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
2999 if (N1.getOpcode() == ISD::BUILD_PAIR)
3000 return N1.getOperand(N2C->getZExtValue());
3002 // EXTRACT_ELEMENT of a constant int is also very common.
3003 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
3004 unsigned ElementSize = VT.getSizeInBits();
3005 unsigned Shift = ElementSize * N2C->getZExtValue();
3006 APInt ShiftedVal = C->getAPIntValue().lshr(Shift);
3007 return getConstant(ShiftedVal.trunc(ElementSize), VT);
3010 case ISD::EXTRACT_SUBVECTOR: {
3012 if (VT.isSimple() && N1.getValueType().isSimple()) {
3013 assert(VT.isVector() && N1.getValueType().isVector() &&
3014 "Extract subvector VTs must be a vectors!");
3015 assert(VT.getVectorElementType() == N1.getValueType().getVectorElementType() &&
3016 "Extract subvector VTs must have the same element type!");
3017 assert(VT.getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3018 "Extract subvector must be from larger vector to smaller vector!");
3020 if (isa<ConstantSDNode>(Index.getNode())) {
3021 assert((VT.getVectorNumElements() +
3022 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3023 <= N1.getValueType().getVectorNumElements())
3024 && "Extract subvector overflow!");
3027 // Trivial extraction.
3028 if (VT.getSimpleVT() == N1.getValueType().getSimpleVT())
3037 SDValue SV = FoldConstantArithmetic(Opcode, VT, N1C, N2C);
3038 if (SV.getNode()) return SV;
3039 } else { // Cannonicalize constant to RHS if commutative
3040 if (isCommutativeBinOp(Opcode)) {
3041 std::swap(N1C, N2C);
3047 // Constant fold FP operations.
3048 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1.getNode());
3049 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2.getNode());
3051 if (!N2CFP && isCommutativeBinOp(Opcode)) {
3052 // Cannonicalize constant to RHS if commutative
3053 std::swap(N1CFP, N2CFP);
3055 } else if (N2CFP && VT != MVT::ppcf128) {
3056 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3057 APFloat::opStatus s;
3060 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3061 if (s != APFloat::opInvalidOp)
3062 return getConstantFP(V1, VT);
3065 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3066 if (s!=APFloat::opInvalidOp)
3067 return getConstantFP(V1, VT);
3070 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3071 if (s!=APFloat::opInvalidOp)
3072 return getConstantFP(V1, VT);
3075 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3076 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3077 return getConstantFP(V1, VT);
3080 s = V1.mod(V2, APFloat::rmNearestTiesToEven);
3081 if (s!=APFloat::opInvalidOp && s!=APFloat::opDivByZero)
3082 return getConstantFP(V1, VT);
3084 case ISD::FCOPYSIGN:
3086 return getConstantFP(V1, VT);
3091 if (Opcode == ISD::FP_ROUND) {
3092 APFloat V = N1CFP->getValueAPF(); // make copy
3094 // This can return overflow, underflow, or inexact; we don't care.
3095 // FIXME need to be more flexible about rounding mode.
3096 (void)V.convert(*EVTToAPFloatSemantics(VT),
3097 APFloat::rmNearestTiesToEven, &ignored);
3098 return getConstantFP(V, VT);
3102 // Canonicalize an UNDEF to the RHS, even over a constant.
3103 if (N1.getOpcode() == ISD::UNDEF) {
3104 if (isCommutativeBinOp(Opcode)) {
3108 case ISD::FP_ROUND_INREG:
3109 case ISD::SIGN_EXTEND_INREG:
3115 return N1; // fold op(undef, arg2) -> undef
3123 return getConstant(0, VT); // fold op(undef, arg2) -> 0
3124 // For vectors, we can't easily build an all zero vector, just return
3131 // Fold a bunch of operators when the RHS is undef.
3132 if (N2.getOpcode() == ISD::UNDEF) {
3135 if (N1.getOpcode() == ISD::UNDEF)
3136 // Handle undef ^ undef -> 0 special case. This is a common
3138 return getConstant(0, VT);
3148 return N2; // fold op(arg1, undef) -> undef
3154 if (getTarget().Options.UnsafeFPMath)
3162 return getConstant(0, VT); // fold op(arg1, undef) -> 0
3163 // For vectors, we can't easily build an all zero vector, just return
3168 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), VT);
3169 // For vectors, we can't easily build an all one vector, just return
3177 // Memoize this node if possible.
3179 SDVTList VTs = getVTList(VT);
3180 if (VT != MVT::Glue) {
3181 SDValue Ops[] = { N1, N2 };
3182 FoldingSetNodeID ID;
3183 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
3185 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3186 return SDValue(E, 0);
3188 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3189 CSEMap.InsertNode(N, IP);
3191 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTs, N1, N2);
3194 AllNodes.push_back(N);
3198 return SDValue(N, 0);
3201 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3202 SDValue N1, SDValue N2, SDValue N3) {
3203 // Perform various simplifications.
3204 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode());
3206 case ISD::CONCAT_VECTORS:
3207 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3208 // one big BUILD_VECTOR.
3209 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3210 N2.getOpcode() == ISD::BUILD_VECTOR &&
3211 N3.getOpcode() == ISD::BUILD_VECTOR) {
3212 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3213 N1.getNode()->op_end());
3214 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3215 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3216 return getNode(ISD::BUILD_VECTOR, DL, VT, &Elts[0], Elts.size());
3220 // Use FoldSetCC to simplify SETCC's.
3221 SDValue Simp = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL);
3222 if (Simp.getNode()) return Simp;
3227 if (N1C->getZExtValue())
3228 return N2; // select true, X, Y -> X
3229 return N3; // select false, X, Y -> Y
3232 if (N2 == N3) return N2; // select C, X, X -> X
3234 case ISD::VECTOR_SHUFFLE:
3235 llvm_unreachable("should use getVectorShuffle constructor!");
3236 case ISD::INSERT_SUBVECTOR: {
3238 if (VT.isSimple() && N1.getValueType().isSimple()
3239 && N2.getValueType().isSimple()) {
3240 assert(VT.isVector() && N1.getValueType().isVector() &&
3241 N2.getValueType().isVector() &&
3242 "Insert subvector VTs must be a vectors");
3243 assert(VT == N1.getValueType() &&
3244 "Dest and insert subvector source types must match!");
3245 assert(N2.getValueType().getSimpleVT() <= N1.getValueType().getSimpleVT() &&
3246 "Insert subvector must be from smaller vector to larger vector!");
3247 if (isa<ConstantSDNode>(Index.getNode())) {
3248 assert((N2.getValueType().getVectorNumElements() +
3249 cast<ConstantSDNode>(Index.getNode())->getZExtValue()
3250 <= VT.getVectorNumElements())
3251 && "Insert subvector overflow!");
3254 // Trivial insertion.
3255 if (VT.getSimpleVT() == N2.getValueType().getSimpleVT())
3261 // Fold bit_convert nodes from a type to themselves.
3262 if (N1.getValueType() == VT)
3267 // Memoize node if it doesn't produce a flag.
3269 SDVTList VTs = getVTList(VT);
3270 if (VT != MVT::Glue) {
3271 SDValue Ops[] = { N1, N2, N3 };
3272 FoldingSetNodeID ID;
3273 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
3275 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
3276 return SDValue(E, 0);
3278 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3279 CSEMap.InsertNode(N, IP);
3281 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTs, N1, N2, N3);
3284 AllNodes.push_back(N);
3288 return SDValue(N, 0);
3291 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3292 SDValue N1, SDValue N2, SDValue N3,
3294 SDValue Ops[] = { N1, N2, N3, N4 };
3295 return getNode(Opcode, DL, VT, Ops, 4);
3298 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
3299 SDValue N1, SDValue N2, SDValue N3,
3300 SDValue N4, SDValue N5) {
3301 SDValue Ops[] = { N1, N2, N3, N4, N5 };
3302 return getNode(Opcode, DL, VT, Ops, 5);
3305 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
3306 /// the incoming stack arguments to be loaded from the stack.
3307 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
3308 SmallVector<SDValue, 8> ArgChains;
3310 // Include the original chain at the beginning of the list. When this is
3311 // used by target LowerCall hooks, this helps legalize find the
3312 // CALLSEQ_BEGIN node.
3313 ArgChains.push_back(Chain);
3315 // Add a chain value for each stack argument.
3316 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
3317 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
3318 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
3319 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
3320 if (FI->getIndex() < 0)
3321 ArgChains.push_back(SDValue(L, 1));
3323 // Build a tokenfactor for all the chains.
3324 return getNode(ISD::TokenFactor, Chain.getDebugLoc(), MVT::Other,
3325 &ArgChains[0], ArgChains.size());
3328 /// SplatByte - Distribute ByteVal over NumBits bits.
3329 static APInt SplatByte(unsigned NumBits, uint8_t ByteVal) {
3330 APInt Val = APInt(NumBits, ByteVal);
3332 for (unsigned i = NumBits; i > 8; i >>= 1) {
3333 Val = (Val << Shift) | Val;
3339 /// getMemsetValue - Vectorized representation of the memset value
3341 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
3343 assert(Value.getOpcode() != ISD::UNDEF);
3345 unsigned NumBits = VT.getScalarType().getSizeInBits();
3346 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
3347 APInt Val = SplatByte(NumBits, C->getZExtValue() & 255);
3349 return DAG.getConstant(Val, VT);
3350 return DAG.getConstantFP(APFloat(Val), VT);
3353 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, VT, Value);
3355 // Use a multiplication with 0x010101... to extend the input to the
3357 APInt Magic = SplatByte(NumBits, 0x01);
3358 Value = DAG.getNode(ISD::MUL, dl, VT, Value, DAG.getConstant(Magic, VT));
3364 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
3365 /// used when a memcpy is turned into a memset when the source is a constant
3367 static SDValue getMemsetStringVal(EVT VT, DebugLoc dl, SelectionDAG &DAG,
3368 const TargetLowering &TLI, StringRef Str) {
3369 // Handle vector with all elements zero.
3372 return DAG.getConstant(0, VT);
3373 else if (VT == MVT::f32 || VT == MVT::f64)
3374 return DAG.getConstantFP(0.0, VT);
3375 else if (VT.isVector()) {
3376 unsigned NumElts = VT.getVectorNumElements();
3377 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
3378 return DAG.getNode(ISD::BITCAST, dl, VT,
3379 DAG.getConstant(0, EVT::getVectorVT(*DAG.getContext(),
3382 llvm_unreachable("Expected type!");
3385 assert(!VT.isVector() && "Can't handle vector type here!");
3386 unsigned NumVTBytes = VT.getSizeInBits() / 8;
3387 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
3390 if (TLI.isLittleEndian()) {
3391 for (unsigned i = 0; i != NumBytes; ++i)
3392 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
3394 for (unsigned i = 0; i != NumBytes; ++i)
3395 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
3398 return DAG.getConstant(Val, VT);
3401 /// getMemBasePlusOffset - Returns base and offset node for the
3403 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset,
3404 SelectionDAG &DAG) {
3405 EVT VT = Base.getValueType();
3406 return DAG.getNode(ISD::ADD, Base.getDebugLoc(),
3407 VT, Base, DAG.getConstant(Offset, VT));
3410 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
3412 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
3413 unsigned SrcDelta = 0;
3414 GlobalAddressSDNode *G = NULL;
3415 if (Src.getOpcode() == ISD::GlobalAddress)
3416 G = cast<GlobalAddressSDNode>(Src);
3417 else if (Src.getOpcode() == ISD::ADD &&
3418 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
3419 Src.getOperand(1).getOpcode() == ISD::Constant) {
3420 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
3421 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
3426 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
3429 /// FindOptimalMemOpLowering - Determines the optimial series memory ops
3430 /// to replace the memset / memcpy. Return true if the number of memory ops
3431 /// is below the threshold. It returns the types of the sequence of
3432 /// memory ops to perform memset / memcpy by reference.
3433 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
3434 unsigned Limit, uint64_t Size,
3435 unsigned DstAlign, unsigned SrcAlign,
3439 const TargetLowering &TLI) {
3440 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
3441 "Expecting memcpy / memset source to meet alignment requirement!");
3442 // If 'SrcAlign' is zero, that means the memory operation does not need to
3443 // load the value, i.e. memset or memcpy from constant string. Otherwise,
3444 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
3445 // is the specified alignment of the memory operation. If it is zero, that
3446 // means it's possible to change the alignment of the destination.
3447 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
3448 // not need to be loaded.
3449 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
3450 IsZeroVal, MemcpyStrSrc,
3451 DAG.getMachineFunction());
3452 Type *vtType = VT.isExtended() ? VT.getTypeForEVT(*DAG.getContext()) : NULL;
3453 unsigned AS = (vtType && vtType->isPointerTy()) ?
3454 cast<PointerType>(vtType)->getAddressSpace() : 0;
3456 if (VT == MVT::Other) {
3457 if (DstAlign >= TLI.getDataLayout()->getPointerPrefAlignment(AS) ||
3458 TLI.allowsUnalignedMemoryAccesses(VT)) {
3459 VT = TLI.getPointerTy();
3461 switch (DstAlign & 7) {
3462 case 0: VT = MVT::i64; break;
3463 case 4: VT = MVT::i32; break;
3464 case 2: VT = MVT::i16; break;
3465 default: VT = MVT::i8; break;
3470 while (!TLI.isTypeLegal(LVT))
3471 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
3472 assert(LVT.isInteger());
3478 unsigned NumMemOps = 0;
3480 unsigned VTSize = VT.getSizeInBits() / 8;
3481 while (VTSize > Size) {
3482 // For now, only use non-vector load / store's for the left-over pieces.
3483 if (VT.isVector() || VT.isFloatingPoint()) {
3485 while (!TLI.isTypeLegal(VT))
3486 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3487 VTSize = VT.getSizeInBits() / 8;
3489 // This can result in a type that is not legal on the target, e.g.
3490 // 1 or 2 bytes on PPC.
3491 VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
3496 if (++NumMemOps > Limit)
3498 MemOps.push_back(VT);
3505 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3506 SDValue Chain, SDValue Dst,
3507 SDValue Src, uint64_t Size,
3508 unsigned Align, bool isVol,
3510 MachinePointerInfo DstPtrInfo,
3511 MachinePointerInfo SrcPtrInfo) {
3512 // Turn a memcpy of undef to nop.
3513 if (Src.getOpcode() == ISD::UNDEF)
3516 // Expand memcpy to a series of load and store ops if the size operand falls
3517 // below a certain threshold.
3518 // TODO: In the AlwaysInline case, if the size is big then generate a loop
3519 // rather than maybe a humongous number of loads and stores.
3520 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3521 std::vector<EVT> MemOps;
3522 bool DstAlignCanChange = false;
3523 MachineFunction &MF = DAG.getMachineFunction();
3524 MachineFrameInfo *MFI = MF.getFrameInfo();
3526 MF.getFunction()->getFnAttributes().
3527 hasAttribute(Attributes::OptimizeForSize);
3528 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3529 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3530 DstAlignCanChange = true;
3531 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3532 if (Align > SrcAlign)
3535 bool CopyFromStr = isMemSrcFromString(Src, Str);
3536 bool isZeroStr = CopyFromStr && Str.empty();
3537 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
3539 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3540 (DstAlignCanChange ? 0 : Align),
3541 (isZeroStr ? 0 : SrcAlign),
3542 true, CopyFromStr, DAG, TLI))
3545 if (DstAlignCanChange) {
3546 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3547 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3548 if (NewAlign > Align) {
3549 // Give the stack frame object a larger alignment if needed.
3550 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3551 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3556 SmallVector<SDValue, 8> OutChains;
3557 unsigned NumMemOps = MemOps.size();
3558 uint64_t SrcOff = 0, DstOff = 0;
3559 for (unsigned i = 0; i != NumMemOps; ++i) {
3561 unsigned VTSize = VT.getSizeInBits() / 8;
3562 SDValue Value, Store;
3565 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
3566 // It's unlikely a store of a vector immediate can be done in a single
3567 // instruction. It would require a load from a constantpool first.
3568 // We only handle zero vectors here.
3569 // FIXME: Handle other cases where store of vector immediate is done in
3570 // a single instruction.
3571 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
3572 Store = DAG.getStore(Chain, dl, Value,
3573 getMemBasePlusOffset(Dst, DstOff, DAG),
3574 DstPtrInfo.getWithOffset(DstOff), isVol,
3577 // The type might not be legal for the target. This should only happen
3578 // if the type is smaller than a legal type, as on PPC, so the right
3579 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
3580 // to Load/Store if NVT==VT.
3581 // FIXME does the case above also need this?
3582 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
3583 assert(NVT.bitsGE(VT));
3584 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
3585 getMemBasePlusOffset(Src, SrcOff, DAG),
3586 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
3587 MinAlign(SrcAlign, SrcOff));
3588 Store = DAG.getTruncStore(Chain, dl, Value,
3589 getMemBasePlusOffset(Dst, DstOff, DAG),
3590 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
3593 OutChains.push_back(Store);
3598 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3599 &OutChains[0], OutChains.size());
3602 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, DebugLoc dl,
3603 SDValue Chain, SDValue Dst,
3604 SDValue Src, uint64_t Size,
3605 unsigned Align, bool isVol,
3607 MachinePointerInfo DstPtrInfo,
3608 MachinePointerInfo SrcPtrInfo) {
3609 // Turn a memmove of undef to nop.
3610 if (Src.getOpcode() == ISD::UNDEF)
3613 // Expand memmove to a series of load and store ops if the size operand falls
3614 // below a certain threshold.
3615 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3616 std::vector<EVT> MemOps;
3617 bool DstAlignCanChange = false;
3618 MachineFunction &MF = DAG.getMachineFunction();
3619 MachineFrameInfo *MFI = MF.getFrameInfo();
3620 bool OptSize = MF.getFunction()->getFnAttributes().
3621 hasAttribute(Attributes::OptimizeForSize);
3622 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3623 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3624 DstAlignCanChange = true;
3625 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
3626 if (Align > SrcAlign)
3628 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
3630 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
3631 (DstAlignCanChange ? 0 : Align),
3632 SrcAlign, true, false, DAG, TLI))
3635 if (DstAlignCanChange) {
3636 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3637 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3638 if (NewAlign > Align) {
3639 // Give the stack frame object a larger alignment if needed.
3640 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3641 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3646 uint64_t SrcOff = 0, DstOff = 0;
3647 SmallVector<SDValue, 8> LoadValues;
3648 SmallVector<SDValue, 8> LoadChains;
3649 SmallVector<SDValue, 8> OutChains;
3650 unsigned NumMemOps = MemOps.size();
3651 for (unsigned i = 0; i < NumMemOps; i++) {
3653 unsigned VTSize = VT.getSizeInBits() / 8;
3654 SDValue Value, Store;
3656 Value = DAG.getLoad(VT, dl, Chain,
3657 getMemBasePlusOffset(Src, SrcOff, DAG),
3658 SrcPtrInfo.getWithOffset(SrcOff), isVol,
3659 false, false, SrcAlign);
3660 LoadValues.push_back(Value);
3661 LoadChains.push_back(Value.getValue(1));
3664 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3665 &LoadChains[0], LoadChains.size());
3667 for (unsigned i = 0; i < NumMemOps; i++) {
3669 unsigned VTSize = VT.getSizeInBits() / 8;
3670 SDValue Value, Store;
3672 Store = DAG.getStore(Chain, dl, LoadValues[i],
3673 getMemBasePlusOffset(Dst, DstOff, DAG),
3674 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
3675 OutChains.push_back(Store);
3679 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3680 &OutChains[0], OutChains.size());
3683 static SDValue getMemsetStores(SelectionDAG &DAG, DebugLoc dl,
3684 SDValue Chain, SDValue Dst,
3685 SDValue Src, uint64_t Size,
3686 unsigned Align, bool isVol,
3687 MachinePointerInfo DstPtrInfo) {
3688 // Turn a memset of undef to nop.
3689 if (Src.getOpcode() == ISD::UNDEF)
3692 // Expand memset to a series of load/store ops if the size operand
3693 // falls below a certain threshold.
3694 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
3695 std::vector<EVT> MemOps;
3696 bool DstAlignCanChange = false;
3697 MachineFunction &MF = DAG.getMachineFunction();
3698 MachineFrameInfo *MFI = MF.getFrameInfo();
3699 bool OptSize = MF.getFunction()->getFnAttributes().
3700 hasAttribute(Attributes::OptimizeForSize);
3701 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
3702 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
3703 DstAlignCanChange = true;
3705 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
3706 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
3707 Size, (DstAlignCanChange ? 0 : Align), 0,
3708 IsZeroVal, false, DAG, TLI))
3711 if (DstAlignCanChange) {
3712 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
3713 unsigned NewAlign = (unsigned) TLI.getDataLayout()->getABITypeAlignment(Ty);
3714 if (NewAlign > Align) {
3715 // Give the stack frame object a larger alignment if needed.
3716 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
3717 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
3722 SmallVector<SDValue, 8> OutChains;
3723 uint64_t DstOff = 0;
3724 unsigned NumMemOps = MemOps.size();
3726 // Find the largest store and generate the bit pattern for it.
3727 EVT LargestVT = MemOps[0];
3728 for (unsigned i = 1; i < NumMemOps; i++)
3729 if (MemOps[i].bitsGT(LargestVT))
3730 LargestVT = MemOps[i];
3731 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
3733 for (unsigned i = 0; i < NumMemOps; i++) {
3736 // If this store is smaller than the largest store see whether we can get
3737 // the smaller value for free with a truncate.
3738 SDValue Value = MemSetValue;
3739 if (VT.bitsLT(LargestVT)) {
3740 if (!LargestVT.isVector() && !VT.isVector() &&
3741 TLI.isTruncateFree(LargestVT, VT))
3742 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
3744 Value = getMemsetValue(Src, VT, DAG, dl);
3746 assert(Value.getValueType() == VT && "Value with wrong type.");
3747 SDValue Store = DAG.getStore(Chain, dl, Value,
3748 getMemBasePlusOffset(Dst, DstOff, DAG),
3749 DstPtrInfo.getWithOffset(DstOff),
3750 isVol, false, Align);
3751 OutChains.push_back(Store);
3752 DstOff += VT.getSizeInBits() / 8;
3755 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
3756 &OutChains[0], OutChains.size());
3759 SDValue SelectionDAG::getMemcpy(SDValue Chain, DebugLoc dl, SDValue Dst,
3760 SDValue Src, SDValue Size,
3761 unsigned Align, bool isVol, bool AlwaysInline,
3762 MachinePointerInfo DstPtrInfo,
3763 MachinePointerInfo SrcPtrInfo) {
3765 // Check to see if we should lower the memcpy to loads and stores first.
3766 // For cases within the target-specified limits, this is the best choice.
3767 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3769 // Memcpy with size zero? Just return the original chain.
3770 if (ConstantSize->isNullValue())
3773 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3774 ConstantSize->getZExtValue(),Align,
3775 isVol, false, DstPtrInfo, SrcPtrInfo);
3776 if (Result.getNode())
3780 // Then check to see if we should lower the memcpy with target-specific
3781 // code. If the target chooses to do this, this is the next best.
3783 TSI.EmitTargetCodeForMemcpy(*this, dl, Chain, Dst, Src, Size, Align,
3784 isVol, AlwaysInline,
3785 DstPtrInfo, SrcPtrInfo);
3786 if (Result.getNode())
3789 // If we really need inline code and the target declined to provide it,
3790 // use a (potentially long) sequence of loads and stores.
3792 assert(ConstantSize && "AlwaysInline requires a constant size!");
3793 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
3794 ConstantSize->getZExtValue(), Align, isVol,
3795 true, DstPtrInfo, SrcPtrInfo);
3798 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
3799 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
3800 // respect volatile, so they may do things like read or write memory
3801 // beyond the given memory regions. But fixing this isn't easy, and most
3802 // people don't care.
3804 // Emit a library call.
3805 TargetLowering::ArgListTy Args;
3806 TargetLowering::ArgListEntry Entry;
3807 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3808 Entry.Node = Dst; Args.push_back(Entry);
3809 Entry.Node = Src; Args.push_back(Entry);
3810 Entry.Node = Size; Args.push_back(Entry);
3811 // FIXME: pass in DebugLoc
3813 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3814 false, false, false, false, 0,
3815 TLI.getLibcallCallingConv(RTLIB::MEMCPY),
3816 /*isTailCall=*/false,
3817 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3818 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMCPY),
3819 TLI.getPointerTy()),
3821 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3823 return CallResult.second;
3826 SDValue SelectionDAG::getMemmove(SDValue Chain, DebugLoc dl, SDValue Dst,
3827 SDValue Src, SDValue Size,
3828 unsigned Align, bool isVol,
3829 MachinePointerInfo DstPtrInfo,
3830 MachinePointerInfo SrcPtrInfo) {
3832 // Check to see if we should lower the memmove to loads and stores first.
3833 // For cases within the target-specified limits, this is the best choice.
3834 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3836 // Memmove with size zero? Just return the original chain.
3837 if (ConstantSize->isNullValue())
3841 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
3842 ConstantSize->getZExtValue(), Align, isVol,
3843 false, DstPtrInfo, SrcPtrInfo);
3844 if (Result.getNode())
3848 // Then check to see if we should lower the memmove with target-specific
3849 // code. If the target chooses to do this, this is the next best.
3851 TSI.EmitTargetCodeForMemmove(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3852 DstPtrInfo, SrcPtrInfo);
3853 if (Result.getNode())
3856 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
3857 // not be safe. See memcpy above for more details.
3859 // Emit a library call.
3860 TargetLowering::ArgListTy Args;
3861 TargetLowering::ArgListEntry Entry;
3862 Entry.Ty = TLI.getDataLayout()->getIntPtrType(*getContext());
3863 Entry.Node = Dst; Args.push_back(Entry);
3864 Entry.Node = Src; Args.push_back(Entry);
3865 Entry.Node = Size; Args.push_back(Entry);
3866 // FIXME: pass in DebugLoc
3868 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3869 false, false, false, false, 0,
3870 TLI.getLibcallCallingConv(RTLIB::MEMMOVE),
3871 /*isTailCall=*/false,
3872 /*doesNotReturn=*/false, /*isReturnValueUsed=*/false,
3873 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMMOVE),
3874 TLI.getPointerTy()),
3876 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3878 return CallResult.second;
3881 SDValue SelectionDAG::getMemset(SDValue Chain, DebugLoc dl, SDValue Dst,
3882 SDValue Src, SDValue Size,
3883 unsigned Align, bool isVol,
3884 MachinePointerInfo DstPtrInfo) {
3886 // Check to see if we should lower the memset to stores first.
3887 // For cases within the target-specified limits, this is the best choice.
3888 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
3890 // Memset with size zero? Just return the original chain.
3891 if (ConstantSize->isNullValue())
3895 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
3896 Align, isVol, DstPtrInfo);
3898 if (Result.getNode())
3902 // Then check to see if we should lower the memset with target-specific
3903 // code. If the target chooses to do this, this is the next best.
3905 TSI.EmitTargetCodeForMemset(*this, dl, Chain, Dst, Src, Size, Align, isVol,
3907 if (Result.getNode())
3910 // Emit a library call.
3911 Type *IntPtrTy = TLI.getDataLayout()->getIntPtrType(*getContext());
3912 TargetLowering::ArgListTy Args;
3913 TargetLowering::ArgListEntry Entry;
3914 Entry.Node = Dst; Entry.Ty = IntPtrTy;
3915 Args.push_back(Entry);
3916 // Extend or truncate the argument to be an i32 value for the call.
3917 if (Src.getValueType().bitsGT(MVT::i32))
3918 Src = getNode(ISD::TRUNCATE, dl, MVT::i32, Src);
3920 Src = getNode(ISD::ZERO_EXTEND, dl, MVT::i32, Src);
3922 Entry.Ty = Type::getInt32Ty(*getContext());
3923 Entry.isSExt = true;
3924 Args.push_back(Entry);
3926 Entry.Ty = IntPtrTy;
3927 Entry.isSExt = false;
3928 Args.push_back(Entry);
3929 // FIXME: pass in DebugLoc
3931 CallLoweringInfo CLI(Chain, Type::getVoidTy(*getContext()),
3932 false, false, false, false, 0,
3933 TLI.getLibcallCallingConv(RTLIB::MEMSET),
3934 /*isTailCall=*/false,
3935 /*doesNotReturn*/false, /*isReturnValueUsed=*/false,
3936 getExternalSymbol(TLI.getLibcallName(RTLIB::MEMSET),
3937 TLI.getPointerTy()),
3939 std::pair<SDValue,SDValue> CallResult = TLI.LowerCallTo(CLI);
3941 return CallResult.second;
3944 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3945 SDValue Chain, SDValue Ptr, SDValue Cmp,
3946 SDValue Swp, MachinePointerInfo PtrInfo,
3948 AtomicOrdering Ordering,
3949 SynchronizationScope SynchScope) {
3950 if (Alignment == 0) // Ensure that codegen never sees alignment 0
3951 Alignment = getEVTAlignment(MemVT);
3953 MachineFunction &MF = getMachineFunction();
3955 // All atomics are load and store, except for ATMOIC_LOAD and ATOMIC_STORE.
3956 // For now, atomics are considered to be volatile always.
3957 // FIXME: Volatile isn't really correct; we should keep track of atomic
3958 // orderings in the memoperand.
3959 unsigned Flags = MachineMemOperand::MOVolatile;
3960 if (Opcode != ISD::ATOMIC_STORE)
3961 Flags |= MachineMemOperand::MOLoad;
3962 if (Opcode != ISD::ATOMIC_LOAD)
3963 Flags |= MachineMemOperand::MOStore;
3965 MachineMemOperand *MMO =
3966 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
3968 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Cmp, Swp, MMO,
3969 Ordering, SynchScope);
3972 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
3974 SDValue Ptr, SDValue Cmp,
3975 SDValue Swp, MachineMemOperand *MMO,
3976 AtomicOrdering Ordering,
3977 SynchronizationScope SynchScope) {
3978 assert(Opcode == ISD::ATOMIC_CMP_SWAP && "Invalid Atomic Op");
3979 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
3981 EVT VT = Cmp.getValueType();
3983 SDVTList VTs = getVTList(VT, MVT::Other);
3984 FoldingSetNodeID ID;
3985 ID.AddInteger(MemVT.getRawBits());
3986 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
3987 AddNodeIDNode(ID, Opcode, VTs, Ops, 4);
3988 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
3990 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
3991 cast<AtomicSDNode>(E)->refineAlignment(MMO);
3992 return SDValue(E, 0);
3994 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
3995 Ptr, Cmp, Swp, MMO, Ordering,
3997 CSEMap.InsertNode(N, IP);
3998 AllNodes.push_back(N);
3999 return SDValue(N, 0);
4002 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4004 SDValue Ptr, SDValue Val,
4005 const Value* PtrVal,
4007 AtomicOrdering Ordering,
4008 SynchronizationScope SynchScope) {
4009 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4010 Alignment = getEVTAlignment(MemVT);
4012 MachineFunction &MF = getMachineFunction();
4013 // An atomic store does not load. An atomic load does not store.
4014 // (An atomicrmw obviously both loads and stores.)
4015 // For now, atomics are considered to be volatile always, and they are
4017 // FIXME: Volatile isn't really correct; we should keep track of atomic
4018 // orderings in the memoperand.
4019 unsigned Flags = MachineMemOperand::MOVolatile;
4020 if (Opcode != ISD::ATOMIC_STORE)
4021 Flags |= MachineMemOperand::MOLoad;
4022 if (Opcode != ISD::ATOMIC_LOAD)
4023 Flags |= MachineMemOperand::MOStore;
4025 MachineMemOperand *MMO =
4026 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4027 MemVT.getStoreSize(), Alignment);
4029 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4030 Ordering, SynchScope);
4033 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4035 SDValue Ptr, SDValue Val,
4036 MachineMemOperand *MMO,
4037 AtomicOrdering Ordering,
4038 SynchronizationScope SynchScope) {
4039 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4040 Opcode == ISD::ATOMIC_LOAD_SUB ||
4041 Opcode == ISD::ATOMIC_LOAD_AND ||
4042 Opcode == ISD::ATOMIC_LOAD_OR ||
4043 Opcode == ISD::ATOMIC_LOAD_XOR ||
4044 Opcode == ISD::ATOMIC_LOAD_NAND ||
4045 Opcode == ISD::ATOMIC_LOAD_MIN ||
4046 Opcode == ISD::ATOMIC_LOAD_MAX ||
4047 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4048 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4049 Opcode == ISD::ATOMIC_SWAP ||
4050 Opcode == ISD::ATOMIC_STORE) &&
4051 "Invalid Atomic Op");
4053 EVT VT = Val.getValueType();
4055 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4056 getVTList(VT, MVT::Other);
4057 FoldingSetNodeID ID;
4058 ID.AddInteger(MemVT.getRawBits());
4059 SDValue Ops[] = {Chain, Ptr, Val};
4060 AddNodeIDNode(ID, Opcode, VTs, Ops, 3);
4061 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4063 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4064 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4065 return SDValue(E, 0);
4067 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4069 Ordering, SynchScope);
4070 CSEMap.InsertNode(N, IP);
4071 AllNodes.push_back(N);
4072 return SDValue(N, 0);
4075 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4076 EVT VT, SDValue Chain,
4078 const Value* PtrVal,
4080 AtomicOrdering Ordering,
4081 SynchronizationScope SynchScope) {
4082 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4083 Alignment = getEVTAlignment(MemVT);
4085 MachineFunction &MF = getMachineFunction();
4086 // An atomic store does not load. An atomic load does not store.
4087 // (An atomicrmw obviously both loads and stores.)
4088 // For now, atomics are considered to be volatile always, and they are
4090 // FIXME: Volatile isn't really correct; we should keep track of atomic
4091 // orderings in the memoperand.
4092 unsigned Flags = MachineMemOperand::MOVolatile;
4093 if (Opcode != ISD::ATOMIC_STORE)
4094 Flags |= MachineMemOperand::MOLoad;
4095 if (Opcode != ISD::ATOMIC_LOAD)
4096 Flags |= MachineMemOperand::MOStore;
4098 MachineMemOperand *MMO =
4099 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4100 MemVT.getStoreSize(), Alignment);
4102 return getAtomic(Opcode, dl, MemVT, VT, Chain, Ptr, MMO,
4103 Ordering, SynchScope);
4106 SDValue SelectionDAG::getAtomic(unsigned Opcode, DebugLoc dl, EVT MemVT,
4107 EVT VT, SDValue Chain,
4109 MachineMemOperand *MMO,
4110 AtomicOrdering Ordering,
4111 SynchronizationScope SynchScope) {
4112 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4114 SDVTList VTs = getVTList(VT, MVT::Other);
4115 FoldingSetNodeID ID;
4116 ID.AddInteger(MemVT.getRawBits());
4117 SDValue Ops[] = {Chain, Ptr};
4118 AddNodeIDNode(ID, Opcode, VTs, Ops, 2);
4119 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4121 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4122 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4123 return SDValue(E, 0);
4125 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl, VTs, MemVT, Chain,
4126 Ptr, MMO, Ordering, SynchScope);
4127 CSEMap.InsertNode(N, IP);
4128 AllNodes.push_back(N);
4129 return SDValue(N, 0);
4132 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4133 SDValue SelectionDAG::getMergeValues(const SDValue *Ops, unsigned NumOps,
4138 SmallVector<EVT, 4> VTs;
4139 VTs.reserve(NumOps);
4140 for (unsigned i = 0; i < NumOps; ++i)
4141 VTs.push_back(Ops[i].getValueType());
4142 return getNode(ISD::MERGE_VALUES, dl, getVTList(&VTs[0], NumOps),
4147 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl,
4148 const EVT *VTs, unsigned NumVTs,
4149 const SDValue *Ops, unsigned NumOps,
4150 EVT MemVT, MachinePointerInfo PtrInfo,
4151 unsigned Align, bool Vol,
4152 bool ReadMem, bool WriteMem) {
4153 return getMemIntrinsicNode(Opcode, dl, makeVTList(VTs, NumVTs), Ops, NumOps,
4154 MemVT, PtrInfo, Align, Vol,
4159 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4160 const SDValue *Ops, unsigned NumOps,
4161 EVT MemVT, MachinePointerInfo PtrInfo,
4162 unsigned Align, bool Vol,
4163 bool ReadMem, bool WriteMem) {
4164 if (Align == 0) // Ensure that codegen never sees alignment 0
4165 Align = getEVTAlignment(MemVT);
4167 MachineFunction &MF = getMachineFunction();
4170 Flags |= MachineMemOperand::MOStore;
4172 Flags |= MachineMemOperand::MOLoad;
4174 Flags |= MachineMemOperand::MOVolatile;
4175 MachineMemOperand *MMO =
4176 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Align);
4178 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, NumOps, MemVT, MMO);
4182 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, DebugLoc dl, SDVTList VTList,
4183 const SDValue *Ops, unsigned NumOps,
4184 EVT MemVT, MachineMemOperand *MMO) {
4185 assert((Opcode == ISD::INTRINSIC_VOID ||
4186 Opcode == ISD::INTRINSIC_W_CHAIN ||
4187 Opcode == ISD::PREFETCH ||
4188 Opcode == ISD::LIFETIME_START ||
4189 Opcode == ISD::LIFETIME_END ||
4190 (Opcode <= INT_MAX &&
4191 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4192 "Opcode is not a memory-accessing opcode!");
4194 // Memoize the node unless it returns a flag.
4195 MemIntrinsicSDNode *N;
4196 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4197 FoldingSetNodeID ID;
4198 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4199 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4201 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4202 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4203 return SDValue(E, 0);
4206 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4208 CSEMap.InsertNode(N, IP);
4210 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl, VTList, Ops, NumOps,
4213 AllNodes.push_back(N);
4214 return SDValue(N, 0);
4217 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4218 /// MachinePointerInfo record from it. This is particularly useful because the
4219 /// code generator has many cases where it doesn't bother passing in a
4220 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4221 static MachinePointerInfo InferPointerInfo(SDValue Ptr, int64_t Offset = 0) {
4222 // If this is FI+Offset, we can model it.
4223 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4224 return MachinePointerInfo::getFixedStack(FI->getIndex(), Offset);
4226 // If this is (FI+Offset1)+Offset2, we can model it.
4227 if (Ptr.getOpcode() != ISD::ADD ||
4228 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4229 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4230 return MachinePointerInfo();
4232 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4233 return MachinePointerInfo::getFixedStack(FI, Offset+
4234 cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4237 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4238 /// MachinePointerInfo record from it. This is particularly useful because the
4239 /// code generator has many cases where it doesn't bother passing in a
4240 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4241 static MachinePointerInfo InferPointerInfo(SDValue Ptr, SDValue OffsetOp) {
4242 // If the 'Offset' value isn't a constant, we can't handle this.
4243 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
4244 return InferPointerInfo(Ptr, OffsetNode->getSExtValue());
4245 if (OffsetOp.getOpcode() == ISD::UNDEF)
4246 return InferPointerInfo(Ptr);
4247 return MachinePointerInfo();
4252 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4253 EVT VT, DebugLoc dl, SDValue Chain,
4254 SDValue Ptr, SDValue Offset,
4255 MachinePointerInfo PtrInfo, EVT MemVT,
4256 bool isVolatile, bool isNonTemporal, bool isInvariant,
4257 unsigned Alignment, const MDNode *TBAAInfo,
4258 const MDNode *Ranges) {
4259 assert(Chain.getValueType() == MVT::Other &&
4260 "Invalid chain type");
4261 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4262 Alignment = getEVTAlignment(VT);
4264 unsigned Flags = MachineMemOperand::MOLoad;
4266 Flags |= MachineMemOperand::MOVolatile;
4268 Flags |= MachineMemOperand::MONonTemporal;
4270 Flags |= MachineMemOperand::MOInvariant;
4272 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
4275 PtrInfo = InferPointerInfo(Ptr, Offset);
4277 MachineFunction &MF = getMachineFunction();
4278 MachineMemOperand *MMO =
4279 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
4281 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
4285 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
4286 EVT VT, DebugLoc dl, SDValue Chain,
4287 SDValue Ptr, SDValue Offset, EVT MemVT,
4288 MachineMemOperand *MMO) {
4290 ExtType = ISD::NON_EXTLOAD;
4291 } else if (ExtType == ISD::NON_EXTLOAD) {
4292 assert(VT == MemVT && "Non-extending load from different memory type!");
4295 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
4296 "Should only be an extending load, not truncating!");
4297 assert(VT.isInteger() == MemVT.isInteger() &&
4298 "Cannot convert from FP to Int or Int -> FP!");
4299 assert(VT.isVector() == MemVT.isVector() &&
4300 "Cannot use trunc store to convert to or from a vector!");
4301 assert((!VT.isVector() ||
4302 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
4303 "Cannot use trunc store to change the number of vector elements!");
4306 bool Indexed = AM != ISD::UNINDEXED;
4307 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
4308 "Unindexed load with an offset!");
4310 SDVTList VTs = Indexed ?
4311 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
4312 SDValue Ops[] = { Chain, Ptr, Offset };
4313 FoldingSetNodeID ID;
4314 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops, 3);
4315 ID.AddInteger(MemVT.getRawBits());
4316 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
4317 MMO->isNonTemporal(),
4318 MMO->isInvariant()));
4319 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4321 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4322 cast<LoadSDNode>(E)->refineAlignment(MMO);
4323 return SDValue(E, 0);
4325 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl, VTs, AM, ExtType,
4327 CSEMap.InsertNode(N, IP);
4328 AllNodes.push_back(N);
4329 return SDValue(N, 0);
4332 SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
4333 SDValue Chain, SDValue Ptr,
4334 MachinePointerInfo PtrInfo,
4335 bool isVolatile, bool isNonTemporal,
4336 bool isInvariant, unsigned Alignment,
4337 const MDNode *TBAAInfo,
4338 const MDNode *Ranges) {
4339 SDValue Undef = getUNDEF(Ptr.getValueType());
4340 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
4341 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
4345 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
4346 SDValue Chain, SDValue Ptr,
4347 MachinePointerInfo PtrInfo, EVT MemVT,
4348 bool isVolatile, bool isNonTemporal,
4349 unsigned Alignment, const MDNode *TBAAInfo) {
4350 SDValue Undef = getUNDEF(Ptr.getValueType());
4351 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
4352 PtrInfo, MemVT, isVolatile, isNonTemporal, false, Alignment,
4358 SelectionDAG::getIndexedLoad(SDValue OrigLoad, DebugLoc dl, SDValue Base,
4359 SDValue Offset, ISD::MemIndexedMode AM) {
4360 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
4361 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
4362 "Load is already a indexed load!");
4363 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
4364 LD->getChain(), Base, Offset, LD->getPointerInfo(),
4365 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
4366 false, LD->getAlignment());
4369 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4370 SDValue Ptr, MachinePointerInfo PtrInfo,
4371 bool isVolatile, bool isNonTemporal,
4372 unsigned Alignment, const MDNode *TBAAInfo) {
4373 assert(Chain.getValueType() == MVT::Other &&
4374 "Invalid chain type");
4375 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4376 Alignment = getEVTAlignment(Val.getValueType());
4378 unsigned Flags = MachineMemOperand::MOStore;
4380 Flags |= MachineMemOperand::MOVolatile;
4382 Flags |= MachineMemOperand::MONonTemporal;
4385 PtrInfo = InferPointerInfo(Ptr);
4387 MachineFunction &MF = getMachineFunction();
4388 MachineMemOperand *MMO =
4389 MF.getMachineMemOperand(PtrInfo, Flags,
4390 Val.getValueType().getStoreSize(), Alignment,
4393 return getStore(Chain, dl, Val, Ptr, MMO);
4396 SDValue SelectionDAG::getStore(SDValue Chain, DebugLoc dl, SDValue Val,
4397 SDValue Ptr, MachineMemOperand *MMO) {
4398 assert(Chain.getValueType() == MVT::Other &&
4399 "Invalid chain type");
4400 EVT VT = Val.getValueType();
4401 SDVTList VTs = getVTList(MVT::Other);
4402 SDValue Undef = getUNDEF(Ptr.getValueType());
4403 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4404 FoldingSetNodeID ID;
4405 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4406 ID.AddInteger(VT.getRawBits());
4407 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
4408 MMO->isNonTemporal(), MMO->isInvariant()));
4409 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4411 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4412 cast<StoreSDNode>(E)->refineAlignment(MMO);
4413 return SDValue(E, 0);
4415 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4417 CSEMap.InsertNode(N, IP);
4418 AllNodes.push_back(N);
4419 return SDValue(N, 0);
4422 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4423 SDValue Ptr, MachinePointerInfo PtrInfo,
4424 EVT SVT,bool isVolatile, bool isNonTemporal,
4426 const MDNode *TBAAInfo) {
4427 assert(Chain.getValueType() == MVT::Other &&
4428 "Invalid chain type");
4429 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4430 Alignment = getEVTAlignment(SVT);
4432 unsigned Flags = MachineMemOperand::MOStore;
4434 Flags |= MachineMemOperand::MOVolatile;
4436 Flags |= MachineMemOperand::MONonTemporal;
4439 PtrInfo = InferPointerInfo(Ptr);
4441 MachineFunction &MF = getMachineFunction();
4442 MachineMemOperand *MMO =
4443 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
4446 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
4449 SDValue SelectionDAG::getTruncStore(SDValue Chain, DebugLoc dl, SDValue Val,
4450 SDValue Ptr, EVT SVT,
4451 MachineMemOperand *MMO) {
4452 EVT VT = Val.getValueType();
4454 assert(Chain.getValueType() == MVT::Other &&
4455 "Invalid chain type");
4457 return getStore(Chain, dl, Val, Ptr, MMO);
4459 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
4460 "Should only be a truncating store, not extending!");
4461 assert(VT.isInteger() == SVT.isInteger() &&
4462 "Can't do FP-INT conversion!");
4463 assert(VT.isVector() == SVT.isVector() &&
4464 "Cannot use trunc store to convert to or from a vector!");
4465 assert((!VT.isVector() ||
4466 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
4467 "Cannot use trunc store to change the number of vector elements!");
4469 SDVTList VTs = getVTList(MVT::Other);
4470 SDValue Undef = getUNDEF(Ptr.getValueType());
4471 SDValue Ops[] = { Chain, Val, Ptr, Undef };
4472 FoldingSetNodeID ID;
4473 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4474 ID.AddInteger(SVT.getRawBits());
4475 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
4476 MMO->isNonTemporal(), MMO->isInvariant()));
4477 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4479 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
4480 cast<StoreSDNode>(E)->refineAlignment(MMO);
4481 return SDValue(E, 0);
4483 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, ISD::UNINDEXED,
4485 CSEMap.InsertNode(N, IP);
4486 AllNodes.push_back(N);
4487 return SDValue(N, 0);
4491 SelectionDAG::getIndexedStore(SDValue OrigStore, DebugLoc dl, SDValue Base,
4492 SDValue Offset, ISD::MemIndexedMode AM) {
4493 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
4494 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
4495 "Store is already a indexed store!");
4496 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
4497 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
4498 FoldingSetNodeID ID;
4499 AddNodeIDNode(ID, ISD::STORE, VTs, Ops, 4);
4500 ID.AddInteger(ST->getMemoryVT().getRawBits());
4501 ID.AddInteger(ST->getRawSubclassData());
4502 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
4504 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4505 return SDValue(E, 0);
4507 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl, VTs, AM,
4508 ST->isTruncatingStore(),
4510 ST->getMemOperand());
4511 CSEMap.InsertNode(N, IP);
4512 AllNodes.push_back(N);
4513 return SDValue(N, 0);
4516 SDValue SelectionDAG::getVAArg(EVT VT, DebugLoc dl,
4517 SDValue Chain, SDValue Ptr,
4520 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, MVT::i32) };
4521 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops, 4);
4524 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4525 const SDUse *Ops, unsigned NumOps) {
4527 case 0: return getNode(Opcode, DL, VT);
4528 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4529 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4530 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4534 // Copy from an SDUse array into an SDValue array for use with
4535 // the regular getNode logic.
4536 SmallVector<SDValue, 8> NewOps(Ops, Ops + NumOps);
4537 return getNode(Opcode, DL, VT, &NewOps[0], NumOps);
4540 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT,
4541 const SDValue *Ops, unsigned NumOps) {
4543 case 0: return getNode(Opcode, DL, VT);
4544 case 1: return getNode(Opcode, DL, VT, Ops[0]);
4545 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
4546 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
4552 case ISD::SELECT_CC: {
4553 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
4554 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
4555 "LHS and RHS of condition must have same type!");
4556 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4557 "True and False arms of SelectCC must have same type!");
4558 assert(Ops[2].getValueType() == VT &&
4559 "select_cc node must be of same type as true and false value!");
4563 assert(NumOps == 5 && "BR_CC takes 5 operands!");
4564 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
4565 "LHS/RHS of comparison should match types!");
4572 SDVTList VTs = getVTList(VT);
4574 if (VT != MVT::Glue) {
4575 FoldingSetNodeID ID;
4576 AddNodeIDNode(ID, Opcode, VTs, Ops, NumOps);
4579 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4580 return SDValue(E, 0);
4582 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4583 CSEMap.InsertNode(N, IP);
4585 N = new (NodeAllocator) SDNode(Opcode, DL, VTs, Ops, NumOps);
4588 AllNodes.push_back(N);
4592 return SDValue(N, 0);
4595 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4596 const std::vector<EVT> &ResultTys,
4597 const SDValue *Ops, unsigned NumOps) {
4598 return getNode(Opcode, DL, getVTList(&ResultTys[0], ResultTys.size()),
4602 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL,
4603 const EVT *VTs, unsigned NumVTs,
4604 const SDValue *Ops, unsigned NumOps) {
4606 return getNode(Opcode, DL, VTs[0], Ops, NumOps);
4607 return getNode(Opcode, DL, makeVTList(VTs, NumVTs), Ops, NumOps);
4610 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4611 const SDValue *Ops, unsigned NumOps) {
4612 if (VTList.NumVTs == 1)
4613 return getNode(Opcode, DL, VTList.VTs[0], Ops, NumOps);
4617 // FIXME: figure out how to safely handle things like
4618 // int foo(int x) { return 1 << (x & 255); }
4619 // int bar() { return foo(256); }
4620 case ISD::SRA_PARTS:
4621 case ISD::SRL_PARTS:
4622 case ISD::SHL_PARTS:
4623 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
4624 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
4625 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4626 else if (N3.getOpcode() == ISD::AND)
4627 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
4628 // If the and is only masking out bits that cannot effect the shift,
4629 // eliminate the and.
4630 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
4631 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
4632 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
4638 // Memoize the node unless it returns a flag.
4640 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4641 FoldingSetNodeID ID;
4642 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
4644 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
4645 return SDValue(E, 0);
4648 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4649 } else if (NumOps == 2) {
4650 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4651 } else if (NumOps == 3) {
4652 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4655 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4657 CSEMap.InsertNode(N, IP);
4660 N = new (NodeAllocator) UnarySDNode(Opcode, DL, VTList, Ops[0]);
4661 } else if (NumOps == 2) {
4662 N = new (NodeAllocator) BinarySDNode(Opcode, DL, VTList, Ops[0], Ops[1]);
4663 } else if (NumOps == 3) {
4664 N = new (NodeAllocator) TernarySDNode(Opcode, DL, VTList, Ops[0], Ops[1],
4667 N = new (NodeAllocator) SDNode(Opcode, DL, VTList, Ops, NumOps);
4670 AllNodes.push_back(N);
4674 return SDValue(N, 0);
4677 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList) {
4678 return getNode(Opcode, DL, VTList, 0, 0);
4681 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4683 SDValue Ops[] = { N1 };
4684 return getNode(Opcode, DL, VTList, Ops, 1);
4687 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4688 SDValue N1, SDValue N2) {
4689 SDValue Ops[] = { N1, N2 };
4690 return getNode(Opcode, DL, VTList, Ops, 2);
4693 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4694 SDValue N1, SDValue N2, SDValue N3) {
4695 SDValue Ops[] = { N1, N2, N3 };
4696 return getNode(Opcode, DL, VTList, Ops, 3);
4699 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4700 SDValue N1, SDValue N2, SDValue N3,
4702 SDValue Ops[] = { N1, N2, N3, N4 };
4703 return getNode(Opcode, DL, VTList, Ops, 4);
4706 SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList,
4707 SDValue N1, SDValue N2, SDValue N3,
4708 SDValue N4, SDValue N5) {
4709 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4710 return getNode(Opcode, DL, VTList, Ops, 5);
4713 SDVTList SelectionDAG::getVTList(EVT VT) {
4714 return makeVTList(SDNode::getValueTypeList(VT), 1);
4717 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
4718 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4719 E = VTList.rend(); I != E; ++I)
4720 if (I->NumVTs == 2 && I->VTs[0] == VT1 && I->VTs[1] == VT2)
4723 EVT *Array = Allocator.Allocate<EVT>(2);
4726 SDVTList Result = makeVTList(Array, 2);
4727 VTList.push_back(Result);
4731 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
4732 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4733 E = VTList.rend(); I != E; ++I)
4734 if (I->NumVTs == 3 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4738 EVT *Array = Allocator.Allocate<EVT>(3);
4742 SDVTList Result = makeVTList(Array, 3);
4743 VTList.push_back(Result);
4747 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
4748 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4749 E = VTList.rend(); I != E; ++I)
4750 if (I->NumVTs == 4 && I->VTs[0] == VT1 && I->VTs[1] == VT2 &&
4751 I->VTs[2] == VT3 && I->VTs[3] == VT4)
4754 EVT *Array = Allocator.Allocate<EVT>(4);
4759 SDVTList Result = makeVTList(Array, 4);
4760 VTList.push_back(Result);
4764 SDVTList SelectionDAG::getVTList(const EVT *VTs, unsigned NumVTs) {
4766 case 0: llvm_unreachable("Cannot have nodes without results!");
4767 case 1: return getVTList(VTs[0]);
4768 case 2: return getVTList(VTs[0], VTs[1]);
4769 case 3: return getVTList(VTs[0], VTs[1], VTs[2]);
4770 case 4: return getVTList(VTs[0], VTs[1], VTs[2], VTs[3]);
4774 for (std::vector<SDVTList>::reverse_iterator I = VTList.rbegin(),
4775 E = VTList.rend(); I != E; ++I) {
4776 if (I->NumVTs != NumVTs || VTs[0] != I->VTs[0] || VTs[1] != I->VTs[1])
4779 if (std::equal(&VTs[2], &VTs[NumVTs], &I->VTs[2]))
4783 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
4784 std::copy(VTs, VTs+NumVTs, Array);
4785 SDVTList Result = makeVTList(Array, NumVTs);
4786 VTList.push_back(Result);
4791 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
4792 /// specified operands. If the resultant node already exists in the DAG,
4793 /// this does not modify the specified node, instead it returns the node that
4794 /// already exists. If the resultant node does not exist in the DAG, the
4795 /// input node is returned. As a degenerate case, if you specify the same
4796 /// input operands as the node already has, the input node is returned.
4797 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
4798 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
4800 // Check to see if there is no change.
4801 if (Op == N->getOperand(0)) return N;
4803 // See if the modified node already exists.
4804 void *InsertPos = 0;
4805 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
4808 // Nope it doesn't. Remove the node from its current place in the maps.
4810 if (!RemoveNodeFromCSEMaps(N))
4813 // Now we update the operands.
4814 N->OperandList[0].set(Op);
4816 // If this gets put into a CSE map, add it.
4817 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4821 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
4822 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
4824 // Check to see if there is no change.
4825 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
4826 return N; // No operands changed, just return the input node.
4828 // See if the modified node already exists.
4829 void *InsertPos = 0;
4830 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
4833 // Nope it doesn't. Remove the node from its current place in the maps.
4835 if (!RemoveNodeFromCSEMaps(N))
4838 // Now we update the operands.
4839 if (N->OperandList[0] != Op1)
4840 N->OperandList[0].set(Op1);
4841 if (N->OperandList[1] != Op2)
4842 N->OperandList[1].set(Op2);
4844 // If this gets put into a CSE map, add it.
4845 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4849 SDNode *SelectionDAG::
4850 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
4851 SDValue Ops[] = { Op1, Op2, Op3 };
4852 return UpdateNodeOperands(N, Ops, 3);
4855 SDNode *SelectionDAG::
4856 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4857 SDValue Op3, SDValue Op4) {
4858 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
4859 return UpdateNodeOperands(N, Ops, 4);
4862 SDNode *SelectionDAG::
4863 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
4864 SDValue Op3, SDValue Op4, SDValue Op5) {
4865 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
4866 return UpdateNodeOperands(N, Ops, 5);
4869 SDNode *SelectionDAG::
4870 UpdateNodeOperands(SDNode *N, const SDValue *Ops, unsigned NumOps) {
4871 assert(N->getNumOperands() == NumOps &&
4872 "Update with wrong number of operands");
4874 // Check to see if there is no change.
4875 bool AnyChange = false;
4876 for (unsigned i = 0; i != NumOps; ++i) {
4877 if (Ops[i] != N->getOperand(i)) {
4883 // No operands changed, just return the input node.
4884 if (!AnyChange) return N;
4886 // See if the modified node already exists.
4887 void *InsertPos = 0;
4888 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, NumOps, InsertPos))
4891 // Nope it doesn't. Remove the node from its current place in the maps.
4893 if (!RemoveNodeFromCSEMaps(N))
4896 // Now we update the operands.
4897 for (unsigned i = 0; i != NumOps; ++i)
4898 if (N->OperandList[i] != Ops[i])
4899 N->OperandList[i].set(Ops[i]);
4901 // If this gets put into a CSE map, add it.
4902 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
4906 /// DropOperands - Release the operands and set this node to have
4908 void SDNode::DropOperands() {
4909 // Unlike the code in MorphNodeTo that does this, we don't need to
4910 // watch for dead nodes here.
4911 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
4917 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
4920 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4922 SDVTList VTs = getVTList(VT);
4923 return SelectNodeTo(N, MachineOpc, VTs, 0, 0);
4926 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4927 EVT VT, SDValue Op1) {
4928 SDVTList VTs = getVTList(VT);
4929 SDValue Ops[] = { Op1 };
4930 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4933 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4934 EVT VT, SDValue Op1,
4936 SDVTList VTs = getVTList(VT);
4937 SDValue Ops[] = { Op1, Op2 };
4938 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4941 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4942 EVT VT, SDValue Op1,
4943 SDValue Op2, SDValue Op3) {
4944 SDVTList VTs = getVTList(VT);
4945 SDValue Ops[] = { Op1, Op2, Op3 };
4946 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
4949 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4950 EVT VT, const SDValue *Ops,
4952 SDVTList VTs = getVTList(VT);
4953 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4956 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4957 EVT VT1, EVT VT2, const SDValue *Ops,
4959 SDVTList VTs = getVTList(VT1, VT2);
4960 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4963 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4965 SDVTList VTs = getVTList(VT1, VT2);
4966 return SelectNodeTo(N, MachineOpc, VTs, (SDValue *)0, 0);
4969 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4970 EVT VT1, EVT VT2, EVT VT3,
4971 const SDValue *Ops, unsigned NumOps) {
4972 SDVTList VTs = getVTList(VT1, VT2, VT3);
4973 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4976 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4977 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
4978 const SDValue *Ops, unsigned NumOps) {
4979 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
4980 return SelectNodeTo(N, MachineOpc, VTs, Ops, NumOps);
4983 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4986 SDVTList VTs = getVTList(VT1, VT2);
4987 SDValue Ops[] = { Op1 };
4988 return SelectNodeTo(N, MachineOpc, VTs, Ops, 1);
4991 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
4993 SDValue Op1, SDValue Op2) {
4994 SDVTList VTs = getVTList(VT1, VT2);
4995 SDValue Ops[] = { Op1, Op2 };
4996 return SelectNodeTo(N, MachineOpc, VTs, Ops, 2);
4999 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5001 SDValue Op1, SDValue Op2,
5003 SDVTList VTs = getVTList(VT1, VT2);
5004 SDValue Ops[] = { Op1, Op2, Op3 };
5005 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5008 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5009 EVT VT1, EVT VT2, EVT VT3,
5010 SDValue Op1, SDValue Op2,
5012 SDVTList VTs = getVTList(VT1, VT2, VT3);
5013 SDValue Ops[] = { Op1, Op2, Op3 };
5014 return SelectNodeTo(N, MachineOpc, VTs, Ops, 3);
5017 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5018 SDVTList VTs, const SDValue *Ops,
5020 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops, NumOps);
5021 // Reset the NodeID to -1.
5026 /// UpdadeDebugLocOnMergedSDNode - If the opt level is -O0 then it throws away
5027 /// the line number information on the merged node since it is not possible to
5028 /// preserve the information that operation is associated with multiple lines.
5029 /// This will make the debugger working better at -O0, were there is a higher
5030 /// probability having other instructions associated with that line.
5032 SDNode *SelectionDAG::UpdadeDebugLocOnMergedSDNode(SDNode *N, DebugLoc OLoc) {
5033 DebugLoc NLoc = N->getDebugLoc();
5034 if (!(NLoc.isUnknown()) && (OptLevel == CodeGenOpt::None) && (OLoc != NLoc)) {
5035 N->setDebugLoc(DebugLoc());
5040 /// MorphNodeTo - This *mutates* the specified node to have the specified
5041 /// return type, opcode, and operands.
5043 /// Note that MorphNodeTo returns the resultant node. If there is already a
5044 /// node of the specified opcode and operands, it returns that node instead of
5045 /// the current one. Note that the DebugLoc need not be the same.
5047 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5048 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5049 /// node, and because it doesn't require CSE recalculation for any of
5050 /// the node's users.
5052 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5053 SDVTList VTs, const SDValue *Ops,
5055 // If an identical node already exists, use it.
5057 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5058 FoldingSetNodeID ID;
5059 AddNodeIDNode(ID, Opc, VTs, Ops, NumOps);
5060 if (SDNode *ON = CSEMap.FindNodeOrInsertPos(ID, IP))
5061 return UpdadeDebugLocOnMergedSDNode(ON, N->getDebugLoc());
5064 if (!RemoveNodeFromCSEMaps(N))
5067 // Start the morphing.
5069 N->ValueList = VTs.VTs;
5070 N->NumValues = VTs.NumVTs;
5072 // Clear the operands list, updating used nodes to remove this from their
5073 // use list. Keep track of any operands that become dead as a result.
5074 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5075 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5077 SDNode *Used = Use.getNode();
5079 if (Used->use_empty())
5080 DeadNodeSet.insert(Used);
5083 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5084 // Initialize the memory references information.
5085 MN->setMemRefs(0, 0);
5086 // If NumOps is larger than the # of operands we can have in a
5087 // MachineSDNode, reallocate the operand list.
5088 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5089 if (MN->OperandsNeedDelete)
5090 delete[] MN->OperandList;
5091 if (NumOps > array_lengthof(MN->LocalOperands))
5092 // We're creating a final node that will live unmorphed for the
5093 // remainder of the current SelectionDAG iteration, so we can allocate
5094 // the operands directly out of a pool with no recycling metadata.
5095 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5098 MN->InitOperands(MN->LocalOperands, Ops, NumOps);
5099 MN->OperandsNeedDelete = false;
5101 MN->InitOperands(MN->OperandList, Ops, NumOps);
5103 // If NumOps is larger than the # of operands we currently have, reallocate
5104 // the operand list.
5105 if (NumOps > N->NumOperands) {
5106 if (N->OperandsNeedDelete)
5107 delete[] N->OperandList;
5108 N->InitOperands(new SDUse[NumOps], Ops, NumOps);
5109 N->OperandsNeedDelete = true;
5111 N->InitOperands(N->OperandList, Ops, NumOps);
5114 // Delete any nodes that are still dead after adding the uses for the
5116 if (!DeadNodeSet.empty()) {
5117 SmallVector<SDNode *, 16> DeadNodes;
5118 for (SmallPtrSet<SDNode *, 16>::iterator I = DeadNodeSet.begin(),
5119 E = DeadNodeSet.end(); I != E; ++I)
5120 if ((*I)->use_empty())
5121 DeadNodes.push_back(*I);
5122 RemoveDeadNodes(DeadNodes);
5126 CSEMap.InsertNode(N, IP); // Memoize the new node.
5131 /// getMachineNode - These are used for target selectors to create a new node
5132 /// with specified return type(s), MachineInstr opcode, and operands.
5134 /// Note that getMachineNode returns the resultant node. If there is already a
5135 /// node of the specified opcode and operands, it returns that node instead of
5136 /// the current one.
5138 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
5139 SDVTList VTs = getVTList(VT);
5140 return getMachineNode(Opcode, dl, VTs, 0, 0);
5144 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
5145 SDVTList VTs = getVTList(VT);
5146 SDValue Ops[] = { Op1 };
5147 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5151 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5152 SDValue Op1, SDValue Op2) {
5153 SDVTList VTs = getVTList(VT);
5154 SDValue Ops[] = { Op1, Op2 };
5155 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5159 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5160 SDValue Op1, SDValue Op2, SDValue Op3) {
5161 SDVTList VTs = getVTList(VT);
5162 SDValue Ops[] = { Op1, Op2, Op3 };
5163 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5167 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
5168 const SDValue *Ops, unsigned NumOps) {
5169 SDVTList VTs = getVTList(VT);
5170 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5174 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
5175 SDVTList VTs = getVTList(VT1, VT2);
5176 return getMachineNode(Opcode, dl, VTs, 0, 0);
5180 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5181 EVT VT1, EVT VT2, SDValue Op1) {
5182 SDVTList VTs = getVTList(VT1, VT2);
5183 SDValue Ops[] = { Op1 };
5184 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5188 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5189 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
5190 SDVTList VTs = getVTList(VT1, VT2);
5191 SDValue Ops[] = { Op1, Op2 };
5192 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5196 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5197 EVT VT1, EVT VT2, SDValue Op1,
5198 SDValue Op2, SDValue Op3) {
5199 SDVTList VTs = getVTList(VT1, VT2);
5200 SDValue Ops[] = { Op1, Op2, Op3 };
5201 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5205 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5207 const SDValue *Ops, unsigned NumOps) {
5208 SDVTList VTs = getVTList(VT1, VT2);
5209 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5213 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5214 EVT VT1, EVT VT2, EVT VT3,
5215 SDValue Op1, SDValue Op2) {
5216 SDVTList VTs = getVTList(VT1, VT2, VT3);
5217 SDValue Ops[] = { Op1, Op2 };
5218 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5222 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5223 EVT VT1, EVT VT2, EVT VT3,
5224 SDValue Op1, SDValue Op2, SDValue Op3) {
5225 SDVTList VTs = getVTList(VT1, VT2, VT3);
5226 SDValue Ops[] = { Op1, Op2, Op3 };
5227 return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
5231 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5232 EVT VT1, EVT VT2, EVT VT3,
5233 const SDValue *Ops, unsigned NumOps) {
5234 SDVTList VTs = getVTList(VT1, VT2, VT3);
5235 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5239 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
5240 EVT VT2, EVT VT3, EVT VT4,
5241 const SDValue *Ops, unsigned NumOps) {
5242 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5243 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5247 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
5248 const std::vector<EVT> &ResultTys,
5249 const SDValue *Ops, unsigned NumOps) {
5250 SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
5251 return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
5255 SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
5256 const SDValue *Ops, unsigned NumOps) {
5257 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
5262 FoldingSetNodeID ID;
5263 AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
5265 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP)) {
5266 return cast<MachineSDNode>(UpdadeDebugLocOnMergedSDNode(E, DL));
5270 // Allocate a new MachineSDNode.
5271 N = new (NodeAllocator) MachineSDNode(~Opcode, DL, VTs);
5273 // Initialize the operands list.
5274 if (NumOps > array_lengthof(N->LocalOperands))
5275 // We're creating a final node that will live unmorphed for the
5276 // remainder of the current SelectionDAG iteration, so we can allocate
5277 // the operands directly out of a pool with no recycling metadata.
5278 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5281 N->InitOperands(N->LocalOperands, Ops, NumOps);
5282 N->OperandsNeedDelete = false;
5285 CSEMap.InsertNode(N, IP);
5287 AllNodes.push_back(N);
5289 VerifyMachineNode(N);
5294 /// getTargetExtractSubreg - A convenience function for creating
5295 /// TargetOpcode::EXTRACT_SUBREG nodes.
5297 SelectionDAG::getTargetExtractSubreg(int SRIdx, DebugLoc DL, EVT VT,
5299 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5300 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
5301 VT, Operand, SRIdxVal);
5302 return SDValue(Subreg, 0);
5305 /// getTargetInsertSubreg - A convenience function for creating
5306 /// TargetOpcode::INSERT_SUBREG nodes.
5308 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
5309 SDValue Operand, SDValue Subreg) {
5310 SDValue SRIdxVal = getTargetConstant(SRIdx, MVT::i32);
5311 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
5312 VT, Operand, Subreg, SRIdxVal);
5313 return SDValue(Result, 0);
5316 /// getNodeIfExists - Get the specified node if it's already available, or
5317 /// else return NULL.
5318 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
5319 const SDValue *Ops, unsigned NumOps) {
5320 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5321 FoldingSetNodeID ID;
5322 AddNodeIDNode(ID, Opcode, VTList, Ops, NumOps);
5324 if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
5330 /// getDbgValue - Creates a SDDbgValue node.
5333 SelectionDAG::getDbgValue(MDNode *MDPtr, SDNode *N, unsigned R, uint64_t Off,
5334 DebugLoc DL, unsigned O) {
5335 return new (Allocator) SDDbgValue(MDPtr, N, R, Off, DL, O);
5339 SelectionDAG::getDbgValue(MDNode *MDPtr, const Value *C, uint64_t Off,
5340 DebugLoc DL, unsigned O) {
5341 return new (Allocator) SDDbgValue(MDPtr, C, Off, DL, O);
5345 SelectionDAG::getDbgValue(MDNode *MDPtr, unsigned FI, uint64_t Off,
5346 DebugLoc DL, unsigned O) {
5347 return new (Allocator) SDDbgValue(MDPtr, FI, Off, DL, O);
5352 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
5353 /// pointed to by a use iterator is deleted, increment the use iterator
5354 /// so that it doesn't dangle.
5356 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
5357 SDNode::use_iterator &UI;
5358 SDNode::use_iterator &UE;
5360 virtual void NodeDeleted(SDNode *N, SDNode *E) {
5361 // Increment the iterator as needed.
5362 while (UI != UE && N == *UI)
5367 RAUWUpdateListener(SelectionDAG &d,
5368 SDNode::use_iterator &ui,
5369 SDNode::use_iterator &ue)
5370 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
5375 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5376 /// This can cause recursive merging of nodes in the DAG.
5378 /// This version assumes From has a single result value.
5380 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
5381 SDNode *From = FromN.getNode();
5382 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
5383 "Cannot replace with this method!");
5384 assert(From != To.getNode() && "Cannot replace uses of with self");
5386 // Iterate over all the existing uses of From. New uses will be added
5387 // to the beginning of the use list, which we avoid visiting.
5388 // This specifically avoids visiting uses of From that arise while the
5389 // replacement is happening, because any such uses would be the result
5390 // of CSE: If an existing node looks like From after one of its operands
5391 // is replaced by To, we don't want to replace of all its users with To
5392 // too. See PR3018 for more info.
5393 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5394 RAUWUpdateListener Listener(*this, UI, UE);
5398 // This node is about to morph, remove its old self from the CSE maps.
5399 RemoveNodeFromCSEMaps(User);
5401 // A user can appear in a use list multiple times, and when this
5402 // happens the uses are usually next to each other in the list.
5403 // To help reduce the number of CSE recomputations, process all
5404 // the uses of this user that we can find this way.
5406 SDUse &Use = UI.getUse();
5409 } while (UI != UE && *UI == User);
5411 // Now that we have modified User, add it back to the CSE maps. If it
5412 // already exists there, recursively merge the results together.
5413 AddModifiedNodeToCSEMaps(User);
5416 // If we just RAUW'd the root, take note.
5417 if (FromN == getRoot())
5421 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5422 /// This can cause recursive merging of nodes in the DAG.
5424 /// This version assumes that for each value of From, there is a
5425 /// corresponding value in To in the same position with the same type.
5427 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
5429 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
5430 assert((!From->hasAnyUseOfValue(i) ||
5431 From->getValueType(i) == To->getValueType(i)) &&
5432 "Cannot use this version of ReplaceAllUsesWith!");
5435 // Handle the trivial case.
5439 // Iterate over just the existing users of From. See the comments in
5440 // the ReplaceAllUsesWith above.
5441 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5442 RAUWUpdateListener Listener(*this, UI, UE);
5446 // This node is about to morph, remove its old self from the CSE maps.
5447 RemoveNodeFromCSEMaps(User);
5449 // A user can appear in a use list multiple times, and when this
5450 // happens the uses are usually next to each other in the list.
5451 // To help reduce the number of CSE recomputations, process all
5452 // the uses of this user that we can find this way.
5454 SDUse &Use = UI.getUse();
5457 } while (UI != UE && *UI == User);
5459 // Now that we have modified User, add it back to the CSE maps. If it
5460 // already exists there, recursively merge the results together.
5461 AddModifiedNodeToCSEMaps(User);
5464 // If we just RAUW'd the root, take note.
5465 if (From == getRoot().getNode())
5466 setRoot(SDValue(To, getRoot().getResNo()));
5469 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
5470 /// This can cause recursive merging of nodes in the DAG.
5472 /// This version can replace From with any result values. To must match the
5473 /// number and types of values returned by From.
5474 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
5475 if (From->getNumValues() == 1) // Handle the simple case efficiently.
5476 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
5478 // Iterate over just the existing users of From. See the comments in
5479 // the ReplaceAllUsesWith above.
5480 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
5481 RAUWUpdateListener Listener(*this, UI, UE);
5485 // This node is about to morph, remove its old self from the CSE maps.
5486 RemoveNodeFromCSEMaps(User);
5488 // A user can appear in a use list multiple times, and when this
5489 // happens the uses are usually next to each other in the list.
5490 // To help reduce the number of CSE recomputations, process all
5491 // the uses of this user that we can find this way.
5493 SDUse &Use = UI.getUse();
5494 const SDValue &ToOp = To[Use.getResNo()];
5497 } while (UI != UE && *UI == User);
5499 // Now that we have modified User, add it back to the CSE maps. If it
5500 // already exists there, recursively merge the results together.
5501 AddModifiedNodeToCSEMaps(User);
5504 // If we just RAUW'd the root, take note.
5505 if (From == getRoot().getNode())
5506 setRoot(SDValue(To[getRoot().getResNo()]));
5509 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
5510 /// uses of other values produced by From.getNode() alone. The Deleted
5511 /// vector is handled the same way as for ReplaceAllUsesWith.
5512 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
5513 // Handle the really simple, really trivial case efficiently.
5514 if (From == To) return;
5516 // Handle the simple, trivial, case efficiently.
5517 if (From.getNode()->getNumValues() == 1) {
5518 ReplaceAllUsesWith(From, To);
5522 // Iterate over just the existing users of From. See the comments in
5523 // the ReplaceAllUsesWith above.
5524 SDNode::use_iterator UI = From.getNode()->use_begin(),
5525 UE = From.getNode()->use_end();
5526 RAUWUpdateListener Listener(*this, UI, UE);
5529 bool UserRemovedFromCSEMaps = false;
5531 // A user can appear in a use list multiple times, and when this
5532 // happens the uses are usually next to each other in the list.
5533 // To help reduce the number of CSE recomputations, process all
5534 // the uses of this user that we can find this way.
5536 SDUse &Use = UI.getUse();
5538 // Skip uses of different values from the same node.
5539 if (Use.getResNo() != From.getResNo()) {
5544 // If this node hasn't been modified yet, it's still in the CSE maps,
5545 // so remove its old self from the CSE maps.
5546 if (!UserRemovedFromCSEMaps) {
5547 RemoveNodeFromCSEMaps(User);
5548 UserRemovedFromCSEMaps = true;
5553 } while (UI != UE && *UI == User);
5555 // We are iterating over all uses of the From node, so if a use
5556 // doesn't use the specific value, no changes are made.
5557 if (!UserRemovedFromCSEMaps)
5560 // Now that we have modified User, add it back to the CSE maps. If it
5561 // already exists there, recursively merge the results together.
5562 AddModifiedNodeToCSEMaps(User);
5565 // If we just RAUW'd the root, take note.
5566 if (From == getRoot())
5571 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
5572 /// to record information about a use.
5579 /// operator< - Sort Memos by User.
5580 bool operator<(const UseMemo &L, const UseMemo &R) {
5581 return (intptr_t)L.User < (intptr_t)R.User;
5585 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
5586 /// uses of other values produced by From.getNode() alone. The same value
5587 /// may appear in both the From and To list. The Deleted vector is
5588 /// handled the same way as for ReplaceAllUsesWith.
5589 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
5592 // Handle the simple, trivial case efficiently.
5594 return ReplaceAllUsesOfValueWith(*From, *To);
5596 // Read up all the uses and make records of them. This helps
5597 // processing new uses that are introduced during the
5598 // replacement process.
5599 SmallVector<UseMemo, 4> Uses;
5600 for (unsigned i = 0; i != Num; ++i) {
5601 unsigned FromResNo = From[i].getResNo();
5602 SDNode *FromNode = From[i].getNode();
5603 for (SDNode::use_iterator UI = FromNode->use_begin(),
5604 E = FromNode->use_end(); UI != E; ++UI) {
5605 SDUse &Use = UI.getUse();
5606 if (Use.getResNo() == FromResNo) {
5607 UseMemo Memo = { *UI, i, &Use };
5608 Uses.push_back(Memo);
5613 // Sort the uses, so that all the uses from a given User are together.
5614 std::sort(Uses.begin(), Uses.end());
5616 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
5617 UseIndex != UseIndexEnd; ) {
5618 // We know that this user uses some value of From. If it is the right
5619 // value, update it.
5620 SDNode *User = Uses[UseIndex].User;
5622 // This node is about to morph, remove its old self from the CSE maps.
5623 RemoveNodeFromCSEMaps(User);
5625 // The Uses array is sorted, so all the uses for a given User
5626 // are next to each other in the list.
5627 // To help reduce the number of CSE recomputations, process all
5628 // the uses of this user that we can find this way.
5630 unsigned i = Uses[UseIndex].Index;
5631 SDUse &Use = *Uses[UseIndex].Use;
5635 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
5637 // Now that we have modified User, add it back to the CSE maps. If it
5638 // already exists there, recursively merge the results together.
5639 AddModifiedNodeToCSEMaps(User);
5643 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
5644 /// based on their topological order. It returns the maximum id and a vector
5645 /// of the SDNodes* in assigned order by reference.
5646 unsigned SelectionDAG::AssignTopologicalOrder() {
5648 unsigned DAGSize = 0;
5650 // SortedPos tracks the progress of the algorithm. Nodes before it are
5651 // sorted, nodes after it are unsorted. When the algorithm completes
5652 // it is at the end of the list.
5653 allnodes_iterator SortedPos = allnodes_begin();
5655 // Visit all the nodes. Move nodes with no operands to the front of
5656 // the list immediately. Annotate nodes that do have operands with their
5657 // operand count. Before we do this, the Node Id fields of the nodes
5658 // may contain arbitrary values. After, the Node Id fields for nodes
5659 // before SortedPos will contain the topological sort index, and the
5660 // Node Id fields for nodes At SortedPos and after will contain the
5661 // count of outstanding operands.
5662 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
5665 unsigned Degree = N->getNumOperands();
5667 // A node with no uses, add it to the result array immediately.
5668 N->setNodeId(DAGSize++);
5669 allnodes_iterator Q = N;
5671 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
5672 assert(SortedPos != AllNodes.end() && "Overran node list");
5675 // Temporarily use the Node Id as scratch space for the degree count.
5676 N->setNodeId(Degree);
5680 // Visit all the nodes. As we iterate, move nodes into sorted order,
5681 // such that by the time the end is reached all nodes will be sorted.
5682 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ++I) {
5685 // N is in sorted position, so all its uses have one less operand
5686 // that needs to be sorted.
5687 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
5690 unsigned Degree = P->getNodeId();
5691 assert(Degree != 0 && "Invalid node degree");
5694 // All of P's operands are sorted, so P may sorted now.
5695 P->setNodeId(DAGSize++);
5697 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
5698 assert(SortedPos != AllNodes.end() && "Overran node list");
5701 // Update P's outstanding operand count.
5702 P->setNodeId(Degree);
5705 if (I == SortedPos) {
5708 dbgs() << "Overran sorted position:\n";
5711 llvm_unreachable(0);
5715 assert(SortedPos == AllNodes.end() &&
5716 "Topological sort incomplete!");
5717 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
5718 "First node in topological sort is not the entry token!");
5719 assert(AllNodes.front().getNodeId() == 0 &&
5720 "First node in topological sort has non-zero id!");
5721 assert(AllNodes.front().getNumOperands() == 0 &&
5722 "First node in topological sort has operands!");
5723 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
5724 "Last node in topologic sort has unexpected id!");
5725 assert(AllNodes.back().use_empty() &&
5726 "Last node in topologic sort has users!");
5727 assert(DAGSize == allnodes_size() && "Node count mismatch!");
5731 /// AssignOrdering - Assign an order to the SDNode.
5732 void SelectionDAG::AssignOrdering(const SDNode *SD, unsigned Order) {
5733 assert(SD && "Trying to assign an order to a null node!");
5734 Ordering->add(SD, Order);
5737 /// GetOrdering - Get the order for the SDNode.
5738 unsigned SelectionDAG::GetOrdering(const SDNode *SD) const {
5739 assert(SD && "Trying to get the order of a null node!");
5740 return Ordering->getOrder(SD);
5743 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
5744 /// value is produced by SD.
5745 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
5746 DbgInfo->add(DB, SD, isParameter);
5748 SD->setHasDebugValue(true);
5751 /// TransferDbgValues - Transfer SDDbgValues.
5752 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
5753 if (From == To || !From.getNode()->getHasDebugValue())
5755 SDNode *FromNode = From.getNode();
5756 SDNode *ToNode = To.getNode();
5757 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
5758 SmallVector<SDDbgValue *, 2> ClonedDVs;
5759 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
5761 SDDbgValue *Dbg = *I;
5762 if (Dbg->getKind() == SDDbgValue::SDNODE) {
5763 SDDbgValue *Clone = getDbgValue(Dbg->getMDPtr(), ToNode, To.getResNo(),
5764 Dbg->getOffset(), Dbg->getDebugLoc(),
5766 ClonedDVs.push_back(Clone);
5769 for (SmallVector<SDDbgValue *, 2>::iterator I = ClonedDVs.begin(),
5770 E = ClonedDVs.end(); I != E; ++I)
5771 AddDbgValue(*I, ToNode, false);
5774 //===----------------------------------------------------------------------===//
5776 //===----------------------------------------------------------------------===//
5778 HandleSDNode::~HandleSDNode() {
5782 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, DebugLoc DL,
5783 const GlobalValue *GA,
5784 EVT VT, int64_t o, unsigned char TF)
5785 : SDNode(Opc, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
5789 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, EVT memvt,
5790 MachineMemOperand *mmo)
5791 : SDNode(Opc, dl, VTs), MemoryVT(memvt), MMO(mmo) {
5792 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5793 MMO->isNonTemporal(), MMO->isInvariant());
5794 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5795 assert(isNonTemporal() == MMO->isNonTemporal() &&
5796 "Non-temporal encoding error!");
5797 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5800 MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
5801 const SDValue *Ops, unsigned NumOps, EVT memvt,
5802 MachineMemOperand *mmo)
5803 : SDNode(Opc, dl, VTs, Ops, NumOps),
5804 MemoryVT(memvt), MMO(mmo) {
5805 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
5806 MMO->isNonTemporal(), MMO->isInvariant());
5807 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
5808 assert(memvt.getStoreSize() == MMO->getSize() && "Size mismatch!");
5811 /// Profile - Gather unique data for the node.
5813 void SDNode::Profile(FoldingSetNodeID &ID) const {
5814 AddNodeIDNode(ID, this);
5819 std::vector<EVT> VTs;
5822 VTs.reserve(MVT::LAST_VALUETYPE);
5823 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
5824 VTs.push_back(MVT((MVT::SimpleValueType)i));
5829 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
5830 static ManagedStatic<EVTArray> SimpleVTArray;
5831 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
5833 /// getValueTypeList - Return a pointer to the specified value type.
5835 const EVT *SDNode::getValueTypeList(EVT VT) {
5836 if (VT.isExtended()) {
5837 sys::SmartScopedLock<true> Lock(*VTMutex);
5838 return &(*EVTs->insert(VT).first);
5840 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
5841 "Value type out of range!");
5842 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
5846 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
5847 /// indicated value. This method ignores uses of other values defined by this
5849 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
5850 assert(Value < getNumValues() && "Bad value!");
5852 // TODO: Only iterate over uses of a given value of the node
5853 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
5854 if (UI.getUse().getResNo() == Value) {
5861 // Found exactly the right number of uses?
5866 /// hasAnyUseOfValue - Return true if there are any use of the indicated
5867 /// value. This method ignores uses of other values defined by this operation.
5868 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
5869 assert(Value < getNumValues() && "Bad value!");
5871 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
5872 if (UI.getUse().getResNo() == Value)
5879 /// isOnlyUserOf - Return true if this node is the only use of N.
5881 bool SDNode::isOnlyUserOf(SDNode *N) const {
5883 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
5894 /// isOperand - Return true if this node is an operand of N.
5896 bool SDValue::isOperandOf(SDNode *N) const {
5897 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
5898 if (*this == N->getOperand(i))
5903 bool SDNode::isOperandOf(SDNode *N) const {
5904 for (unsigned i = 0, e = N->NumOperands; i != e; ++i)
5905 if (this == N->OperandList[i].getNode())
5910 /// reachesChainWithoutSideEffects - Return true if this operand (which must
5911 /// be a chain) reaches the specified operand without crossing any
5912 /// side-effecting instructions on any chain path. In practice, this looks
5913 /// through token factors and non-volatile loads. In order to remain efficient,
5914 /// this only looks a couple of nodes in, it does not do an exhaustive search.
5915 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
5916 unsigned Depth) const {
5917 if (*this == Dest) return true;
5919 // Don't search too deeply, we just want to be able to see through
5920 // TokenFactor's etc.
5921 if (Depth == 0) return false;
5923 // If this is a token factor, all inputs to the TF happen in parallel. If any
5924 // of the operands of the TF does not reach dest, then we cannot do the xform.
5925 if (getOpcode() == ISD::TokenFactor) {
5926 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
5927 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
5932 // Loads don't have side effects, look through them.
5933 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
5934 if (!Ld->isVolatile())
5935 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
5940 /// hasPredecessor - Return true if N is a predecessor of this node.
5941 /// N is either an operand of this node, or can be reached by recursively
5942 /// traversing up the operands.
5943 /// NOTE: This is an expensive method. Use it carefully.
5944 bool SDNode::hasPredecessor(const SDNode *N) const {
5945 SmallPtrSet<const SDNode *, 32> Visited;
5946 SmallVector<const SDNode *, 16> Worklist;
5947 return hasPredecessorHelper(N, Visited, Worklist);
5950 bool SDNode::hasPredecessorHelper(const SDNode *N,
5951 SmallPtrSet<const SDNode *, 32> &Visited,
5952 SmallVector<const SDNode *, 16> &Worklist) const {
5953 if (Visited.empty()) {
5954 Worklist.push_back(this);
5956 // Take a look in the visited set. If we've already encountered this node
5957 // we needn't search further.
5958 if (Visited.count(N))
5962 // Haven't visited N yet. Continue the search.
5963 while (!Worklist.empty()) {
5964 const SDNode *M = Worklist.pop_back_val();
5965 for (unsigned i = 0, e = M->getNumOperands(); i != e; ++i) {
5966 SDNode *Op = M->getOperand(i).getNode();
5967 if (Visited.insert(Op))
5968 Worklist.push_back(Op);
5977 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
5978 assert(Num < NumOperands && "Invalid child # of SDNode!");
5979 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
5982 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
5983 assert(N->getNumValues() == 1 &&
5984 "Can't unroll a vector with multiple results!");
5986 EVT VT = N->getValueType(0);
5987 unsigned NE = VT.getVectorNumElements();
5988 EVT EltVT = VT.getVectorElementType();
5989 DebugLoc dl = N->getDebugLoc();
5991 SmallVector<SDValue, 8> Scalars;
5992 SmallVector<SDValue, 4> Operands(N->getNumOperands());
5994 // If ResNE is 0, fully unroll the vector op.
5997 else if (NE > ResNE)
6001 for (i= 0; i != NE; ++i) {
6002 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6003 SDValue Operand = N->getOperand(j);
6004 EVT OperandVT = Operand.getValueType();
6005 if (OperandVT.isVector()) {
6006 // A vector operand; extract a single element.
6007 EVT OperandEltVT = OperandVT.getVectorElementType();
6008 Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl,
6011 getConstant(i, TLI.getPointerTy()));
6013 // A scalar operand; just use it as is.
6014 Operands[j] = Operand;
6018 switch (N->getOpcode()) {
6020 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6021 &Operands[0], Operands.size()));
6024 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT,
6025 &Operands[0], Operands.size()));
6032 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6033 getShiftAmountOperand(Operands[0].getValueType(),
6036 case ISD::SIGN_EXTEND_INREG:
6037 case ISD::FP_ROUND_INREG: {
6038 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6039 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6041 getValueType(ExtVT)));
6046 for (; i < ResNE; ++i)
6047 Scalars.push_back(getUNDEF(EltVT));
6049 return getNode(ISD::BUILD_VECTOR, dl,
6050 EVT::getVectorVT(*getContext(), EltVT, ResNE),
6051 &Scalars[0], Scalars.size());
6055 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6056 /// location that is 'Dist' units away from the location that the 'Base' load
6057 /// is loading from.
6058 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6059 unsigned Bytes, int Dist) const {
6060 if (LD->getChain() != Base->getChain())
6062 EVT VT = LD->getValueType(0);
6063 if (VT.getSizeInBits() / 8 != Bytes)
6066 SDValue Loc = LD->getOperand(1);
6067 SDValue BaseLoc = Base->getOperand(1);
6068 if (Loc.getOpcode() == ISD::FrameIndex) {
6069 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6071 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6072 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6073 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6074 int FS = MFI->getObjectSize(FI);
6075 int BFS = MFI->getObjectSize(BFI);
6076 if (FS != BFS || FS != (int)Bytes) return false;
6077 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6081 if (isBaseWithConstantOffset(Loc) && Loc.getOperand(0) == BaseLoc &&
6082 cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue() == Dist*Bytes)
6085 const GlobalValue *GV1 = NULL;
6086 const GlobalValue *GV2 = NULL;
6087 int64_t Offset1 = 0;
6088 int64_t Offset2 = 0;
6089 bool isGA1 = TLI.isGAPlusOffset(Loc.getNode(), GV1, Offset1);
6090 bool isGA2 = TLI.isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
6091 if (isGA1 && isGA2 && GV1 == GV2)
6092 return Offset1 == (Offset2 + Dist*Bytes);
6097 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
6098 /// it cannot be inferred.
6099 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
6100 // If this is a GlobalAddress + cst, return the alignment.
6101 const GlobalValue *GV;
6102 int64_t GVOffset = 0;
6103 if (TLI.isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
6104 unsigned PtrWidth = TLI.getPointerTy().getSizeInBits();
6105 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
6106 llvm::ComputeMaskedBits(const_cast<GlobalValue*>(GV), KnownZero, KnownOne,
6107 TLI.getDataLayout());
6108 unsigned AlignBits = KnownZero.countTrailingOnes();
6109 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
6111 return MinAlign(Align, GVOffset);
6114 // If this is a direct reference to a stack slot, use information about the
6115 // stack slot's alignment.
6116 int FrameIdx = 1 << 31;
6117 int64_t FrameOffset = 0;
6118 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
6119 FrameIdx = FI->getIndex();
6120 } else if (isBaseWithConstantOffset(Ptr) &&
6121 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
6123 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
6124 FrameOffset = Ptr.getConstantOperandVal(1);
6127 if (FrameIdx != (1 << 31)) {
6128 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
6129 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
6137 // getAddressSpace - Return the address space this GlobalAddress belongs to.
6138 unsigned GlobalAddressSDNode::getAddressSpace() const {
6139 return getGlobal()->getType()->getAddressSpace();
6143 Type *ConstantPoolSDNode::getType() const {
6144 if (isMachineConstantPoolEntry())
6145 return Val.MachineCPVal->getType();
6146 return Val.ConstVal->getType();
6149 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
6151 unsigned &SplatBitSize,
6153 unsigned MinSplatBits,
6155 EVT VT = getValueType(0);
6156 assert(VT.isVector() && "Expected a vector type");
6157 unsigned sz = VT.getSizeInBits();
6158 if (MinSplatBits > sz)
6161 SplatValue = APInt(sz, 0);
6162 SplatUndef = APInt(sz, 0);
6164 // Get the bits. Bits with undefined values (when the corresponding element
6165 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
6166 // in SplatValue. If any of the values are not constant, give up and return
6168 unsigned int nOps = getNumOperands();
6169 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
6170 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
6172 for (unsigned j = 0; j < nOps; ++j) {
6173 unsigned i = isBigEndian ? nOps-1-j : j;
6174 SDValue OpVal = getOperand(i);
6175 unsigned BitPos = j * EltBitSize;
6177 if (OpVal.getOpcode() == ISD::UNDEF)
6178 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
6179 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
6180 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
6181 zextOrTrunc(sz) << BitPos;
6182 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
6183 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
6188 // The build_vector is all constants or undefs. Find the smallest element
6189 // size that splats the vector.
6191 HasAnyUndefs = (SplatUndef != 0);
6194 unsigned HalfSize = sz / 2;
6195 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
6196 APInt LowValue = SplatValue.trunc(HalfSize);
6197 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
6198 APInt LowUndef = SplatUndef.trunc(HalfSize);
6200 // If the two halves do not match (ignoring undef bits), stop here.
6201 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
6202 MinSplatBits > HalfSize)
6205 SplatValue = HighValue | LowValue;
6206 SplatUndef = HighUndef & LowUndef;
6215 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
6216 // Find the first non-undef value in the shuffle mask.
6218 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
6221 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
6223 // Make sure all remaining elements are either undef or the same as the first
6225 for (int Idx = Mask[i]; i != e; ++i)
6226 if (Mask[i] >= 0 && Mask[i] != Idx)
6232 static void checkForCyclesHelper(const SDNode *N,
6233 SmallPtrSet<const SDNode*, 32> &Visited,
6234 SmallPtrSet<const SDNode*, 32> &Checked) {
6235 // If this node has already been checked, don't check it again.
6236 if (Checked.count(N))
6239 // If a node has already been visited on this depth-first walk, reject it as
6241 if (!Visited.insert(N)) {
6242 dbgs() << "Offending node:\n";
6244 errs() << "Detected cycle in SelectionDAG\n";
6248 for(unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
6249 checkForCyclesHelper(N->getOperand(i).getNode(), Visited, Checked);
6256 void llvm::checkForCycles(const llvm::SDNode *N) {
6258 assert(N && "Checking nonexistant SDNode");
6259 SmallPtrSet<const SDNode*, 32> visited;
6260 SmallPtrSet<const SDNode*, 32> checked;
6261 checkForCyclesHelper(N, visited, checked);
6265 void llvm::checkForCycles(const llvm::SelectionDAG *DAG) {
6266 checkForCycles(DAG->getRoot().getNode());