1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements routines for translating functions from LLVM IR into
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "function-lowering-info"
16 #include "llvm/CodeGen/FunctionLoweringInfo.h"
17 #include "llvm/DerivedTypes.h"
18 #include "llvm/Function.h"
19 #include "llvm/Instructions.h"
20 #include "llvm/IntrinsicInst.h"
21 #include "llvm/LLVMContext.h"
22 #include "llvm/Module.h"
23 #include "llvm/Analysis/DebugInfo.h"
24 #include "llvm/CodeGen/Analysis.h"
25 #include "llvm/CodeGen/MachineFunction.h"
26 #include "llvm/CodeGen/MachineFrameInfo.h"
27 #include "llvm/CodeGen/MachineInstrBuilder.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/MachineRegisterInfo.h"
30 #include "llvm/Target/TargetRegisterInfo.h"
31 #include "llvm/Target/TargetData.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetLowering.h"
34 #include "llvm/Target/TargetOptions.h"
35 #include "llvm/Support/Debug.h"
36 #include "llvm/Support/ErrorHandling.h"
37 #include "llvm/Support/MathExtras.h"
41 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
42 /// PHI nodes or outside of the basic block that defines it, or used by a
43 /// switch or atomic instruction, which may expand to multiple basic blocks.
44 static bool isUsedOutsideOfDefiningBlock(const Instruction *I) {
45 if (I->use_empty()) return false;
46 if (isa<PHINode>(I)) return true;
47 const BasicBlock *BB = I->getParent();
48 for (Value::const_use_iterator UI = I->use_begin(), E = I->use_end();
51 if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
57 /// isOnlyUsedInEntryBlock - If the specified argument is only used in the
58 /// entry block, return true. This includes arguments used by switches, since
59 /// the switch may expand into multiple basic blocks.
60 static bool isOnlyUsedInEntryBlock(const Argument *A, bool EnableFastISel) {
61 // With FastISel active, we may be splitting blocks, so force creation
62 // of virtual registers for all non-dead arguments.
64 return A->use_empty();
66 const BasicBlock *Entry = A->getParent()->begin();
67 for (Value::const_use_iterator UI = A->use_begin(), E = A->use_end();
70 if (cast<Instruction>(U)->getParent() != Entry || isa<SwitchInst>(U))
71 return false; // Use not in entry block.
76 FunctionLoweringInfo::FunctionLoweringInfo(const TargetLowering &tli)
80 void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf) {
83 RegInfo = &MF->getRegInfo();
85 // Check whether the function can return without sret-demotion.
86 SmallVector<ISD::OutputArg, 4> Outs;
87 GetReturnInfo(Fn->getReturnType(),
88 Fn->getAttributes().getRetAttributes(), Outs, TLI);
89 CanLowerReturn = TLI.CanLowerReturn(Fn->getCallingConv(), Fn->isVarArg(),
90 Outs, Fn->getContext());
92 // Create a vreg for each argument register that is not dead and is used
93 // outside of the entry block for the function.
94 for (Function::const_arg_iterator AI = Fn->arg_begin(), E = Fn->arg_end();
96 if (!isOnlyUsedInEntryBlock(AI, EnableFastISel))
97 InitializeRegForValue(AI);
99 // Initialize the mapping of values to registers. This is only set up for
100 // instruction values that are used outside of the block that defines
102 Function::const_iterator BB = Fn->begin(), EB = Fn->end();
103 for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I)
104 if (const AllocaInst *AI = dyn_cast<AllocaInst>(I))
105 if (const ConstantInt *CUI = dyn_cast<ConstantInt>(AI->getArraySize())) {
106 const Type *Ty = AI->getAllocatedType();
107 uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(Ty);
109 std::max((unsigned)TLI.getTargetData()->getPrefTypeAlignment(Ty),
112 TySize *= CUI->getZExtValue(); // Get total allocated size.
113 if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
115 // The object may need to be placed onto the stack near the stack
116 // protector if one exists. Determine here if this object is a suitable
117 // candidate. I.e., it would trigger the creation of a stack protector.
119 (AI->isArrayAllocation() ||
120 (TySize > 8 && isa<ArrayType>(Ty) &&
121 cast<ArrayType>(Ty)->getElementType()->isIntegerTy(8)));
122 StaticAllocaMap[AI] =
123 MF->getFrameInfo()->CreateStackObject(TySize, Align, false, MayNeedSP);
126 for (; BB != EB; ++BB)
127 for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I) {
128 // Mark values used outside their block as exported, by allocating
129 // a virtual register for them.
130 if (isUsedOutsideOfDefiningBlock(I))
131 if (!isa<AllocaInst>(I) ||
132 !StaticAllocaMap.count(cast<AllocaInst>(I)))
133 InitializeRegForValue(I);
135 // Collect llvm.dbg.declare information. This is done now instead of
136 // during the initial isel pass through the IR so that it is done
137 // in a predictable order.
138 if (const DbgDeclareInst *DI = dyn_cast<DbgDeclareInst>(I)) {
139 MachineModuleInfo &MMI = MF->getMMI();
140 if (MMI.hasDebugInfo() &&
141 DIVariable(DI->getVariable()).Verify() &&
142 !DI->getDebugLoc().isUnknown()) {
143 // Don't handle byval struct arguments or VLAs, for example.
144 // Non-byval arguments are handled here (they refer to the stack
145 // temporary alloca at this point).
146 const Value *Address = DI->getAddress();
148 if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
149 Address = BCI->getOperand(0);
150 if (const AllocaInst *AI = dyn_cast<AllocaInst>(Address)) {
151 DenseMap<const AllocaInst *, int>::iterator SI =
152 StaticAllocaMap.find(AI);
153 if (SI != StaticAllocaMap.end()) { // Check for VLAs.
155 MMI.setVariableDbgInfo(DI->getVariable(),
156 FI, DI->getDebugLoc());
164 // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
165 // also creates the initial PHI MachineInstrs, though none of the input
166 // operands are populated.
167 for (BB = Fn->begin(); BB != EB; ++BB) {
168 MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(BB);
172 // Transfer the address-taken flag. This is necessary because there could
173 // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
174 // the first one should be marked.
175 if (BB->hasAddressTaken())
176 MBB->setHasAddressTaken();
178 // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
180 for (BasicBlock::const_iterator I = BB->begin();
181 const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
182 if (PN->use_empty()) continue;
184 DebugLoc DL = PN->getDebugLoc();
185 unsigned PHIReg = ValueMap[PN];
186 assert(PHIReg && "PHI node does not have an assigned virtual register!");
188 SmallVector<EVT, 4> ValueVTs;
189 ComputeValueVTs(TLI, PN->getType(), ValueVTs);
190 for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
191 EVT VT = ValueVTs[vti];
192 unsigned NumRegisters = TLI.getNumRegisters(Fn->getContext(), VT);
193 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
194 for (unsigned i = 0; i != NumRegisters; ++i)
195 BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
196 PHIReg += NumRegisters;
201 // Mark landing pad blocks.
202 for (BB = Fn->begin(); BB != EB; ++BB)
203 if (const InvokeInst *Invoke = dyn_cast<InvokeInst>(BB->getTerminator()))
204 MBBMap[Invoke->getSuccessor(1)]->setIsLandingPad();
207 /// clear - Clear out all the function-specific state. This returns this
208 /// FunctionLoweringInfo to an empty state, ready to be used for a
209 /// different function.
210 void FunctionLoweringInfo::clear() {
211 assert(CatchInfoFound.size() == CatchInfoLost.size() &&
212 "Not all catch info was assigned to a landing pad!");
216 StaticAllocaMap.clear();
218 CatchInfoLost.clear();
219 CatchInfoFound.clear();
221 LiveOutRegInfo.clear();
223 ArgDbgValues.clear();
224 ByValArgFrameIndexMap.clear();
228 /// CreateReg - Allocate a single virtual register for the given type.
229 unsigned FunctionLoweringInfo::CreateReg(EVT VT) {
230 return RegInfo->createVirtualRegister(TLI.getRegClassFor(VT));
233 /// CreateRegs - Allocate the appropriate number of virtual registers of
234 /// the correctly promoted or expanded types. Assign these registers
235 /// consecutive vreg numbers and return the first assigned number.
237 /// In the case that the given value has struct or array type, this function
238 /// will assign registers for each member or element.
240 unsigned FunctionLoweringInfo::CreateRegs(const Type *Ty) {
241 SmallVector<EVT, 4> ValueVTs;
242 ComputeValueVTs(TLI, Ty, ValueVTs);
244 unsigned FirstReg = 0;
245 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
246 EVT ValueVT = ValueVTs[Value];
247 EVT RegisterVT = TLI.getRegisterType(Ty->getContext(), ValueVT);
249 unsigned NumRegs = TLI.getNumRegisters(Ty->getContext(), ValueVT);
250 for (unsigned i = 0; i != NumRegs; ++i) {
251 unsigned R = CreateReg(RegisterVT);
252 if (!FirstReg) FirstReg = R;
258 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
259 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
260 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
261 /// the larger bit width by zero extension. The bit width must be no smaller
262 /// than the LiveOutInfo's existing bit width.
263 const FunctionLoweringInfo::LiveOutInfo *
264 FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
265 if (!LiveOutRegInfo.inBounds(Reg))
268 LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
272 if (BitWidth >= LOI->KnownZero.getBitWidth()) {
273 LOI->KnownZero = LOI->KnownZero.zextOrTrunc(BitWidth);
274 LOI->KnownOne = LOI->KnownOne.zextOrTrunc(BitWidth);
280 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
281 /// register based on the LiveOutInfo of its operands.
282 void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) {
283 const Type *Ty = PN->getType();
284 if (!Ty->isIntegerTy() || Ty->isVectorTy())
287 SmallVector<EVT, 1> ValueVTs;
288 ComputeValueVTs(TLI, Ty, ValueVTs);
289 assert(ValueVTs.size() == 1 &&
290 "PHIs with non-vector integer types should have a single VT.");
291 EVT IntVT = ValueVTs[0];
293 if (TLI.getNumRegisters(PN->getContext(), IntVT) != 1)
295 IntVT = TLI.getTypeToTransformTo(PN->getContext(), IntVT);
296 unsigned BitWidth = IntVT.getSizeInBits();
298 unsigned DestReg = ValueMap[PN];
299 if (!TargetRegisterInfo::isVirtualRegister(DestReg))
301 LiveOutRegInfo.grow(DestReg);
302 LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
304 Value *V = PN->getIncomingValue(0);
305 if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
306 DestLOI.NumSignBits = 1;
307 APInt Zero(BitWidth, 0);
308 DestLOI.KnownZero = Zero;
309 DestLOI.KnownOne = Zero;
313 if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
314 APInt Val = CI->getValue().zextOrTrunc(BitWidth);
315 DestLOI.NumSignBits = Val.getNumSignBits();
316 DestLOI.KnownZero = ~Val;
317 DestLOI.KnownOne = Val;
319 assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
320 "CopyToReg node was created.");
321 unsigned SrcReg = ValueMap[V];
322 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
323 DestLOI.IsValid = false;
326 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
328 DestLOI.IsValid = false;
334 assert(DestLOI.KnownZero.getBitWidth() == BitWidth &&
335 DestLOI.KnownOne.getBitWidth() == BitWidth &&
336 "Masks should have the same bit width as the type.");
338 for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
339 Value *V = PN->getIncomingValue(i);
340 if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
341 DestLOI.NumSignBits = 1;
342 APInt Zero(BitWidth, 0);
343 DestLOI.KnownZero = Zero;
344 DestLOI.KnownOne = Zero;
348 if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
349 APInt Val = CI->getValue().zextOrTrunc(BitWidth);
350 DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
351 DestLOI.KnownZero &= ~Val;
352 DestLOI.KnownOne &= Val;
356 assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
357 "its CopyToReg node was created.");
358 unsigned SrcReg = ValueMap[V];
359 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
360 DestLOI.IsValid = false;
363 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
365 DestLOI.IsValid = false;
368 DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
369 DestLOI.KnownZero &= SrcLOI->KnownZero;
370 DestLOI.KnownOne &= SrcLOI->KnownOne;
374 /// setByValArgumentFrameIndex - Record frame index for the byval
375 /// argument. This overrides previous frame index entry for this argument,
377 void FunctionLoweringInfo::setByValArgumentFrameIndex(const Argument *A,
379 assert (A->hasByValAttr() && "Argument does not have byval attribute!");
380 ByValArgFrameIndexMap[A] = FI;
383 /// getByValArgumentFrameIndex - Get frame index for the byval argument.
384 /// If the argument does not have any assigned frame index then 0 is
386 int FunctionLoweringInfo::getByValArgumentFrameIndex(const Argument *A) {
387 assert (A->hasByValAttr() && "Argument does not have byval attribute!");
388 DenseMap<const Argument *, int>::iterator I =
389 ByValArgFrameIndexMap.find(A);
390 if (I != ByValArgFrameIndexMap.end())
392 DEBUG(dbgs() << "Argument does not have assigned frame index!");
396 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
397 /// call, and add them to the specified machine basic block.
398 void llvm::AddCatchInfo(const CallInst &I, MachineModuleInfo *MMI,
399 MachineBasicBlock *MBB) {
400 // Inform the MachineModuleInfo of the personality for this landing pad.
401 const ConstantExpr *CE = cast<ConstantExpr>(I.getArgOperand(1));
402 assert(CE->getOpcode() == Instruction::BitCast &&
403 isa<Function>(CE->getOperand(0)) &&
404 "Personality should be a function");
405 MMI->addPersonality(MBB, cast<Function>(CE->getOperand(0)));
407 // Gather all the type infos for this landing pad and pass them along to
408 // MachineModuleInfo.
409 std::vector<const GlobalVariable *> TyInfo;
410 unsigned N = I.getNumArgOperands();
412 for (unsigned i = N - 1; i > 1; --i) {
413 if (const ConstantInt *CI = dyn_cast<ConstantInt>(I.getArgOperand(i))) {
414 unsigned FilterLength = CI->getZExtValue();
415 unsigned FirstCatch = i + FilterLength + !FilterLength;
416 assert(FirstCatch <= N && "Invalid filter length");
418 if (FirstCatch < N) {
419 TyInfo.reserve(N - FirstCatch);
420 for (unsigned j = FirstCatch; j < N; ++j)
421 TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
422 MMI->addCatchTypeInfo(MBB, TyInfo);
428 MMI->addCleanup(MBB);
431 TyInfo.reserve(FilterLength - 1);
432 for (unsigned j = i + 1; j < FirstCatch; ++j)
433 TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
434 MMI->addFilterTypeInfo(MBB, TyInfo);
443 TyInfo.reserve(N - 2);
444 for (unsigned j = 2; j < N; ++j)
445 TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
446 MMI->addCatchTypeInfo(MBB, TyInfo);
450 void llvm::CopyCatchInfo(const BasicBlock *SrcBB, const BasicBlock *DestBB,
451 MachineModuleInfo *MMI, FunctionLoweringInfo &FLI) {
452 for (BasicBlock::const_iterator I = SrcBB->begin(), E = --SrcBB->end();
454 if (const EHSelectorInst *EHSel = dyn_cast<EHSelectorInst>(I)) {
455 // Apply the catch info to DestBB.
456 AddCatchInfo(*EHSel, MMI, FLI.MBBMap[DestBB]);
458 if (!FLI.MBBMap[SrcBB]->isLandingPad())
459 FLI.CatchInfoFound.insert(EHSel);