1 //===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass is responsible for finalizing the functions frame layout, saving
11 // callee saved registers, and for emitting prolog & epilog code for the
14 // This pass must be run after register allocation. After this pass is
15 // executed, it is illegal to construct MO_FrameIndex operands.
17 // This pass provides an optional shrink wrapping variant of prolog/epilog
18 // insertion, enabled via --shrink-wrap. See ShrinkWrapping.cpp.
20 //===----------------------------------------------------------------------===//
22 #define DEBUG_TYPE "pei"
23 #include "PrologEpilogInserter.h"
24 #include "llvm/InlineAsm.h"
25 #include "llvm/CodeGen/MachineDominators.h"
26 #include "llvm/CodeGen/MachineLoopInfo.h"
27 #include "llvm/CodeGen/MachineInstr.h"
28 #include "llvm/CodeGen/MachineFrameInfo.h"
29 #include "llvm/CodeGen/MachineRegisterInfo.h"
30 #include "llvm/CodeGen/RegisterScavenging.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Target/TargetOptions.h"
33 #include "llvm/Target/TargetRegisterInfo.h"
34 #include "llvm/Target/TargetFrameLowering.h"
35 #include "llvm/Target/TargetInstrInfo.h"
36 #include "llvm/Support/CommandLine.h"
37 #include "llvm/Support/Compiler.h"
38 #include "llvm/Support/Debug.h"
39 #include "llvm/ADT/IndexedMap.h"
40 #include "llvm/ADT/SmallSet.h"
41 #include "llvm/ADT/Statistic.h"
42 #include "llvm/ADT/STLExtras.h"
48 char &llvm::PrologEpilogCodeInserterID = PEI::ID;
50 INITIALIZE_PASS_BEGIN(PEI, "prologepilog",
51 "Prologue/Epilogue Insertion", false, false)
52 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
53 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
54 INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
55 INITIALIZE_PASS_END(PEI, "prologepilog",
56 "Prologue/Epilogue Insertion & Frame Finalization",
59 STATISTIC(NumVirtualFrameRegs, "Number of virtual frame regs encountered");
60 STATISTIC(NumScavengedRegs, "Number of frame index regs scavenged");
61 STATISTIC(NumBytesStackSpace,
62 "Number of bytes used for stack in all functions");
64 /// runOnMachineFunction - Insert prolog/epilog code and replace abstract
65 /// frame indexes with appropriate references.
67 bool PEI::runOnMachineFunction(MachineFunction &Fn) {
68 const Function* F = Fn.getFunction();
69 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
70 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
72 RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL;
73 FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn);
75 // Calculate the MaxCallFrameSize and AdjustsStack variables for the
76 // function's frame information. Also eliminates call frame pseudo
78 calculateCallsInformation(Fn);
80 // Allow the target machine to make some adjustments to the function
81 // e.g. UsedPhysRegs before calculateCalleeSavedRegisters.
82 TFI->processFunctionBeforeCalleeSavedScan(Fn, RS);
84 // Scan the function for modified callee saved registers and insert spill code
85 // for any callee saved registers that are modified.
86 calculateCalleeSavedRegisters(Fn);
88 // Determine placement of CSR spill/restore code:
89 // - With shrink wrapping, place spills and restores to tightly
90 // enclose regions in the Machine CFG of the function where
92 // - Without shink wrapping (default), place all spills in the
93 // entry block, all restores in return blocks.
94 placeCSRSpillsAndRestores(Fn);
96 // Add the code to save and restore the callee saved registers
97 if (!F->hasFnAttr(Attribute::Naked))
98 insertCSRSpillsAndRestores(Fn);
100 // Allow the target machine to make final modifications to the function
101 // before the frame layout is finalized.
102 TFI->processFunctionBeforeFrameFinalized(Fn);
104 // Calculate actual frame offsets for all abstract stack objects...
105 calculateFrameObjectOffsets(Fn);
107 // Add prolog and epilog code to the function. This function is required
108 // to align the stack frame as necessary for any stack variables or
109 // called functions. Because of this, calculateCalleeSavedRegisters()
110 // must be called before this function in order to set the AdjustsStack
111 // and MaxCallFrameSize variables.
112 if (!F->hasFnAttr(Attribute::Naked))
113 insertPrologEpilogCode(Fn);
115 // Replace all MO_FrameIndex operands with physical register references
116 // and actual offsets.
118 replaceFrameIndices(Fn);
120 // If register scavenging is needed, as we've enabled doing it as a
121 // post-pass, scavenge the virtual registers that frame index elimiation
123 if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging)
124 scavengeFrameVirtualRegs(Fn);
132 void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
133 AU.setPreservesCFG();
134 if (ShrinkWrapping || ShrinkWrapFunc != "") {
135 AU.addRequired<MachineLoopInfo>();
136 AU.addRequired<MachineDominatorTree>();
138 AU.addPreserved<MachineLoopInfo>();
139 AU.addPreserved<MachineDominatorTree>();
140 MachineFunctionPass::getAnalysisUsage(AU);
144 /// calculateCallsInformation - Calculate the MaxCallFrameSize and AdjustsStack
145 /// variables for the function's frame information and eliminate call frame
146 /// pseudo instructions.
147 void PEI::calculateCallsInformation(MachineFunction &Fn) {
148 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
149 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
150 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
151 MachineFrameInfo *MFI = Fn.getFrameInfo();
153 unsigned MaxCallFrameSize = 0;
154 bool AdjustsStack = MFI->adjustsStack();
156 // Get the function call frame set-up and tear-down instruction opcode
157 int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
158 int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
160 // Early exit for targets which have no call frame setup/destroy pseudo
162 if (FrameSetupOpcode == -1 && FrameDestroyOpcode == -1)
165 std::vector<MachineBasicBlock::iterator> FrameSDOps;
166 for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB)
167 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I)
168 if (I->getOpcode() == FrameSetupOpcode ||
169 I->getOpcode() == FrameDestroyOpcode) {
170 assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo"
171 " instructions should have a single immediate argument!");
172 unsigned Size = I->getOperand(0).getImm();
173 if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
175 FrameSDOps.push_back(I);
176 } else if (I->isInlineAsm()) {
177 // Some inline asm's need a stack frame, as indicated by operand 1.
178 unsigned ExtraInfo = I->getOperand(InlineAsm::MIOp_ExtraInfo).getImm();
179 if (ExtraInfo & InlineAsm::Extra_IsAlignStack)
183 MFI->setAdjustsStack(AdjustsStack);
184 MFI->setMaxCallFrameSize(MaxCallFrameSize);
186 for (std::vector<MachineBasicBlock::iterator>::iterator
187 i = FrameSDOps.begin(), e = FrameSDOps.end(); i != e; ++i) {
188 MachineBasicBlock::iterator I = *i;
190 // If call frames are not being included as part of the stack frame, and
191 // the target doesn't indicate otherwise, remove the call frame pseudos
192 // here. The sub/add sp instruction pairs are still inserted, but we don't
193 // need to track the SP adjustment for frame index elimination.
194 if (TFI->canSimplifyCallFramePseudos(Fn))
195 RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
200 /// calculateCalleeSavedRegisters - Scan the function for modified callee saved
202 void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) {
203 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
204 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
205 MachineFrameInfo *MFI = Fn.getFrameInfo();
207 // Get the callee saved register list...
208 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(&Fn);
210 // These are used to keep track the callee-save area. Initialize them.
211 MinCSFrameIndex = INT_MAX;
214 // Early exit for targets which have no callee saved registers.
215 if (CSRegs == 0 || CSRegs[0] == 0)
218 // In Naked functions we aren't going to save any registers.
219 if (Fn.getFunction()->hasFnAttr(Attribute::Naked))
222 std::vector<CalleeSavedInfo> CSI;
223 for (unsigned i = 0; CSRegs[i]; ++i) {
224 unsigned Reg = CSRegs[i];
225 if (Fn.getRegInfo().isPhysRegOrOverlapUsed(Reg)) {
226 // If the reg is modified, save it!
227 CSI.push_back(CalleeSavedInfo(Reg));
232 return; // Early exit if no callee saved registers are modified!
234 unsigned NumFixedSpillSlots;
235 const TargetFrameLowering::SpillSlot *FixedSpillSlots =
236 TFI->getCalleeSavedSpillSlots(NumFixedSpillSlots);
238 // Now that we know which registers need to be saved and restored, allocate
239 // stack slots for them.
240 for (std::vector<CalleeSavedInfo>::iterator
241 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
242 unsigned Reg = I->getReg();
243 const TargetRegisterClass *RC = RegInfo->getMinimalPhysRegClass(Reg);
246 if (RegInfo->hasReservedSpillSlot(Fn, Reg, FrameIdx)) {
247 I->setFrameIdx(FrameIdx);
251 // Check to see if this physreg must be spilled to a particular stack slot
253 const TargetFrameLowering::SpillSlot *FixedSlot = FixedSpillSlots;
254 while (FixedSlot != FixedSpillSlots+NumFixedSpillSlots &&
255 FixedSlot->Reg != Reg)
258 if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) {
259 // Nope, just spill it anywhere convenient.
260 unsigned Align = RC->getAlignment();
261 unsigned StackAlign = TFI->getStackAlignment();
263 // We may not be able to satisfy the desired alignment specification of
264 // the TargetRegisterClass if the stack alignment is smaller. Use the
266 Align = std::min(Align, StackAlign);
267 FrameIdx = MFI->CreateStackObject(RC->getSize(), Align, true);
268 if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
269 if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
271 // Spill it to the stack where we must.
272 FrameIdx = MFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset, true);
275 I->setFrameIdx(FrameIdx);
278 MFI->setCalleeSavedInfo(CSI);
281 /// insertCSRSpillsAndRestores - Insert spill and restore code for
282 /// callee saved registers used in the function, handling shrink wrapping.
284 void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
285 // Get callee saved register information.
286 MachineFrameInfo *MFI = Fn.getFrameInfo();
287 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
289 MFI->setCalleeSavedInfoValid(true);
291 // Early exit if no callee saved registers are modified!
295 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
296 const TargetFrameLowering *TFI = Fn.getTarget().getFrameLowering();
297 const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
298 MachineBasicBlock::iterator I;
300 if (! ShrinkWrapThisFunction) {
301 // Spill using target interface.
302 I = EntryBlock->begin();
303 if (!TFI->spillCalleeSavedRegisters(*EntryBlock, I, CSI, TRI)) {
304 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
305 // Add the callee-saved register as live-in.
306 // It's killed at the spill.
307 EntryBlock->addLiveIn(CSI[i].getReg());
309 // Insert the spill to the stack frame.
310 unsigned Reg = CSI[i].getReg();
311 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
312 TII.storeRegToStackSlot(*EntryBlock, I, Reg, true,
313 CSI[i].getFrameIdx(), RC, TRI);
317 // Restore using target interface.
318 for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) {
319 MachineBasicBlock* MBB = ReturnBlocks[ri];
322 // Skip over all terminator instructions, which are part of the return
324 MachineBasicBlock::iterator I2 = I;
325 while (I2 != MBB->begin() && (--I2)->isTerminator())
328 bool AtStart = I == MBB->begin();
329 MachineBasicBlock::iterator BeforeI = I;
333 // Restore all registers immediately before the return and any
334 // terminators that precede it.
335 if (!TFI->restoreCalleeSavedRegisters(*MBB, I, CSI, TRI)) {
336 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
337 unsigned Reg = CSI[i].getReg();
338 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
339 TII.loadRegFromStackSlot(*MBB, I, Reg,
340 CSI[i].getFrameIdx(),
342 assert(I != MBB->begin() &&
343 "loadRegFromStackSlot didn't insert any code!");
344 // Insert in reverse order. loadRegFromStackSlot can insert
345 // multiple instructions.
359 std::vector<CalleeSavedInfo> blockCSI;
360 for (CSRegBlockMap::iterator BI = CSRSave.begin(),
361 BE = CSRSave.end(); BI != BE; ++BI) {
362 MachineBasicBlock* MBB = BI->first;
363 CSRegSet save = BI->second;
369 for (CSRegSet::iterator RI = save.begin(),
370 RE = save.end(); RI != RE; ++RI) {
371 blockCSI.push_back(CSI[*RI]);
373 assert(blockCSI.size() > 0 &&
374 "Could not collect callee saved register info");
378 // When shrink wrapping, use stack slot stores/loads.
379 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
380 // Add the callee-saved register as live-in.
381 // It's killed at the spill.
382 MBB->addLiveIn(blockCSI[i].getReg());
384 // Insert the spill to the stack frame.
385 unsigned Reg = blockCSI[i].getReg();
386 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
387 TII.storeRegToStackSlot(*MBB, I, Reg,
389 blockCSI[i].getFrameIdx(),
394 for (CSRegBlockMap::iterator BI = CSRRestore.begin(),
395 BE = CSRRestore.end(); BI != BE; ++BI) {
396 MachineBasicBlock* MBB = BI->first;
397 CSRegSet restore = BI->second;
403 for (CSRegSet::iterator RI = restore.begin(),
404 RE = restore.end(); RI != RE; ++RI) {
405 blockCSI.push_back(CSI[*RI]);
407 assert(blockCSI.size() > 0 &&
408 "Could not find callee saved register info");
410 // If MBB is empty and needs restores, insert at the _beginning_.
417 // Skip over all terminator instructions, which are part of the
419 if (! I->isTerminator()) {
422 MachineBasicBlock::iterator I2 = I;
423 while (I2 != MBB->begin() && (--I2)->isTerminator())
428 bool AtStart = I == MBB->begin();
429 MachineBasicBlock::iterator BeforeI = I;
433 // Restore all registers immediately before the return and any
434 // terminators that precede it.
435 for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
436 unsigned Reg = blockCSI[i].getReg();
437 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
438 TII.loadRegFromStackSlot(*MBB, I, Reg,
439 blockCSI[i].getFrameIdx(),
441 assert(I != MBB->begin() &&
442 "loadRegFromStackSlot didn't insert any code!");
443 // Insert in reverse order. loadRegFromStackSlot can insert
444 // multiple instructions.
455 /// AdjustStackOffset - Helper function used to adjust the stack frame offset.
457 AdjustStackOffset(MachineFrameInfo *MFI, int FrameIdx,
458 bool StackGrowsDown, int64_t &Offset,
459 unsigned &MaxAlign) {
460 // If the stack grows down, add the object size to find the lowest address.
462 Offset += MFI->getObjectSize(FrameIdx);
464 unsigned Align = MFI->getObjectAlignment(FrameIdx);
466 // If the alignment of this object is greater than that of the stack, then
467 // increase the stack alignment to match.
468 MaxAlign = std::max(MaxAlign, Align);
470 // Adjust to alignment boundary.
471 Offset = (Offset + Align - 1) / Align * Align;
473 if (StackGrowsDown) {
474 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << -Offset << "]\n");
475 MFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
477 DEBUG(dbgs() << "alloc FI(" << FrameIdx << ") at SP[" << Offset << "]\n");
478 MFI->setObjectOffset(FrameIdx, Offset);
479 Offset += MFI->getObjectSize(FrameIdx);
483 /// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
484 /// abstract stack objects.
486 void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) {
487 const TargetFrameLowering &TFI = *Fn.getTarget().getFrameLowering();
489 bool StackGrowsDown =
490 TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown;
492 // Loop over all of the stack objects, assigning sequential addresses...
493 MachineFrameInfo *MFI = Fn.getFrameInfo();
495 // Start at the beginning of the local area.
496 // The Offset is the distance from the stack top in the direction
497 // of stack growth -- so it's always nonnegative.
498 int LocalAreaOffset = TFI.getOffsetOfLocalArea();
500 LocalAreaOffset = -LocalAreaOffset;
501 assert(LocalAreaOffset >= 0
502 && "Local area offset should be in direction of stack growth");
503 int64_t Offset = LocalAreaOffset;
505 // If there are fixed sized objects that are preallocated in the local area,
506 // non-fixed objects can't be allocated right at the start of local area.
507 // We currently don't support filling in holes in between fixed sized
508 // objects, so we adjust 'Offset' to point to the end of last fixed sized
509 // preallocated object.
510 for (int i = MFI->getObjectIndexBegin(); i != 0; ++i) {
512 if (StackGrowsDown) {
513 // The maximum distance from the stack pointer is at lower address of
514 // the object -- which is given by offset. For down growing stack
515 // the offset is negative, so we negate the offset to get the distance.
516 FixedOff = -MFI->getObjectOffset(i);
518 // The maximum distance from the start pointer is at the upper
519 // address of the object.
520 FixedOff = MFI->getObjectOffset(i) + MFI->getObjectSize(i);
522 if (FixedOff > Offset) Offset = FixedOff;
525 // First assign frame offsets to stack objects that are used to spill
526 // callee saved registers.
527 if (StackGrowsDown) {
528 for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) {
529 // If the stack grows down, we need to add the size to find the lowest
530 // address of the object.
531 Offset += MFI->getObjectSize(i);
533 unsigned Align = MFI->getObjectAlignment(i);
534 // Adjust to alignment boundary
535 Offset = (Offset+Align-1)/Align*Align;
537 MFI->setObjectOffset(i, -Offset); // Set the computed offset
540 int MaxCSFI = MaxCSFrameIndex, MinCSFI = MinCSFrameIndex;
541 for (int i = MaxCSFI; i >= MinCSFI ; --i) {
542 unsigned Align = MFI->getObjectAlignment(i);
543 // Adjust to alignment boundary
544 Offset = (Offset+Align-1)/Align*Align;
546 MFI->setObjectOffset(i, Offset);
547 Offset += MFI->getObjectSize(i);
551 unsigned MaxAlign = MFI->getMaxAlignment();
553 // Make sure the special register scavenging spill slot is closest to the
554 // frame pointer if a frame pointer is required.
555 const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
556 if (RS && TFI.hasFP(Fn) && RegInfo->useFPForScavengingIndex(Fn) &&
557 !RegInfo->needsStackRealignment(Fn)) {
558 int SFI = RS->getScavengingFrameIndex();
560 AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign);
563 // FIXME: Once this is working, then enable flag will change to a target
564 // check for whether the frame is large enough to want to use virtual
565 // frame index registers. Functions which don't want/need this optimization
566 // will continue to use the existing code path.
567 if (MFI->getUseLocalStackAllocationBlock()) {
568 unsigned Align = MFI->getLocalFrameMaxAlign();
570 // Adjust to alignment boundary.
571 Offset = (Offset + Align - 1) / Align * Align;
573 DEBUG(dbgs() << "Local frame base offset: " << Offset << "\n");
575 // Resolve offsets for objects in the local block.
576 for (unsigned i = 0, e = MFI->getLocalFrameObjectCount(); i != e; ++i) {
577 std::pair<int, int64_t> Entry = MFI->getLocalFrameObjectMap(i);
578 int64_t FIOffset = (StackGrowsDown ? -Offset : Offset) + Entry.second;
579 DEBUG(dbgs() << "alloc FI(" << Entry.first << ") at SP[" <<
581 MFI->setObjectOffset(Entry.first, FIOffset);
583 // Allocate the local block
584 Offset += MFI->getLocalFrameSize();
586 MaxAlign = std::max(Align, MaxAlign);
589 // Make sure that the stack protector comes before the local variables on the
591 SmallSet<int, 16> LargeStackObjs;
592 if (MFI->getStackProtectorIndex() >= 0) {
593 AdjustStackOffset(MFI, MFI->getStackProtectorIndex(), StackGrowsDown,
596 // Assign large stack objects first.
597 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
598 if (MFI->isObjectPreAllocated(i) &&
599 MFI->getUseLocalStackAllocationBlock())
601 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
603 if (RS && (int)i == RS->getScavengingFrameIndex())
605 if (MFI->isDeadObjectIndex(i))
607 if (MFI->getStackProtectorIndex() == (int)i)
609 if (!MFI->MayNeedStackProtector(i))
612 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
613 LargeStackObjs.insert(i);
617 // Then assign frame offsets to stack objects that are not used to spill
618 // callee saved registers.
619 for (unsigned i = 0, e = MFI->getObjectIndexEnd(); i != e; ++i) {
620 if (MFI->isObjectPreAllocated(i) &&
621 MFI->getUseLocalStackAllocationBlock())
623 if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
625 if (RS && (int)i == RS->getScavengingFrameIndex())
627 if (MFI->isDeadObjectIndex(i))
629 if (MFI->getStackProtectorIndex() == (int)i)
631 if (LargeStackObjs.count(i))
634 AdjustStackOffset(MFI, i, StackGrowsDown, Offset, MaxAlign);
637 // Make sure the special register scavenging spill slot is closest to the
639 if (RS && (!TFI.hasFP(Fn) || RegInfo->needsStackRealignment(Fn) ||
640 !RegInfo->useFPForScavengingIndex(Fn))) {
641 int SFI = RS->getScavengingFrameIndex();
643 AdjustStackOffset(MFI, SFI, StackGrowsDown, Offset, MaxAlign);
646 if (!TFI.targetHandlesStackFrameRounding()) {
647 // If we have reserved argument space for call sites in the function
648 // immediately on entry to the current function, count it as part of the
649 // overall stack size.
650 if (MFI->adjustsStack() && TFI.hasReservedCallFrame(Fn))
651 Offset += MFI->getMaxCallFrameSize();
653 // Round up the size to a multiple of the alignment. If the function has
654 // any calls or alloca's, align to the target's StackAlignment value to
655 // ensure that the callee's frame or the alloca data is suitably aligned;
656 // otherwise, for leaf functions, align to the TransientStackAlignment
659 if (MFI->adjustsStack() || MFI->hasVarSizedObjects() ||
660 (RegInfo->needsStackRealignment(Fn) && MFI->getObjectIndexEnd() != 0))
661 StackAlign = TFI.getStackAlignment();
663 StackAlign = TFI.getTransientStackAlignment();
665 // If the frame pointer is eliminated, all frame offsets will be relative to
666 // SP not FP. Align to MaxAlign so this works.
667 StackAlign = std::max(StackAlign, MaxAlign);
668 unsigned AlignMask = StackAlign - 1;
669 Offset = (Offset + AlignMask) & ~uint64_t(AlignMask);
672 // Update frame info to pretend that this is part of the stack...
673 int64_t StackSize = Offset - LocalAreaOffset;
674 MFI->setStackSize(StackSize);
675 NumBytesStackSpace += StackSize;
678 /// insertPrologEpilogCode - Scan the function for modified callee saved
679 /// registers, insert spill code for these callee saved registers, then add
680 /// prolog and epilog code to the function.
682 void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
683 const TargetFrameLowering &TFI = *Fn.getTarget().getFrameLowering();
685 // Add prologue to the function...
686 TFI.emitPrologue(Fn);
688 // Add epilogue to restore the callee-save registers in each exiting block
689 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
690 // If last instruction is a return instruction, add an epilogue
691 if (!I->empty() && I->back().isReturn())
692 TFI.emitEpilogue(Fn, *I);
695 // Emit additional code that is required to support segmented stacks, if
696 // we've been asked for it. This, when linked with a runtime with support
697 // for segmented stacks (libgcc is one), will result in allocating stack
698 // space in small chunks instead of one large contiguous block.
699 if (Fn.getTarget().Options.EnableSegmentedStacks)
700 TFI.adjustForSegmentedStacks(Fn);
703 /// replaceFrameIndices - Replace all MO_FrameIndex operands with physical
704 /// register references and actual offsets.
706 void PEI::replaceFrameIndices(MachineFunction &Fn) {
707 if (!Fn.getFrameInfo()->hasStackObjects()) return; // Nothing to do?
709 const TargetMachine &TM = Fn.getTarget();
710 assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
711 const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
712 const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
713 const TargetFrameLowering *TFI = TM.getFrameLowering();
714 bool StackGrowsDown =
715 TFI->getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown;
716 int FrameSetupOpcode = TII.getCallFrameSetupOpcode();
717 int FrameDestroyOpcode = TII.getCallFrameDestroyOpcode();
719 for (MachineFunction::iterator BB = Fn.begin(),
720 E = Fn.end(); BB != E; ++BB) {
722 int SPAdjCount = 0; // frame setup / destroy count.
724 int SPAdj = 0; // SP offset due to call frame setup / destroy.
725 if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(BB);
727 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
729 if (I->getOpcode() == FrameSetupOpcode ||
730 I->getOpcode() == FrameDestroyOpcode) {
732 // Track whether we see even pairs of them
733 SPAdjCount += I->getOpcode() == FrameSetupOpcode ? 1 : -1;
735 // Remember how much SP has been adjusted to create the call
737 int Size = I->getOperand(0).getImm();
739 if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
740 (StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
745 MachineBasicBlock::iterator PrevI = BB->end();
746 if (I != BB->begin()) PrevI = prior(I);
747 TRI.eliminateCallFramePseudoInstr(Fn, *BB, I);
749 // Visit the instructions created by eliminateCallFramePseudoInstr().
750 if (PrevI == BB->end())
751 I = BB->begin(); // The replaced instr was the first in the block.
753 I = llvm::next(PrevI);
757 MachineInstr *MI = I;
759 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
760 if (MI->getOperand(i).isFI()) {
761 // Some instructions (e.g. inline asm instructions) can have
762 // multiple frame indices and/or cause eliminateFrameIndex
763 // to insert more than one instruction. We need the register
764 // scavenger to go through all of these instructions so that
765 // it can update its register information. We keep the
766 // iterator at the point before insertion so that we can
767 // revisit them in full.
768 bool AtBeginning = (I == BB->begin());
769 if (!AtBeginning) --I;
771 // If this instruction has a FrameIndex operand, we need to
772 // use that target machine register info object to eliminate
774 TRI.eliminateFrameIndex(MI, SPAdj,
775 FrameIndexVirtualScavenging ? NULL : RS);
777 // Reset the iterator if we were at the beginning of the BB.
787 if (DoIncr && I != BB->end()) ++I;
789 // Update register states.
790 if (RS && !FrameIndexVirtualScavenging && MI) RS->forward(MI);
793 // If we have evenly matched pairs of frame setup / destroy instructions,
794 // make sure the adjustments come out to zero. If we don't have matched
795 // pairs, we can't be sure the missing bit isn't in another basic block
796 // due to a custom inserter playing tricks, so just asserting SPAdj==0
797 // isn't sufficient. See tMOVCC on Thumb1, for example.
798 assert((SPAdjCount || SPAdj == 0) &&
799 "Unbalanced call frame setup / destroy pairs?");
803 /// scavengeFrameVirtualRegs - Replace all frame index virtual registers
804 /// with physical registers. Use the register scavenger to find an
805 /// appropriate register to use.
806 void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) {
807 // Run through the instructions and find any virtual registers.
808 for (MachineFunction::iterator BB = Fn.begin(),
809 E = Fn.end(); BB != E; ++BB) {
810 RS->enterBasicBlock(BB);
812 unsigned VirtReg = 0;
813 unsigned ScratchReg = 0;
816 // The instruction stream may change in the loop, so check BB->end()
818 for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
819 MachineInstr *MI = I;
820 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
821 if (MI->getOperand(i).isReg()) {
822 MachineOperand &MO = MI->getOperand(i);
823 unsigned Reg = MO.getReg();
826 if (!TargetRegisterInfo::isVirtualRegister(Reg))
829 ++NumVirtualFrameRegs;
831 // Have we already allocated a scratch register for this virtual?
832 if (Reg != VirtReg) {
833 // When we first encounter a new virtual register, it
834 // must be a definition.
835 assert(MI->getOperand(i).isDef() &&
836 "frame index virtual missing def!");
837 // Scavenge a new scratch register
839 const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(Reg);
840 ScratchReg = RS->scavengeRegister(RC, I, SPAdj);
843 // Replace this reference to the virtual register with the
845 assert (ScratchReg && "Missing scratch register!");
846 MI->getOperand(i).setReg(ScratchReg);