1 //===---------------------- ProcessImplicitDefs.cpp -----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #define DEBUG_TYPE "processimplicitdefs"
12 #include "llvm/CodeGen/ProcessImplicitDefs.h"
14 #include "llvm/ADT/DepthFirstIterator.h"
15 #include "llvm/ADT/SmallSet.h"
16 #include "llvm/Analysis/AliasAnalysis.h"
17 #include "llvm/CodeGen/LiveVariables.h"
18 #include "llvm/CodeGen/MachineInstr.h"
19 #include "llvm/CodeGen/MachineRegisterInfo.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Support/Debug.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetRegisterInfo.h"
28 char ProcessImplicitDefs::ID = 0;
29 static RegisterPass<ProcessImplicitDefs> X("processimpdefs",
30 "Process Implicit Definitions.");
32 void ProcessImplicitDefs::getAnalysisUsage(AnalysisUsage &AU) const {
34 AU.addPreserved<AliasAnalysis>();
35 AU.addPreserved<LiveVariables>();
36 AU.addRequired<LiveVariables>();
37 AU.addPreservedID(MachineLoopInfoID);
38 AU.addPreservedID(MachineDominatorsID);
39 AU.addPreservedID(TwoAddressInstructionPassID);
40 AU.addPreservedID(PHIEliminationID);
41 MachineFunctionPass::getAnalysisUsage(AU);
44 bool ProcessImplicitDefs::CanTurnIntoImplicitDef(MachineInstr *MI,
45 unsigned Reg, unsigned OpIdx,
46 const TargetInstrInfo *tii_) {
47 unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
48 if (tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
52 if (OpIdx == 2 && MI->getOpcode() == TargetInstrInfo::SUBREG_TO_REG)
54 if (OpIdx == 1 && MI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG)
59 /// processImplicitDefs - Process IMPLICIT_DEF instructions and make sure
60 /// there is one implicit_def for each use. Add isUndef marker to
61 /// implicit_def defs and their uses.
62 bool ProcessImplicitDefs::runOnMachineFunction(MachineFunction &fn) {
64 DEBUG(errs() << "********** PROCESS IMPLICIT DEFS **********\n"
65 << "********** Function: "
66 << ((Value*)fn.getFunction())->getName() << '\n');
70 const TargetInstrInfo *tii_ = fn.getTarget().getInstrInfo();
71 const TargetRegisterInfo *tri_ = fn.getTarget().getRegisterInfo();
72 MachineRegisterInfo *mri_ = &fn.getRegInfo();
74 LiveVariables *lv_ = &getAnalysis<LiveVariables>();
76 SmallSet<unsigned, 8> ImpDefRegs;
77 SmallVector<MachineInstr*, 8> ImpDefMIs;
78 MachineBasicBlock *Entry = fn.begin();
79 SmallPtrSet<MachineBasicBlock*,16> Visited;
81 for (df_ext_iterator<MachineBasicBlock*, SmallPtrSet<MachineBasicBlock*,16> >
82 DFI = df_ext_begin(Entry, Visited), E = df_ext_end(Entry, Visited);
84 MachineBasicBlock *MBB = *DFI;
85 for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
87 MachineInstr *MI = &*I;
89 if (MI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {
90 unsigned Reg = MI->getOperand(0).getReg();
91 ImpDefRegs.insert(Reg);
92 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
93 for (const unsigned *SS = tri_->getSubRegisters(Reg); *SS; ++SS)
94 ImpDefRegs.insert(*SS);
96 ImpDefMIs.push_back(MI);
100 if (MI->getOpcode() == TargetInstrInfo::INSERT_SUBREG) {
101 MachineOperand &MO = MI->getOperand(2);
102 if (ImpDefRegs.count(MO.getReg())) {
103 // %reg1032<def> = INSERT_SUBREG %reg1032, undef, 2
104 // This is an identity copy, eliminate it now.
106 LiveVariables::VarInfo& vi = lv_->getVarInfo(MO.getReg());
109 MI->eraseFromParent();
115 bool ChangedToImpDef = false;
116 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
117 MachineOperand& MO = MI->getOperand(i);
118 if (!MO.isReg() || !MO.isUse() || MO.isUndef())
120 unsigned Reg = MO.getReg();
123 if (!ImpDefRegs.count(Reg))
125 // Use is a copy, just turn it into an implicit_def.
126 if (CanTurnIntoImplicitDef(MI, Reg, i, tii_)) {
127 bool isKill = MO.isKill();
128 MI->setDesc(tii_->get(TargetInstrInfo::IMPLICIT_DEF));
129 for (int j = MI->getNumOperands() - 1, ee = 0; j > ee; --j)
130 MI->RemoveOperand(j);
132 ImpDefRegs.erase(Reg);
133 LiveVariables::VarInfo& vi = lv_->getVarInfo(Reg);
136 ChangedToImpDef = true;
143 if (MO.isKill() || MI->isRegTiedToDefOperand(i)) {
144 // Make sure other uses of
145 for (unsigned j = i+1; j != e; ++j) {
146 MachineOperand &MOJ = MI->getOperand(j);
147 if (MOJ.isReg() && MOJ.isUse() && MOJ.getReg() == Reg)
150 ImpDefRegs.erase(Reg);
154 if (ChangedToImpDef) {
155 // Backtrack to process this new implicit_def.
158 for (unsigned i = 0; i != MI->getNumOperands(); ++i) {
159 MachineOperand& MO = MI->getOperand(i);
160 if (!MO.isReg() || !MO.isDef())
162 ImpDefRegs.erase(MO.getReg());
167 // Any outstanding liveout implicit_def's?
168 for (unsigned i = 0, e = ImpDefMIs.size(); i != e; ++i) {
169 MachineInstr *MI = ImpDefMIs[i];
170 unsigned Reg = MI->getOperand(0).getReg();
171 if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
172 !ImpDefRegs.count(Reg)) {
173 // Delete all "local" implicit_def's. That include those which define
174 // physical registers since they cannot be liveout.
175 MI->eraseFromParent();
180 // If there are multiple defs of the same register and at least one
181 // is not an implicit_def, do not insert implicit_def's before the
184 for (MachineRegisterInfo::def_iterator DI = mri_->def_begin(Reg),
185 DE = mri_->def_end(); DI != DE; ++DI) {
186 if (DI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF) {
194 // The only implicit_def which we want to keep are those that are live
196 MI->eraseFromParent();
199 for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(Reg),
200 UE = mri_->use_end(); UI != UE; ) {
201 MachineOperand &RMO = UI.getOperand();
202 MachineInstr *RMI = &*UI;
204 MachineBasicBlock *RMBB = RMI->getParent();
208 // Turn a copy use into an implicit_def.
209 unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
210 if (tii_->isMoveInstr(*RMI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
213 LiveVariables::VarInfo& vi = lv_->getVarInfo(Reg);
216 RMI->setDesc(tii_->get(TargetInstrInfo::IMPLICIT_DEF));
217 for (int j = RMI->getNumOperands() - 1, ee = 0; j > ee; --j)
218 RMI->RemoveOperand(j);
222 const TargetRegisterClass* RC = mri_->getRegClass(Reg);
223 unsigned NewVReg = mri_->createVirtualRegister(RC);