1 //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass eliminates machine instruction PHI nodes by inserting copy
11 // instructions. This destroys SSA information, but is the desired input for
12 // some register allocators.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "phielim"
17 #include "PHIElimination.h"
18 #include "llvm/BasicBlock.h"
19 #include "llvm/Instructions.h"
20 #include "llvm/CodeGen/LiveVariables.h"
21 #include "llvm/CodeGen/Passes.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstr.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/ADT/SmallPtrSet.h"
28 #include "llvm/ADT/STLExtras.h"
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/Support/Compiler.h"
35 STATISTIC(NumAtomic, "Number of atomic phis lowered");
37 char PHIElimination::ID = 0;
38 static RegisterPass<PHIElimination>
39 X("phi-node-elimination", "Eliminate PHI nodes for register allocation");
41 const PassInfo *const llvm::PHIEliminationID = &X;
43 void llvm::PHIElimination::getAnalysisUsage(AnalysisUsage &AU) const {
44 AU.addPreserved<LiveVariables>();
45 AU.addPreservedID(MachineLoopInfoID);
46 AU.addPreservedID(MachineDominatorsID);
47 MachineFunctionPass::getAnalysisUsage(AU);
50 bool llvm::PHIElimination::runOnMachineFunction(MachineFunction &Fn) {
51 MRI = &Fn.getRegInfo();
57 // Eliminate PHI instructions by inserting copies into predecessor blocks.
58 for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
59 Changed |= EliminatePHINodes(Fn, *I);
61 // Remove dead IMPLICIT_DEF instructions.
62 for (SmallPtrSet<MachineInstr*,4>::iterator I = ImpDefs.begin(),
63 E = ImpDefs.end(); I != E; ++I) {
64 MachineInstr *DefMI = *I;
65 unsigned DefReg = DefMI->getOperand(0).getReg();
66 if (MRI->use_empty(DefReg))
67 DefMI->eraseFromParent();
71 VRegPHIUseCount.clear();
76 /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
77 /// predecessor basic blocks.
79 bool llvm::PHIElimination::EliminatePHINodes(MachineFunction &MF,
80 MachineBasicBlock &MBB) {
81 if (MBB.empty() || MBB.front().getOpcode() != TargetInstrInfo::PHI)
82 return false; // Quick exit for basic blocks without PHIs.
84 // Get an iterator to the first instruction after the last PHI node (this may
85 // also be the end of the basic block).
86 MachineBasicBlock::iterator AfterPHIsIt = SkipPHIsAndLabels(MBB, MBB.begin());
88 while (MBB.front().getOpcode() == TargetInstrInfo::PHI)
89 LowerAtomicPHINode(MBB, AfterPHIsIt);
94 /// isSourceDefinedByImplicitDef - Return true if all sources of the phi node
95 /// are implicit_def's.
96 static bool isSourceDefinedByImplicitDef(const MachineInstr *MPhi,
97 const MachineRegisterInfo *MRI) {
98 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2) {
99 unsigned SrcReg = MPhi->getOperand(i).getReg();
100 const MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
101 if (!DefMI || DefMI->getOpcode() != TargetInstrInfo::IMPLICIT_DEF)
107 // FindCopyInsertPoint - Find a safe place in MBB to insert a copy from SrcReg.
108 // This needs to be after any def or uses of SrcReg, but before any subsequent
109 // point where control flow might jump out of the basic block.
110 MachineBasicBlock::iterator
111 llvm::PHIElimination::FindCopyInsertPoint(MachineBasicBlock &MBB,
113 // Handle the trivial case trivially.
117 // If this basic block does not contain an invoke, then control flow always
118 // reaches the end of it, so place the copy there. The logic below works in
119 // this case too, but is more expensive.
120 if (!isa<InvokeInst>(MBB.getBasicBlock()->getTerminator()))
121 return MBB.getFirstTerminator();
123 // Discover any definition/uses in this basic block.
124 SmallPtrSet<MachineInstr*, 8> DefUsesInMBB;
125 for (MachineRegisterInfo::reg_iterator RI = MRI->reg_begin(SrcReg),
126 RE = MRI->reg_end(); RI != RE; ++RI) {
127 MachineInstr *DefUseMI = &*RI;
128 if (DefUseMI->getParent() == &MBB)
129 DefUsesInMBB.insert(DefUseMI);
132 MachineBasicBlock::iterator InsertPoint;
133 if (DefUsesInMBB.empty()) {
134 // No def/uses. Insert the copy at the start of the basic block.
135 InsertPoint = MBB.begin();
136 } else if (DefUsesInMBB.size() == 1) {
137 // Insert the copy immediately after the definition/use.
138 InsertPoint = *DefUsesInMBB.begin();
141 // Insert the copy immediately after the last definition/use.
142 InsertPoint = MBB.end();
143 while (!DefUsesInMBB.count(&*--InsertPoint)) {}
147 // Make sure the copy goes after any phi nodes however.
148 return SkipPHIsAndLabels(MBB, InsertPoint);
151 /// LowerAtomicPHINode - Lower the PHI node at the top of the specified block,
152 /// under the assuption that it needs to be lowered in a way that supports
153 /// atomic execution of PHIs. This lowering method is always correct all of the
156 void llvm::PHIElimination::LowerAtomicPHINode(
157 MachineBasicBlock &MBB,
158 MachineBasicBlock::iterator AfterPHIsIt) {
159 // Unlink the PHI node from the basic block, but don't delete the PHI yet.
160 MachineInstr *MPhi = MBB.remove(MBB.begin());
162 unsigned NumSrcs = (MPhi->getNumOperands() - 1) / 2;
163 unsigned DestReg = MPhi->getOperand(0).getReg();
164 bool isDead = MPhi->getOperand(0).isDead();
166 // Create a new register for the incoming PHI arguments.
167 MachineFunction &MF = *MBB.getParent();
168 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
169 unsigned IncomingReg = 0;
171 // Insert a register to register copy at the top of the current block (but
172 // after any remaining phi nodes) which copies the new incoming register
173 // into the phi node destination.
174 const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
175 if (isSourceDefinedByImplicitDef(MPhi, MRI))
176 // If all sources of a PHI node are implicit_def, just emit an
177 // implicit_def instead of a copy.
178 BuildMI(MBB, AfterPHIsIt, MPhi->getDebugLoc(),
179 TII->get(TargetInstrInfo::IMPLICIT_DEF), DestReg);
181 IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
182 TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
185 // Update live variable information if there is any.
186 LiveVariables *LV = getAnalysisIfAvailable<LiveVariables>();
188 MachineInstr *PHICopy = prior(AfterPHIsIt);
191 // Increment use count of the newly created virtual register.
192 LV->getVarInfo(IncomingReg).NumUses++;
194 // Add information to LiveVariables to know that the incoming value is
195 // killed. Note that because the value is defined in several places (once
196 // each for each incoming block), the "def" block and instruction fields
197 // for the VarInfo is not filled in.
198 LV->addVirtualRegisterKilled(IncomingReg, PHICopy);
201 // Since we are going to be deleting the PHI node, if it is the last use of
202 // any registers, or if the value itself is dead, we need to move this
203 // information over to the new copy we just inserted.
204 LV->removeVirtualRegistersKilled(MPhi);
206 // If the result is dead, update LV.
208 LV->addVirtualRegisterDead(DestReg, PHICopy);
209 LV->removeVirtualRegisterDead(DestReg, MPhi);
213 // Adjust the VRegPHIUseCount map to account for the removal of this PHI node.
214 for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
215 --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i + 1).getMBB(),
216 MPhi->getOperand(i).getReg())];
218 // Now loop over all of the incoming arguments, changing them to copy into the
219 // IncomingReg register in the corresponding predecessor basic block.
220 SmallPtrSet<MachineBasicBlock*, 8> MBBsInsertedInto;
221 for (int i = NumSrcs - 1; i >= 0; --i) {
222 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
223 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
224 "Machine PHI Operands must all be virtual registers!");
226 // If source is defined by an implicit def, there is no need to insert a
228 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
229 if (DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF) {
230 ImpDefs.insert(DefMI);
234 // Get the MachineBasicBlock equivalent of the BasicBlock that is the source
236 MachineBasicBlock &opBlock = *MPhi->getOperand(i*2+2).getMBB();
238 // Check to make sure we haven't already emitted the copy for this block.
239 // This can happen because PHI nodes may have multiple entries for the same
241 if (!MBBsInsertedInto.insert(&opBlock))
242 continue; // If the copy has already been emitted, we're done.
244 // Find a safe location to insert the copy, this may be the first terminator
245 // in the block (or end()).
246 MachineBasicBlock::iterator InsertPos = FindCopyInsertPoint(opBlock, SrcReg);
249 TII->copyRegToReg(opBlock, InsertPos, IncomingReg, SrcReg, RC, RC);
251 // Now update live variable information if we have it. Otherwise we're done
254 // We want to be able to insert a kill of the register if this PHI (aka, the
255 // copy we just inserted) is the last use of the source value. Live
256 // variable analysis conservatively handles this by saying that the value is
257 // live until the end of the block the PHI entry lives in. If the value
258 // really is dead at the PHI copy, there will be no successor blocks which
259 // have the value live-in.
261 // Check to see if the copy is the last use, and if so, update the live
262 // variables information so that it knows the copy source instruction kills
263 // the incoming value.
264 LiveVariables::VarInfo &InRegVI = LV->getVarInfo(SrcReg);
266 // Loop over all of the successors of the basic block, checking to see if
267 // the value is either live in the block, or if it is killed in the block.
268 // Also check to see if this register is in use by another PHI node which
269 // has not yet been eliminated. If so, it will be killed at an appropriate
272 // Is it used by any PHI instructions in this block?
273 bool ValueIsLive = VRegPHIUseCount[BBVRegPair(&opBlock, SrcReg)] != 0;
275 std::vector<MachineBasicBlock*> OpSuccBlocks;
277 // Otherwise, scan successors, including the BB the PHI node lives in.
278 for (MachineBasicBlock::succ_iterator SI = opBlock.succ_begin(),
279 E = opBlock.succ_end(); SI != E && !ValueIsLive; ++SI) {
280 MachineBasicBlock *SuccMBB = *SI;
282 // Is it alive in this successor?
283 unsigned SuccIdx = SuccMBB->getNumber();
284 if (InRegVI.AliveBlocks.test(SuccIdx)) {
289 OpSuccBlocks.push_back(SuccMBB);
292 // Check to see if this value is live because there is a use in a successor
295 switch (OpSuccBlocks.size()) {
297 MachineBasicBlock *MBB = OpSuccBlocks[0];
298 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
299 if (InRegVI.Kills[i]->getParent() == MBB) {
306 MachineBasicBlock *MBB1 = OpSuccBlocks[0], *MBB2 = OpSuccBlocks[1];
307 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
308 if (InRegVI.Kills[i]->getParent() == MBB1 ||
309 InRegVI.Kills[i]->getParent() == MBB2) {
316 std::sort(OpSuccBlocks.begin(), OpSuccBlocks.end());
317 for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i)
318 if (std::binary_search(OpSuccBlocks.begin(), OpSuccBlocks.end(),
319 InRegVI.Kills[i]->getParent())) {
326 // Okay, if we now know that the value is not live out of the block, we can
327 // add a kill marker in this block saying that it kills the incoming value!
329 // In our final twist, we have to decide which instruction kills the
330 // register. In most cases this is the copy, however, the first
331 // terminator instruction at the end of the block may also use the value.
332 // In this case, we should mark *it* as being the killing block, not the
334 MachineBasicBlock::iterator KillInst = prior(InsertPos);
335 MachineBasicBlock::iterator Term = opBlock.getFirstTerminator();
336 if (Term != opBlock.end()) {
337 if (Term->readsRegister(SrcReg))
340 // Check that no other terminators use values.
342 for (MachineBasicBlock::iterator TI = next(Term); TI != opBlock.end();
344 assert(!TI->readsRegister(SrcReg) &&
345 "Terminator instructions cannot use virtual registers unless"
346 "they are the first terminator in a block!");
351 // Finally, mark it killed.
352 LV->addVirtualRegisterKilled(SrcReg, KillInst);
354 // This vreg no longer lives all of the way through opBlock.
355 unsigned opBlockNum = opBlock.getNumber();
356 InRegVI.AliveBlocks.reset(opBlockNum);
360 // Really delete the PHI instruction now!
361 MF.DeleteMachineInstr(MPhi);
365 /// analyzePHINodes - Gather information about the PHI nodes in here. In
366 /// particular, we want to map the number of uses of a virtual register which is
367 /// used in a PHI node. We map that to the BB the vreg is coming from. This is
368 /// used later to determine when the vreg is killed in the BB.
370 void llvm::PHIElimination::analyzePHINodes(const MachineFunction& Fn) {
371 for (MachineFunction::const_iterator I = Fn.begin(), E = Fn.end();
373 for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
374 BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
375 for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
376 ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i + 1).getMBB(),
377 BBI->getOperand(i).getReg())];