1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the parsing of machine instructions.
12 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/StringMap.h"
17 #include "llvm/AsmParser/SlotMapping.h"
18 #include "llvm/CodeGen/MachineBasicBlock.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/IR/Instructions.h"
24 #include "llvm/IR/Module.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Support/SourceMgr.h"
27 #include "llvm/Target/TargetSubtargetInfo.h"
28 #include "llvm/Target/TargetInstrInfo.h"
34 struct StringValueUtility {
36 std::string UnescapedString;
38 StringValueUtility(const MIToken &Token) {
39 if (Token.isStringValueQuoted()) {
40 Token.unescapeQuotedStringValue(UnescapedString);
41 String = UnescapedString;
44 String = Token.stringValue();
47 operator StringRef() const { return String; }
50 /// A wrapper struct around the 'MachineOperand' struct that includes a source
52 struct MachineOperandWithLocation {
53 MachineOperand Operand;
54 StringRef::iterator Begin;
55 StringRef::iterator End;
57 MachineOperandWithLocation(const MachineOperand &Operand,
58 StringRef::iterator Begin, StringRef::iterator End)
59 : Operand(Operand), Begin(Begin), End(End) {}
66 StringRef Source, CurrentSource;
68 const PerFunctionMIParsingState &PFS;
69 /// Maps from indices to unnamed global values and metadata nodes.
70 const SlotMapping &IRSlots;
71 /// Maps from instruction names to op codes.
72 StringMap<unsigned> Names2InstrOpCodes;
73 /// Maps from register names to registers.
74 StringMap<unsigned> Names2Regs;
75 /// Maps from register mask names to register masks.
76 StringMap<const uint32_t *> Names2RegMasks;
77 /// Maps from subregister names to subregister indices.
78 StringMap<unsigned> Names2SubRegIndices;
81 MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
82 StringRef Source, const PerFunctionMIParsingState &PFS,
83 const SlotMapping &IRSlots);
87 /// Report an error at the current location with the given message.
89 /// This function always return true.
90 bool error(const Twine &Msg);
92 /// Report an error at the given location with the given message.
94 /// This function always return true.
95 bool error(StringRef::iterator Loc, const Twine &Msg);
97 bool parse(MachineInstr *&MI);
98 bool parseMBB(MachineBasicBlock *&MBB);
99 bool parseNamedRegister(unsigned &Reg);
101 bool parseRegister(unsigned &Reg);
102 bool parseRegisterFlag(unsigned &Flags);
103 bool parseSubRegisterIndex(unsigned &SubReg);
104 bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
105 bool parseImmediateOperand(MachineOperand &Dest);
106 bool parseMBBReference(MachineBasicBlock *&MBB);
107 bool parseMBBOperand(MachineOperand &Dest);
108 bool parseStackObjectOperand(MachineOperand &Dest);
109 bool parseFixedStackObjectOperand(MachineOperand &Dest);
110 bool parseGlobalAddressOperand(MachineOperand &Dest);
111 bool parseConstantPoolIndexOperand(MachineOperand &Dest);
112 bool parseJumpTableIndexOperand(MachineOperand &Dest);
113 bool parseExternalSymbolOperand(MachineOperand &Dest);
114 bool parseMachineOperand(MachineOperand &Dest);
117 /// Convert the integer literal in the current token into an unsigned integer.
119 /// Return true if an error occurred.
120 bool getUnsigned(unsigned &Result);
122 void initNames2InstrOpCodes();
124 /// Try to convert an instruction name to an opcode. Return true if the
125 /// instruction name is invalid.
126 bool parseInstrName(StringRef InstrName, unsigned &OpCode);
128 bool parseInstruction(unsigned &OpCode, unsigned &Flags);
130 bool verifyImplicitOperands(ArrayRef<MachineOperandWithLocation> Operands,
131 const MCInstrDesc &MCID);
133 void initNames2Regs();
135 /// Try to convert a register name to a register number. Return true if the
136 /// register name is invalid.
137 bool getRegisterByName(StringRef RegName, unsigned &Reg);
139 void initNames2RegMasks();
141 /// Check if the given identifier is a name of a register mask.
143 /// Return null if the identifier isn't a register mask.
144 const uint32_t *getRegMask(StringRef Identifier);
146 void initNames2SubRegIndices();
148 /// Check if the given identifier is a name of a subregister index.
150 /// Return 0 if the name isn't a subregister index class.
151 unsigned getSubRegIndex(StringRef Name);
154 } // end anonymous namespace
156 MIParser::MIParser(SourceMgr &SM, MachineFunction &MF, SMDiagnostic &Error,
157 StringRef Source, const PerFunctionMIParsingState &PFS,
158 const SlotMapping &IRSlots)
159 : SM(SM), MF(MF), Error(Error), Source(Source), CurrentSource(Source),
160 Token(MIToken::Error, StringRef()), PFS(PFS), IRSlots(IRSlots) {}
162 void MIParser::lex() {
163 CurrentSource = lexMIToken(
164 CurrentSource, Token,
165 [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
168 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
170 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
171 assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
172 Error = SMDiagnostic(
174 SM.getMemoryBuffer(SM.getMainFileID())->getBufferIdentifier(), 1,
175 Loc - Source.data(), SourceMgr::DK_Error, Msg.str(), Source, None, None);
179 bool MIParser::parse(MachineInstr *&MI) {
182 // Parse any register operands before '='
183 // TODO: Allow parsing of multiple operands before '='
184 MachineOperand MO = MachineOperand::CreateImm(0);
185 SmallVector<MachineOperandWithLocation, 8> Operands;
186 if (Token.isRegister() || Token.isRegisterFlag()) {
187 auto Loc = Token.location();
188 if (parseRegisterOperand(MO, /*IsDef=*/true))
190 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
191 if (Token.isNot(MIToken::equal))
192 return error("expected '='");
196 unsigned OpCode, Flags = 0;
197 if (Token.isError() || parseInstruction(OpCode, Flags))
200 // TODO: Parse the bundle instruction flags and memory operands.
202 // Parse the remaining machine operands.
203 while (Token.isNot(MIToken::Eof)) {
204 auto Loc = Token.location();
205 if (parseMachineOperand(MO))
207 Operands.push_back(MachineOperandWithLocation(MO, Loc, Token.location()));
208 if (Token.is(MIToken::Eof))
210 if (Token.isNot(MIToken::comma))
211 return error("expected ',' before the next machine operand");
215 const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
216 if (!MCID.isVariadic()) {
217 // FIXME: Move the implicit operand verification to the machine verifier.
218 if (verifyImplicitOperands(Operands, MCID))
222 // TODO: Check for extraneous machine operands.
223 MI = MF.CreateMachineInstr(MCID, DebugLoc(), /*NoImplicit=*/true);
225 for (const auto &Operand : Operands)
226 MI->addOperand(MF, Operand.Operand);
230 bool MIParser::parseMBB(MachineBasicBlock *&MBB) {
232 if (Token.isNot(MIToken::MachineBasicBlock))
233 return error("expected a machine basic block reference");
234 if (parseMBBReference(MBB))
237 if (Token.isNot(MIToken::Eof))
239 "expected end of string after the machine basic block reference");
243 bool MIParser::parseNamedRegister(unsigned &Reg) {
245 if (Token.isNot(MIToken::NamedRegister))
246 return error("expected a named register");
247 if (parseRegister(Reg))
250 if (Token.isNot(MIToken::Eof))
251 return error("expected end of string after the register reference");
255 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
256 assert(MO.isImplicit());
257 return MO.isDef() ? "implicit-def" : "implicit";
260 static std::string getRegisterName(const TargetRegisterInfo *TRI,
262 assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg");
263 return StringRef(TRI->getName(Reg)).lower();
266 bool MIParser::verifyImplicitOperands(
267 ArrayRef<MachineOperandWithLocation> Operands, const MCInstrDesc &MCID) {
269 // We can't verify call instructions as they can contain arbitrary implicit
270 // register and register mask operands.
273 // Gather all the expected implicit operands.
274 SmallVector<MachineOperand, 4> ImplicitOperands;
275 if (MCID.ImplicitDefs)
276 for (const uint16_t *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
277 ImplicitOperands.push_back(
278 MachineOperand::CreateReg(*ImpDefs, true, true));
279 if (MCID.ImplicitUses)
280 for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
281 ImplicitOperands.push_back(
282 MachineOperand::CreateReg(*ImpUses, false, true));
284 const auto *TRI = MF.getSubtarget().getRegisterInfo();
285 assert(TRI && "Expected target register info");
286 size_t I = ImplicitOperands.size(), J = Operands.size();
291 const auto &ImplicitOperand = ImplicitOperands[I];
292 const auto &Operand = Operands[J].Operand;
293 if (ImplicitOperand.isIdenticalTo(Operand))
295 if (Operand.isReg() && Operand.isImplicit()) {
296 return error(Operands[J].Begin,
297 Twine("expected an implicit register operand '") +
298 printImplicitRegisterFlag(ImplicitOperand) + " %" +
299 getRegisterName(TRI, ImplicitOperand.getReg()) + "'");
302 // TODO: Fix source location when Operands[J].end is right before '=', i.e:
303 // insead of reporting an error at this location:
306 // report the error at the following location:
309 return error(J < Operands.size() ? Operands[J].End : Token.location(),
310 Twine("missing implicit register operand '") +
311 printImplicitRegisterFlag(ImplicitOperands[I]) + " %" +
312 getRegisterName(TRI, ImplicitOperands[I].getReg()) + "'");
317 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
318 if (Token.is(MIToken::kw_frame_setup)) {
319 Flags |= MachineInstr::FrameSetup;
322 if (Token.isNot(MIToken::Identifier))
323 return error("expected a machine instruction");
324 StringRef InstrName = Token.stringValue();
325 if (parseInstrName(InstrName, OpCode))
326 return error(Twine("unknown machine instruction name '") + InstrName + "'");
331 bool MIParser::parseRegister(unsigned &Reg) {
332 switch (Token.kind()) {
333 case MIToken::underscore:
336 case MIToken::NamedRegister: {
337 StringRef Name = Token.stringValue();
338 if (getRegisterByName(Name, Reg))
339 return error(Twine("unknown register name '") + Name + "'");
342 case MIToken::VirtualRegister: {
346 const auto RegInfo = PFS.VirtualRegisterSlots.find(ID);
347 if (RegInfo == PFS.VirtualRegisterSlots.end())
348 return error(Twine("use of undefined virtual register '%") + Twine(ID) +
350 Reg = RegInfo->second;
353 // TODO: Parse other register kinds.
355 llvm_unreachable("The current token should be a register");
360 bool MIParser::parseRegisterFlag(unsigned &Flags) {
361 switch (Token.kind()) {
362 case MIToken::kw_implicit:
363 Flags |= RegState::Implicit;
365 case MIToken::kw_implicit_define:
366 Flags |= RegState::ImplicitDefine;
368 case MIToken::kw_dead:
369 Flags |= RegState::Dead;
371 case MIToken::kw_killed:
372 Flags |= RegState::Kill;
374 case MIToken::kw_undef:
375 Flags |= RegState::Undef;
377 // TODO: report an error when we specify the same flag more than once.
378 // TODO: parse the other register flags.
380 llvm_unreachable("The current token should be a register flag");
386 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
387 assert(Token.is(MIToken::colon));
389 if (Token.isNot(MIToken::Identifier))
390 return error("expected a subregister index after ':'");
391 auto Name = Token.stringValue();
392 SubReg = getSubRegIndex(Name);
394 return error(Twine("use of unknown subregister index '") + Name + "'");
399 bool MIParser::parseRegisterOperand(MachineOperand &Dest, bool IsDef) {
401 unsigned Flags = IsDef ? RegState::Define : 0;
402 while (Token.isRegisterFlag()) {
403 if (parseRegisterFlag(Flags))
406 if (!Token.isRegister())
407 return error("expected a register after register flags");
408 if (parseRegister(Reg))
412 if (Token.is(MIToken::colon)) {
413 if (parseSubRegisterIndex(SubReg))
416 Dest = MachineOperand::CreateReg(
417 Reg, Flags & RegState::Define, Flags & RegState::Implicit,
418 Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
419 /*isEarlyClobber=*/false, SubReg);
423 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
424 assert(Token.is(MIToken::IntegerLiteral));
425 const APSInt &Int = Token.integerValue();
426 if (Int.getMinSignedBits() > 64)
427 // TODO: Replace this with an error when we can parse CIMM Machine Operands.
428 llvm_unreachable("Can't parse large integer literals yet!");
429 Dest = MachineOperand::CreateImm(Int.getExtValue());
434 bool MIParser::getUnsigned(unsigned &Result) {
435 assert(Token.hasIntegerValue() && "Expected a token with an integer value");
436 const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
437 uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
439 return error("expected 32-bit integer (too large)");
444 bool MIParser::parseMBBReference(MachineBasicBlock *&MBB) {
445 assert(Token.is(MIToken::MachineBasicBlock));
447 if (getUnsigned(Number))
449 auto MBBInfo = PFS.MBBSlots.find(Number);
450 if (MBBInfo == PFS.MBBSlots.end())
451 return error(Twine("use of undefined machine basic block #") +
453 MBB = MBBInfo->second;
454 if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
455 return error(Twine("the name of machine basic block #") + Twine(Number) +
456 " isn't '" + Token.stringValue() + "'");
460 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
461 MachineBasicBlock *MBB;
462 if (parseMBBReference(MBB))
464 Dest = MachineOperand::CreateMBB(MBB);
469 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
470 assert(Token.is(MIToken::StackObject));
474 auto ObjectInfo = PFS.StackObjectSlots.find(ID);
475 if (ObjectInfo == PFS.StackObjectSlots.end())
476 return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
479 if (const auto *Alloca =
480 MF.getFrameInfo()->getObjectAllocation(ObjectInfo->second))
481 Name = Alloca->getName();
482 if (!Token.stringValue().empty() && Token.stringValue() != Name)
483 return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
484 "' isn't '" + Token.stringValue() + "'");
486 Dest = MachineOperand::CreateFI(ObjectInfo->second);
490 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
491 assert(Token.is(MIToken::FixedStackObject));
495 auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
496 if (ObjectInfo == PFS.FixedStackObjectSlots.end())
497 return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
500 Dest = MachineOperand::CreateFI(ObjectInfo->second);
504 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
505 switch (Token.kind()) {
506 case MIToken::NamedGlobalValue:
507 case MIToken::QuotedNamedGlobalValue: {
508 StringValueUtility Name(Token);
509 const Module *M = MF.getFunction()->getParent();
510 if (const auto *GV = M->getNamedValue(Name)) {
511 Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
514 return error(Twine("use of undefined global value '@") +
515 Token.rawStringValue() + "'");
517 case MIToken::GlobalValue: {
519 if (getUnsigned(GVIdx))
521 if (GVIdx >= IRSlots.GlobalValues.size())
522 return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
524 Dest = MachineOperand::CreateGA(IRSlots.GlobalValues[GVIdx],
529 llvm_unreachable("The current token should be a global value");
531 // TODO: Parse offset and target flags.
536 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
537 assert(Token.is(MIToken::ConstantPoolItem));
541 auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
542 if (ConstantInfo == PFS.ConstantPoolSlots.end())
543 return error("use of undefined constant '%const." + Twine(ID) + "'");
545 // TODO: Parse offset and target flags.
546 Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
550 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
551 assert(Token.is(MIToken::JumpTableIndex));
555 auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
556 if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
557 return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
559 // TODO: Parse target flags.
560 Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
564 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
565 assert(Token.is(MIToken::ExternalSymbol) ||
566 Token.is(MIToken::QuotedExternalSymbol));
567 StringValueUtility Name(Token);
568 const char *Symbol = MF.createExternalSymbolName(Name);
570 // TODO: Parse the target flags.
571 Dest = MachineOperand::CreateES(Symbol);
575 bool MIParser::parseMachineOperand(MachineOperand &Dest) {
576 switch (Token.kind()) {
577 case MIToken::kw_implicit:
578 case MIToken::kw_implicit_define:
579 case MIToken::kw_dead:
580 case MIToken::kw_killed:
581 case MIToken::kw_undef:
582 case MIToken::underscore:
583 case MIToken::NamedRegister:
584 case MIToken::VirtualRegister:
585 return parseRegisterOperand(Dest);
586 case MIToken::IntegerLiteral:
587 return parseImmediateOperand(Dest);
588 case MIToken::MachineBasicBlock:
589 return parseMBBOperand(Dest);
590 case MIToken::StackObject:
591 return parseStackObjectOperand(Dest);
592 case MIToken::FixedStackObject:
593 return parseFixedStackObjectOperand(Dest);
594 case MIToken::GlobalValue:
595 case MIToken::NamedGlobalValue:
596 case MIToken::QuotedNamedGlobalValue:
597 return parseGlobalAddressOperand(Dest);
598 case MIToken::ConstantPoolItem:
599 return parseConstantPoolIndexOperand(Dest);
600 case MIToken::JumpTableIndex:
601 return parseJumpTableIndexOperand(Dest);
602 case MIToken::ExternalSymbol:
603 case MIToken::QuotedExternalSymbol:
604 return parseExternalSymbolOperand(Dest);
607 case MIToken::Identifier:
608 if (const auto *RegMask = getRegMask(Token.stringValue())) {
609 Dest = MachineOperand::CreateRegMask(RegMask);
615 // TODO: parse the other machine operands.
616 return error("expected a machine operand");
621 void MIParser::initNames2InstrOpCodes() {
622 if (!Names2InstrOpCodes.empty())
624 const auto *TII = MF.getSubtarget().getInstrInfo();
625 assert(TII && "Expected target instruction info");
626 for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
627 Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
630 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
631 initNames2InstrOpCodes();
632 auto InstrInfo = Names2InstrOpCodes.find(InstrName);
633 if (InstrInfo == Names2InstrOpCodes.end())
635 OpCode = InstrInfo->getValue();
639 void MIParser::initNames2Regs() {
640 if (!Names2Regs.empty())
642 // The '%noreg' register is the register 0.
643 Names2Regs.insert(std::make_pair("noreg", 0));
644 const auto *TRI = MF.getSubtarget().getRegisterInfo();
645 assert(TRI && "Expected target register info");
646 for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
648 Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
651 assert(WasInserted && "Expected registers to be unique case-insensitively");
655 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
657 auto RegInfo = Names2Regs.find(RegName);
658 if (RegInfo == Names2Regs.end())
660 Reg = RegInfo->getValue();
664 void MIParser::initNames2RegMasks() {
665 if (!Names2RegMasks.empty())
667 const auto *TRI = MF.getSubtarget().getRegisterInfo();
668 assert(TRI && "Expected target register info");
669 ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
670 ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
671 assert(RegMasks.size() == RegMaskNames.size());
672 for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
673 Names2RegMasks.insert(
674 std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
677 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
678 initNames2RegMasks();
679 auto RegMaskInfo = Names2RegMasks.find(Identifier);
680 if (RegMaskInfo == Names2RegMasks.end())
682 return RegMaskInfo->getValue();
685 void MIParser::initNames2SubRegIndices() {
686 if (!Names2SubRegIndices.empty())
688 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
689 for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
690 Names2SubRegIndices.insert(
691 std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
694 unsigned MIParser::getSubRegIndex(StringRef Name) {
695 initNames2SubRegIndices();
696 auto SubRegInfo = Names2SubRegIndices.find(Name);
697 if (SubRegInfo == Names2SubRegIndices.end())
699 return SubRegInfo->getValue();
702 bool llvm::parseMachineInstr(MachineInstr *&MI, SourceMgr &SM,
703 MachineFunction &MF, StringRef Src,
704 const PerFunctionMIParsingState &PFS,
705 const SlotMapping &IRSlots, SMDiagnostic &Error) {
706 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parse(MI);
709 bool llvm::parseMBBReference(MachineBasicBlock *&MBB, SourceMgr &SM,
710 MachineFunction &MF, StringRef Src,
711 const PerFunctionMIParsingState &PFS,
712 const SlotMapping &IRSlots, SMDiagnostic &Error) {
713 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseMBB(MBB);
716 bool llvm::parseNamedRegisterReference(unsigned &Reg, SourceMgr &SM,
717 MachineFunction &MF, StringRef Src,
718 const PerFunctionMIParsingState &PFS,
719 const SlotMapping &IRSlots,
720 SMDiagnostic &Error) {
721 return MIParser(SM, MF, Error, Src, PFS, IRSlots).parseNamedRegister(Reg);