1 //===-- LiveIntervalUnion.cpp - Live interval union data structure --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // LiveIntervalUnion represents a coalesced set of live intervals. This may be
11 // used during coalescing to represent a congruence class, or during register
12 // allocation to model liveness of a physical register.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "regalloc"
17 #include "LiveIntervalUnion.h"
18 #include "llvm/ADT/SparseBitVector.h"
19 #include "llvm/CodeGen/MachineLoopRanges.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include "llvm/Target/TargetRegisterInfo.h"
27 // Merge a LiveInterval's segments. Guarantee no overlaps.
28 void LiveIntervalUnion::unify(LiveInterval &VirtReg) {
33 // Insert each of the virtual register's live segments into the map.
34 LiveInterval::iterator RegPos = VirtReg.begin();
35 LiveInterval::iterator RegEnd = VirtReg.end();
36 SegmentIter SegPos = Segments.find(RegPos->start);
38 while (SegPos.valid()) {
39 SegPos.insert(RegPos->start, RegPos->end, &VirtReg);
40 if (++RegPos == RegEnd)
42 SegPos.advanceTo(RegPos->start);
45 // We have reached the end of Segments, so it is no longer necessary to search
46 // for the insertion position.
47 // It is faster to insert the end first.
49 SegPos.insert(RegEnd->start, RegEnd->end, &VirtReg);
50 for (; RegPos != RegEnd; ++RegPos, ++SegPos)
51 SegPos.insert(RegPos->start, RegPos->end, &VirtReg);
54 // Remove a live virtual register's segments from this union.
55 void LiveIntervalUnion::extract(LiveInterval &VirtReg) {
60 // Remove each of the virtual register's live segments from the map.
61 LiveInterval::iterator RegPos = VirtReg.begin();
62 LiveInterval::iterator RegEnd = VirtReg.end();
63 SegmentIter SegPos = Segments.find(RegPos->start);
66 assert(SegPos.value() == &VirtReg && "Inconsistent LiveInterval");
71 // Skip all segments that may have been coalesced.
72 RegPos = VirtReg.advanceTo(RegPos, SegPos.start());
76 SegPos.advanceTo(RegPos->start);
81 LiveIntervalUnion::print(raw_ostream &OS, const TargetRegisterInfo *TRI) const {
82 OS << "LIU " << PrintReg(RepReg, TRI);
87 for (LiveSegments::const_iterator SI = Segments.begin(); SI.valid(); ++SI) {
88 OS << " [" << SI.start() << ' ' << SI.stop() << "):"
89 << PrintReg(SI.value()->reg, TRI);
95 // Verify the live intervals in this union and add them to the visited set.
96 void LiveIntervalUnion::verify(LiveVirtRegBitSet& VisitedVRegs) {
97 for (SegmentIter SI = Segments.begin(); SI.valid(); ++SI)
98 VisitedVRegs.set(SI.value()->reg);
102 // Private interface accessed by Query.
104 // Find a pair of segments that intersect, one in the live virtual register
105 // (LiveInterval), and the other in this LiveIntervalUnion. The caller (Query)
106 // is responsible for advancing the LiveIntervalUnion segments to find a
107 // "notable" intersection, which requires query-specific logic.
109 // This design assumes only a fast mechanism for intersecting a single live
110 // virtual register segment with a set of LiveIntervalUnion segments. This may
111 // be ok since most virtual registers have very few segments. If we had a data
112 // structure that optimizd MxN intersection of segments, then we would bypass
113 // the loop that advances within the LiveInterval.
115 // If no intersection exists, set VirtRegI = VirtRegEnd, and set SI to the first
116 // segment whose start point is greater than LiveInterval's end point.
118 // Assumes that segments are sorted by start position in both
119 // LiveInterval and LiveSegments.
120 void LiveIntervalUnion::Query::findIntersection() {
121 // Search until reaching the end of the LiveUnion segments.
122 LiveInterval::iterator VirtRegEnd = VirtReg->end();
123 if (VirtRegI == VirtRegEnd)
125 while (LiveUnionI.valid()) {
126 // Slowly advance the live virtual reg iterator until we surpass the next
127 // segment in LiveUnion.
129 // Note: If this is ever used for coalescing of fixed registers and we have
130 // a live vreg with thousands of segments, then change this code to use
131 // upperBound instead.
132 VirtRegI = VirtReg->advanceTo(VirtRegI, LiveUnionI.start());
133 if (VirtRegI == VirtRegEnd)
134 break; // Retain current (nonoverlapping) LiveUnionI
136 // VirtRegI may have advanced far beyond LiveUnionI, catch up.
137 LiveUnionI.advanceTo(VirtRegI->start);
139 // Check if no LiveUnionI exists with VirtRegI->Start < LiveUnionI.end
140 if (!LiveUnionI.valid())
142 if (LiveUnionI.start() < VirtRegI->end) {
143 assert(overlap(*VirtRegI, LiveUnionI) && "upperBound postcondition");
147 if (!LiveUnionI.valid())
148 VirtRegI = VirtRegEnd;
151 // Scan the vector of interfering virtual registers in this union. Assume it's
153 bool LiveIntervalUnion::Query::isSeenInterference(LiveInterval *VirtReg) const {
154 SmallVectorImpl<LiveInterval*>::const_iterator I =
155 std::find(InterferingVRegs.begin(), InterferingVRegs.end(), VirtReg);
156 return I != InterferingVRegs.end();
159 // Count the number of virtual registers in this union that interfere with this
160 // query's live virtual register.
162 // The number of times that we either advance IR.VirtRegI or call
163 // LiveUnion.upperBound() will be no more than the number of holes in
164 // VirtReg. So each invocation of collectInterferingVRegs() takes
165 // time proportional to |VirtReg Holes| * time(LiveUnion.upperBound()).
167 // For comments on how to speed it up, see Query::findIntersection().
168 unsigned LiveIntervalUnion::Query::
169 collectInterferingVRegs(unsigned MaxInterferingRegs) {
170 // Fast path return if we already have the desired information.
171 if (SeenAllInterferences || InterferingVRegs.size() >= MaxInterferingRegs)
172 return InterferingVRegs.size();
174 // Set up iterators on the first call.
175 if (!CheckedFirstInterference) {
176 CheckedFirstInterference = true;
177 LiveUnionI.setMap(LiveUnion->getMap());
179 // Quickly skip interference check for empty sets.
180 if (VirtReg->empty() || LiveUnion->empty()) {
181 VirtRegI = VirtReg->end();
182 } else if (VirtReg->beginIndex() < LiveUnion->startIndex()) {
183 // VirtReg starts first, perform double binary search.
184 VirtRegI = VirtReg->find(LiveUnion->startIndex());
185 if (VirtRegI != VirtReg->end())
186 LiveUnionI.find(VirtRegI->start);
188 // LiveUnion starts first, perform double binary search.
189 LiveUnionI.find(VirtReg->beginIndex());
190 if (LiveUnionI.valid())
191 VirtRegI = VirtReg->find(LiveUnionI.start());
193 VirtRegI = VirtReg->end();
196 assert((VirtRegI == VirtReg->end() || LiveUnionI.valid())
197 && "Uninitialized iterator");
200 LiveInterval::iterator VirtRegEnd = VirtReg->end();
201 LiveInterval *RecentInterferingVReg = NULL;
202 if (VirtRegI != VirtRegEnd) while (LiveUnionI.valid()) {
203 // Advance the union's iterator to reach an unseen interfering vreg.
205 if (LiveUnionI.value() == RecentInterferingVReg)
208 if (!isSeenInterference(LiveUnionI.value()))
211 // Cache the most recent interfering vreg to bypass isSeenInterference.
212 RecentInterferingVReg = LiveUnionI.value();
214 } while ((++LiveUnionI).valid());
215 if (!LiveUnionI.valid())
218 // Advance the VirtReg iterator until surpassing the next segment in
220 VirtRegI = VirtReg->advanceTo(VirtRegI, LiveUnionI.start());
221 if (VirtRegI == VirtRegEnd)
224 // Check for intersection with the union's segment.
225 if (overlap(*VirtRegI, LiveUnionI)) {
227 if (!LiveUnionI.value()->isSpillable())
228 SeenUnspillableVReg = true;
230 if (InterferingVRegs.size() == MaxInterferingRegs)
231 // Leave SeenAllInterferences set to false to indicate that at least one
232 // interference exists beyond those we collected.
233 return MaxInterferingRegs;
235 InterferingVRegs.push_back(LiveUnionI.value());
237 // Cache the most recent interfering vreg to bypass isSeenInterference.
238 RecentInterferingVReg = LiveUnionI.value();
243 // VirtRegI may have advanced far beyond LiveUnionI,
244 // do a fast intersection test to "catch up"
245 LiveUnionI.advanceTo(VirtRegI->start);
247 SeenAllInterferences = true;
248 return InterferingVRegs.size();
251 bool LiveIntervalUnion::Query::checkLoopInterference(MachineLoopRange *Loop) {
252 // VirtReg is likely live throughout the loop, so start by checking LIU-Loop
254 IntervalMapOverlaps<LiveIntervalUnion::Map, MachineLoopRange::Map>
255 Overlaps(LiveUnion->getMap(), Loop->getMap());
256 if (!Overlaps.valid())
259 // The loop is overlapping an LIU assignment. Check VirtReg as well.
260 LiveInterval::iterator VRI = VirtReg->find(Overlaps.start());
263 if (VRI == VirtReg->end())
265 if (VRI->start < Overlaps.stop())
268 Overlaps.advanceTo(VRI->start);
269 if (!Overlaps.valid())
271 if (Overlaps.start() < VRI->end)
274 VRI = VirtReg->advanceTo(VRI, Overlaps.start());