1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/Target/TargetInstrItineraries.h"
24 class TargetSubtarget;
25 class TargetInstrInfo;
26 class TargetIntrinsicInfo;
29 class TargetFrameInfo;
30 class MachineCodeEmitter;
31 class TargetRegisterInfo;
33 class PassManagerBase;
36 class TargetMachOWriterInfo;
37 class TargetELFWriterInfo;
40 // Relocation model types.
45 PIC_, // Cannot be named PIC due to collision with -DPIC
71 // Code generation optimization level.
72 namespace CodeGenOpt {
83 //===----------------------------------------------------------------------===//
85 /// TargetMachine - Primary interface to the complete machine description for
86 /// the target machine. All target-specific information should be accessible
87 /// through this interface.
90 TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
91 void operator=(const TargetMachine &); // DO NOT IMPLEMENT
92 protected: // Can only create subclasses.
93 TargetMachine() : AsmInfo(0) { }
95 /// getSubtargetImpl - virtual method implemented by subclasses that returns
96 /// a reference to that target's TargetSubtarget-derived member variable.
97 virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
99 /// AsmInfo - Contains target specific asm information.
101 mutable const TargetAsmInfo *AsmInfo;
103 /// createTargetAsmInfo - Create a new instance of target specific asm
105 virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; }
108 virtual ~TargetMachine();
110 /// getModuleMatchQuality - This static method should be implemented by
111 /// targets to indicate how closely they match the specified module. This is
112 /// used by the LLC tool to determine which target to use when an explicit
113 /// -march option is not specified. If a target returns zero, it will never
114 /// be chosen without an explicit -march option.
115 static unsigned getModuleMatchQuality(const Module &) { return 0; }
117 /// getJITMatchQuality - This static method should be implemented by targets
118 /// that provide JIT capabilities to indicate how suitable they are for
119 /// execution on the current host. If a value of 0 is returned, the target
120 /// will not be used unless an explicit -march option is used.
121 static unsigned getJITMatchQuality() { return 0; }
123 // Interfaces to the major aspects of target machine information:
124 // -- Instruction opcode and operand information
125 // -- Pipelines and scheduling information
126 // -- Stack frame information
127 // -- Selection DAG lowering information
129 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
130 virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
131 virtual TargetLowering *getTargetLowering() const { return 0; }
132 virtual const TargetData *getTargetData() const { return 0; }
134 /// getTargetAsmInfo - Return target specific asm information.
136 const TargetAsmInfo *getTargetAsmInfo() const {
137 if (!AsmInfo) AsmInfo = createTargetAsmInfo();
141 /// getSubtarget - This method returns a pointer to the specified type of
142 /// TargetSubtarget. In debug builds, it verifies that the object being
143 /// returned is of the correct type.
144 template<typename STC> const STC &getSubtarget() const {
145 const TargetSubtarget *TST = getSubtargetImpl();
146 assert(TST && dynamic_cast<const STC*>(TST) &&
147 "Not the right kind of subtarget!");
148 return *static_cast<const STC*>(TST);
151 /// getRegisterInfo - If register information is available, return it. If
152 /// not, return null. This is kept separate from RegInfo until RegInfo has
153 /// details of graph coloring register allocation removed from it.
155 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
157 /// getIntrinsicInfo - If intrinsic information is available, return it. If
158 /// not, return null.
160 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
162 /// getJITInfo - If this target supports a JIT, return information for it,
163 /// otherwise return null.
165 virtual TargetJITInfo *getJITInfo() { return 0; }
167 /// getInstrItineraryData - Returns instruction itinerary data for the target
168 /// or specific subtarget.
170 virtual const InstrItineraryData getInstrItineraryData() const {
171 return InstrItineraryData();
174 /// getMachOWriterInfo - If this target supports a Mach-O writer, return
175 /// information for it, otherwise return null.
177 virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
179 /// getELFWriterInfo - If this target supports an ELF writer, return
180 /// information for it, otherwise return null.
182 virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
184 /// getRelocationModel - Returns the code generation relocation model. The
185 /// choices are static, PIC, and dynamic-no-pic, and target default.
186 static Reloc::Model getRelocationModel();
188 /// setRelocationModel - Sets the code generation relocation model.
190 static void setRelocationModel(Reloc::Model Model);
192 /// getCodeModel - Returns the code model. The choices are small, kernel,
193 /// medium, large, and target default.
194 static CodeModel::Model getCodeModel();
196 /// setCodeModel - Sets the code model.
198 static void setCodeModel(CodeModel::Model Model);
200 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
202 static bool getAsmVerbosityDefault();
204 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
206 static void setAsmVerbosityDefault(bool);
208 /// CodeGenFileType - These enums are meant to be passed into
209 /// addPassesToEmitFile to indicate what type of file to emit.
210 enum CodeGenFileType {
211 AssemblyFile, ObjectFile, DynamicLibrary
214 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
215 /// on this target. User flag overrides.
216 virtual bool getEnableTailMergeDefault() const { return true; }
218 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
219 /// specified file emitted. Typically this will involve several steps of code
220 /// generation. If Fast is set to true, the code generator should emit code
221 /// as fast as possible, though the generated code may be less efficient.
222 /// This method should return FileModel::Error if emission of this file type
223 /// is not supported.
225 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
229 return FileModel::None;
232 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
233 /// to be split up (e.g., to add an object writer pass), this method can be
234 /// used to finish up adding passes to emit the file, if necessary.
236 virtual bool addPassesToEmitFileFinish(PassManagerBase &,
237 MachineCodeEmitter *,
242 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
243 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
244 /// actually outputting the machine code and resolving things like the address
245 /// of functions. This method returns true if machine code emission is
248 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
249 MachineCodeEmitter &,
254 /// addPassesToEmitWholeFile - This method can be implemented by targets that
255 /// require having the entire module at once. This is not recommended, do not
257 virtual bool WantsWholeFile() const { return false; }
258 virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &,
265 /// LLVMTargetMachine - This class describes a target machine that is
266 /// implemented with the LLVM target-independent code generator.
268 class LLVMTargetMachine : public TargetMachine {
269 protected: // Can only create subclasses.
270 LLVMTargetMachine() { }
272 /// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
273 /// both emitting to assembly files or machine code output.
275 bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
279 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
280 /// specified file emitted. Typically this will involve several steps of code
281 /// generation. If OptLevel is None, the code generator should emit code as fast
282 /// as possible, though the generated code may be less efficient. This method
283 /// should return FileModel::Error if emission of this file type is not
286 /// The default implementation of this method adds components from the
287 /// LLVM retargetable code generator, invoking the methods below to get
288 /// target-specific passes in standard locations.
290 virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
292 CodeGenFileType FileType,
295 /// addPassesToEmitFileFinish - If the passes to emit the specified file had
296 /// to be split up (e.g., to add an object writer pass), this method can be
297 /// used to finish up adding passes to emit the file, if necessary.
299 virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
300 MachineCodeEmitter *MCE,
303 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
304 /// get machine code emitted. This uses a MachineCodeEmitter object to handle
305 /// actually outputting the machine code and resolving things like the address
306 /// of functions. This method returns true if machine code emission is
309 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
310 MachineCodeEmitter &MCE,
313 /// Target-Independent Code Generator Pass Configuration Options.
315 /// addInstSelector - This method should add any "last minute" LLVM->LLVM
316 /// passes, then install an instruction selector pass, which converts from
317 /// LLVM code to machine instructions.
318 virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
322 /// addPreRegAllocPasses - This method may be implemented by targets that want
323 /// to run passes immediately before register allocation. This should return
324 /// true if -print-machineinstrs should print after these passes.
325 virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
329 /// addPostRegAllocPasses - This method may be implemented by targets that
330 /// want to run passes after register allocation but before prolog-epilog
331 /// insertion. This should return true if -print-machineinstrs should print
332 /// after these passes.
333 virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
337 /// addPreEmitPass - This pass may be implemented by targets that want to run
338 /// passes immediately before machine code is emitted. This should return
339 /// true if -print-machineinstrs should print out the code after the passes.
340 virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
345 /// addAssemblyEmitter - This pass should be overridden by the target to add
346 /// the asmprinter, if asm emission is supported. If this is not supported,
347 /// 'true' should be returned.
348 virtual bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level,
349 bool /* VerboseAsmDefault */, raw_ostream &) {
353 /// addCodeEmitter - This pass should be overridden by the target to add a
354 /// code emitter, if supported. If this is not supported, 'true' should be
355 /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
356 virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
357 bool /*DumpAsm*/, MachineCodeEmitter &) {
361 /// addSimpleCodeEmitter - This pass should be overridden by the target to add
362 /// a code emitter (without setting flags), if supported. If this is not
363 /// supported, 'true' should be returned. If DumpAsm is true, the generated
364 /// assembly is printed to cerr.
365 virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
366 bool /*DumpAsm*/, MachineCodeEmitter &) {
370 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
371 /// on this target. User flag overrides.
372 virtual bool getEnableTailMergeDefault() const { return true; }
375 } // End llvm namespace