1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/Pass.h"
19 #include "llvm/Support/CodeGen.h"
20 #include "llvm/Target/TargetOptions.h"
26 class InstrItineraryData;
32 class PassManagerBase;
35 class TargetFrameLowering;
36 class TargetInstrInfo;
37 class TargetIntrinsicInfo;
40 class TargetPassConfig;
41 class TargetRegisterInfo;
42 class TargetSelectionDAGInfo;
43 class TargetSubtargetInfo;
44 class ScalarTargetTransformInfo;
45 class VectorTargetTransformInfo;
46 class formatted_raw_ostream;
49 //===----------------------------------------------------------------------===//
51 /// TargetMachine - Primary interface to the complete machine description for
52 /// the target machine. All target-specific information should be accessible
53 /// through this interface.
56 TargetMachine(const TargetMachine &) LLVM_DELETED_FUNCTION;
57 void operator=(const TargetMachine &) LLVM_DELETED_FUNCTION;
58 protected: // Can only create subclasses.
59 TargetMachine(const Target &T, StringRef TargetTriple,
60 StringRef CPU, StringRef FS, const TargetOptions &Options);
62 /// TheTarget - The Target that this machine was created for.
63 const Target &TheTarget;
65 /// TargetTriple, TargetCPU, TargetFS - Triple string, CPU name, and target
66 /// feature strings the TargetMachine instance is created with.
67 std::string TargetTriple;
68 std::string TargetCPU;
71 /// CodeGenInfo - Low level target information such as relocation model.
72 const MCCodeGenInfo *CodeGenInfo;
74 /// AsmInfo - Contains target specific asm information.
76 const MCAsmInfo *AsmInfo;
78 unsigned MCRelaxAll : 1;
79 unsigned MCNoExecStack : 1;
80 unsigned MCSaveTempLabels : 1;
81 unsigned MCUseLoc : 1;
82 unsigned MCUseCFI : 1;
83 unsigned MCUseDwarfDirectory : 1;
86 virtual ~TargetMachine();
88 const Target &getTarget() const { return TheTarget; }
90 const StringRef getTargetTriple() const { return TargetTriple; }
91 const StringRef getTargetCPU() const { return TargetCPU; }
92 const StringRef getTargetFeatureString() const { return TargetFS; }
94 /// getSubtargetImpl - virtual method implemented by subclasses that returns
95 /// a reference to that target's TargetSubtargetInfo-derived member variable.
96 virtual const TargetSubtargetInfo *getSubtargetImpl() const { return 0; }
98 TargetOptions Options;
100 // Interfaces to the major aspects of target machine information:
101 // -- Instruction opcode and operand information
102 // -- Pipelines and scheduling information
103 // -- Stack frame information
104 // -- Selection DAG lowering information
106 virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
107 virtual const TargetFrameLowering *getFrameLowering() const { return 0; }
108 virtual const TargetLowering *getTargetLowering() const { return 0; }
109 virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; }
110 virtual const DataLayout *getDataLayout() const { return 0; }
112 /// getMCAsmInfo - Return target specific asm information.
114 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
116 /// getSubtarget - This method returns a pointer to the specified type of
117 /// TargetSubtargetInfo. In debug builds, it verifies that the object being
118 /// returned is of the correct type.
119 template<typename STC> const STC &getSubtarget() const {
120 return *static_cast<const STC*>(getSubtargetImpl());
123 /// getRegisterInfo - If register information is available, return it. If
124 /// not, return null. This is kept separate from RegInfo until RegInfo has
125 /// details of graph coloring register allocation removed from it.
127 virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
129 /// getIntrinsicInfo - If intrinsic information is available, return it. If
130 /// not, return null.
132 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
134 /// getJITInfo - If this target supports a JIT, return information for it,
135 /// otherwise return null.
137 virtual TargetJITInfo *getJITInfo() { return 0; }
139 /// getInstrItineraryData - Returns instruction itinerary data for the target
140 /// or specific subtarget.
142 virtual const InstrItineraryData *getInstrItineraryData() const {
146 /// hasMCRelaxAll - Check whether all machine code instructions should be
148 bool hasMCRelaxAll() const { return MCRelaxAll; }
150 /// setMCRelaxAll - Set whether all machine code instructions should be
152 void setMCRelaxAll(bool Value) { MCRelaxAll = Value; }
154 /// hasMCSaveTempLabels - Check whether temporary labels will be preserved
155 /// (i.e., not treated as temporary).
156 bool hasMCSaveTempLabels() const { return MCSaveTempLabels; }
158 /// setMCSaveTempLabels - Set whether temporary labels will be preserved
159 /// (i.e., not treated as temporary).
160 void setMCSaveTempLabels(bool Value) { MCSaveTempLabels = Value; }
162 /// hasMCNoExecStack - Check whether an executable stack is not needed.
163 bool hasMCNoExecStack() const { return MCNoExecStack; }
165 /// setMCNoExecStack - Set whether an executabel stack is not needed.
166 void setMCNoExecStack(bool Value) { MCNoExecStack = Value; }
168 /// hasMCUseLoc - Check whether we should use dwarf's .loc directive.
169 bool hasMCUseLoc() const { return MCUseLoc; }
171 /// setMCUseLoc - Set whether all we should use dwarf's .loc directive.
172 void setMCUseLoc(bool Value) { MCUseLoc = Value; }
174 /// hasMCUseCFI - Check whether we should use dwarf's .cfi_* directives.
175 bool hasMCUseCFI() const { return MCUseCFI; }
177 /// setMCUseCFI - Set whether all we should use dwarf's .cfi_* directives.
178 void setMCUseCFI(bool Value) { MCUseCFI = Value; }
180 /// hasMCUseDwarfDirectory - Check whether we should use .file directives with
181 /// explicit directories.
182 bool hasMCUseDwarfDirectory() const { return MCUseDwarfDirectory; }
184 /// setMCUseDwarfDirectory - Set whether all we should use .file directives
185 /// with explicit directories.
186 void setMCUseDwarfDirectory(bool Value) { MCUseDwarfDirectory = Value; }
188 /// getRelocationModel - Returns the code generation relocation model. The
189 /// choices are static, PIC, and dynamic-no-pic, and target default.
190 Reloc::Model getRelocationModel() const;
192 /// getCodeModel - Returns the code model. The choices are small, kernel,
193 /// medium, large, and target default.
194 CodeModel::Model getCodeModel() const;
196 /// getTLSModel - Returns the TLS model which should be used for the given
198 TLSModel::Model getTLSModel(const GlobalValue *GV) const;
200 /// getOptLevel - Returns the optimization level: None, Less,
201 /// Default, or Aggressive.
202 CodeGenOpt::Level getOptLevel() const;
204 void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
206 bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
208 /// getAsmVerbosityDefault - Returns the default value of asm verbosity.
210 static bool getAsmVerbosityDefault();
212 /// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
214 static void setAsmVerbosityDefault(bool);
216 /// getDataSections - Return true if data objects should be emitted into their
217 /// own section, corresponds to -fdata-sections.
218 static bool getDataSections();
220 /// getFunctionSections - Return true if functions should be emitted into
221 /// their own section, corresponding to -ffunction-sections.
222 static bool getFunctionSections();
224 /// setDataSections - Set if the data are emit into separate sections.
225 static void setDataSections(bool);
227 /// setFunctionSections - Set if the functions are emit into separate
229 static void setFunctionSections(bool);
231 /// \brief Register analysis passes for this target with a pass manager.
232 virtual void addAnalysisPasses(PassManagerBase &) {}
234 /// CodeGenFileType - These enums are meant to be passed into
235 /// addPassesToEmitFile to indicate what type of file to emit, and returned by
236 /// it to indicate what type of file could actually be made.
237 enum CodeGenFileType {
240 CGFT_Null // Do not emit any output.
243 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
244 /// specified file emitted. Typically this will involve several steps of code
245 /// generation. This method should return true if emission of this file type
246 /// is not supported, or false on success.
247 virtual bool addPassesToEmitFile(PassManagerBase &,
248 formatted_raw_ostream &,
250 bool /*DisableVerify*/ = true,
251 AnalysisID StartAfter = 0,
252 AnalysisID StopAfter = 0) {
256 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
257 /// get machine code emitted. This uses a JITCodeEmitter object to handle
258 /// actually outputting the machine code and resolving things like the address
259 /// of functions. This method returns true if machine code emission is
262 virtual bool addPassesToEmitMachineCode(PassManagerBase &,
264 bool /*DisableVerify*/ = true) {
268 /// addPassesToEmitMC - Add passes to the specified pass manager to get
269 /// machine code emitted with the MCJIT. This method returns true if machine
270 /// code is not supported. It fills the MCContext Ctx pointer which can be
271 /// used to build custom MCStreamer.
273 virtual bool addPassesToEmitMC(PassManagerBase &,
276 bool /*DisableVerify*/ = true) {
281 /// LLVMTargetMachine - This class describes a target machine that is
282 /// implemented with the LLVM target-independent code generator.
284 class LLVMTargetMachine : public TargetMachine {
285 protected: // Can only create subclasses.
286 LLVMTargetMachine(const Target &T, StringRef TargetTriple,
287 StringRef CPU, StringRef FS, TargetOptions Options,
288 Reloc::Model RM, CodeModel::Model CM,
289 CodeGenOpt::Level OL);
292 /// \brief Register analysis passes for this target with a pass manager.
294 /// This registers target independent analysis passes.
295 virtual void addAnalysisPasses(PassManagerBase &PM);
297 /// createPassConfig - Create a pass configuration object to be used by
298 /// addPassToEmitX methods for generating a pipeline of CodeGen passes.
299 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
301 /// addPassesToEmitFile - Add passes to the specified pass manager to get the
302 /// specified file emitted. Typically this will involve several steps of code
304 virtual bool addPassesToEmitFile(PassManagerBase &PM,
305 formatted_raw_ostream &Out,
306 CodeGenFileType FileType,
307 bool DisableVerify = true,
308 AnalysisID StartAfter = 0,
309 AnalysisID StopAfter = 0);
311 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
312 /// get machine code emitted. This uses a JITCodeEmitter object to handle
313 /// actually outputting the machine code and resolving things like the address
314 /// of functions. This method returns true if machine code emission is
317 virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
319 bool DisableVerify = true);
321 /// addPassesToEmitMC - Add passes to the specified pass manager to get
322 /// machine code emitted with the MCJIT. This method returns true if machine
323 /// code is not supported. It fills the MCContext Ctx pointer which can be
324 /// used to build custom MCStreamer.
326 virtual bool addPassesToEmitMC(PassManagerBase &PM,
329 bool DisableVerify = true);
331 /// addCodeEmitter - This pass should be overridden by the target to add a
332 /// code emitter, if supported. If this is not supported, 'true' should be
334 virtual bool addCodeEmitter(PassManagerBase &,
340 } // End llvm namespace