include/llvm/IntrinsicsX86.td

   1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the X86-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14
  15 //===----------------------------------------------------------------------===//
  16 // SSE1
  17
  18 // Arithmetic ops
  19 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  20   def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
  21               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  22                          llvm_v4f32_ty], [IntrNoMem]>;
  23   def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
  24               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  25                          llvm_v4f32_ty], [IntrNoMem]>;
  26   def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
  27               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  28                          llvm_v4f32_ty], [IntrNoMem]>;
  29   def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
  30               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  31                          llvm_v4f32_ty], [IntrNoMem]>;
  32   def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
  33               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  34                         [IntrNoMem]>;
  35   def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
  36               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  37                         [IntrNoMem]>;
  38   def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
  39               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  40                         [IntrNoMem]>;
  41   def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
  42               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  43                         [IntrNoMem]>;
  44   def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
  45               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  46                         [IntrNoMem]>;
  47   def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
  48               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  49                         [IntrNoMem]>;
  50   def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
  51               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  52                          llvm_v4f32_ty], [IntrNoMem]>;
  53   def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
  54               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  55                          llvm_v4f32_ty], [IntrNoMem]>;
  56   def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
  57               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  58                          llvm_v4f32_ty], [IntrNoMem]>;
  59   def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
  60               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  61                          llvm_v4f32_ty], [IntrNoMem]>;
  62 }
  63
  64 // Comparison ops
  65 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  66   def int_x86_sse_cmp_ss :
  67               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  68                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  69   def int_x86_sse_cmp_ps :
  70               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  71                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  72   def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
  73               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  74                          llvm_v4f32_ty], [IntrNoMem]>;
  75   def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
  76               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  77                          llvm_v4f32_ty], [IntrNoMem]>;
  78   def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">,
  79               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  80                          llvm_v4f32_ty], [IntrNoMem]>;
  81   def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
  82               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  83                          llvm_v4f32_ty], [IntrNoMem]>;
  84   def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
  85               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  86                          llvm_v4f32_ty], [IntrNoMem]>;
  87   def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
  88               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  89                          llvm_v4f32_ty], [IntrNoMem]>;
  90   def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
  91               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  92                          llvm_v4f32_ty], [IntrNoMem]>;
  93   def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
  94               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  95                          llvm_v4f32_ty], [IntrNoMem]>;
  96   def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">,
  97               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  98                          llvm_v4f32_ty], [IntrNoMem]>;
  99   def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
 100               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 101                          llvm_v4f32_ty], [IntrNoMem]>;
 102   def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
 103               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 104                          llvm_v4f32_ty], [IntrNoMem]>;
 105   def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
 106               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 107                          llvm_v4f32_ty], [IntrNoMem]>;
 108 }
 109
 110
 111 // Conversion ops
 112 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 113   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
 114               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 115   def int_x86_sse_cvtss2si64 : GCCBuiltin<"__builtin_ia32_cvtss2si64">,
 116               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 117   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
 118               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 119   def int_x86_sse_cvttss2si64 : GCCBuiltin<"__builtin_ia32_cvttss2si64">,
 120               Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 121   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
 122               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 123                          llvm_i32_ty], [IntrNoMem]>;
 124   def int_x86_sse_cvtsi642ss : GCCBuiltin<"__builtin_ia32_cvtsi642ss">,
 125               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 126                          llvm_i64_ty], [IntrNoMem]>;
 127   def int_x86_sse_cvtps2pi : GCCBuiltin<"__builtin_ia32_cvtps2pi">,
 128               Intrinsic<[llvm_v2i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 129   def int_x86_sse_cvttps2pi: GCCBuiltin<"__builtin_ia32_cvttps2pi">,
 130               Intrinsic<[llvm_v2i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 131   def int_x86_sse_cvtpi2ps : GCCBuiltin<"__builtin_ia32_cvtpi2ps">,
 132               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 133                          llvm_v2i32_ty], [IntrNoMem]>;
 134 }
 135
 136 // SIMD load ops
 137 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 138   def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
 139               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
 140 }
 141
 142 // SIMD store ops
 143 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 144   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
 145               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 146                          llvm_v4f32_ty], [IntrWriteMem]>;
 147 }
 148
 149 // Cacheability support ops
 150 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 151   def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">,
 152               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 153                          llvm_v4f32_ty], [IntrWriteMem]>;
 154   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
 155               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 156 }
 157
 158 // Control register.
 159 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 160   def int_x86_sse_stmxcsr :
 161               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 162   def int_x86_sse_ldmxcsr :
 163               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 164 }
 165
 166 // Misc.
 167 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 168   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
 169               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 170 }
 171
 172 //===----------------------------------------------------------------------===//
 173 // SSE2
 174
 175 // FP arithmetic ops
 176 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 177   def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
 178               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 179                          llvm_v2f64_ty], [IntrNoMem]>;
 180   def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
 181               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 182                          llvm_v2f64_ty], [IntrNoMem]>;
 183   def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
 184               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 185                          llvm_v2f64_ty], [IntrNoMem]>;
 186   def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
 187               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 188                          llvm_v2f64_ty], [IntrNoMem]>;
 189   def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
 190               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 191                         [IntrNoMem]>;
 192   def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
 193               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 194                         [IntrNoMem]>;
 195   def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
 196               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 197                          llvm_v2f64_ty], [IntrNoMem]>;
 198   def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
 199               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 200                          llvm_v2f64_ty], [IntrNoMem]>;
 201   def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
 202               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 203                          llvm_v2f64_ty], [IntrNoMem]>;
 204   def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
 205               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 206                          llvm_v2f64_ty], [IntrNoMem]>;
 207 }
 208
 209 // FP comparison ops
 210 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 211   def int_x86_sse2_cmp_sd :
 212               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 213                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 214   def int_x86_sse2_cmp_pd :
 215               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 216                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 217   def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
 218               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 219                          llvm_v2f64_ty], [IntrNoMem]>;
 220   def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">,
 221               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 222                          llvm_v2f64_ty], [IntrNoMem]>;
 223   def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">,
 224               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 225                          llvm_v2f64_ty], [IntrNoMem]>;
 226   def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">,
 227               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 228                          llvm_v2f64_ty], [IntrNoMem]>;
 229   def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">,
 230               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 231                          llvm_v2f64_ty], [IntrNoMem]>;
 232   def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">,
 233               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 234                          llvm_v2f64_ty], [IntrNoMem]>;
 235   def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">,
 236               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 237                          llvm_v2f64_ty], [IntrNoMem]>;
 238   def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">,
 239               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 240                          llvm_v2f64_ty], [IntrNoMem]>;
 241   def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">,
 242               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 243                          llvm_v2f64_ty], [IntrNoMem]>;
 244   def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">,
 245               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 246                          llvm_v2f64_ty], [IntrNoMem]>;
 247   def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">,
 248               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 249                          llvm_v2f64_ty], [IntrNoMem]>;
 250   def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">,
 251               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 252                          llvm_v2f64_ty], [IntrNoMem]>;
 253 }
 254
 255 // Integer arithmetic ops.
 256 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 257   def int_x86_sse2_padds_b : GCCBuiltin<"__builtin_ia32_paddsb128">,
 258               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 259                          llvm_v16i8_ty], [IntrNoMem]>;
 260   def int_x86_sse2_padds_w : GCCBuiltin<"__builtin_ia32_paddsw128">,
 261               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 262                          llvm_v8i16_ty], [IntrNoMem]>;
 263   def int_x86_sse2_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb128">,
 264               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 265                          llvm_v16i8_ty], [IntrNoMem]>;
 266   def int_x86_sse2_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw128">,
 267               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 268                          llvm_v8i16_ty], [IntrNoMem]>;
 269   def int_x86_sse2_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb128">,
 270               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 271                          llvm_v16i8_ty], [IntrNoMem]>;
 272   def int_x86_sse2_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw128">,
 273               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 274                          llvm_v8i16_ty], [IntrNoMem]>;
 275   def int_x86_sse2_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb128">,
 276               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 277                          llvm_v16i8_ty], [IntrNoMem]>;
 278   def int_x86_sse2_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw128">,
 279               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 280                          llvm_v8i16_ty], [IntrNoMem]>;
 281   def int_x86_sse2_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw128">,
 282               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 283                          llvm_v8i16_ty], [IntrNoMem]>;
 284   def int_x86_sse2_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw128">,
 285               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 286                          llvm_v8i16_ty], [IntrNoMem]>;
 287   def int_x86_sse2_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq128">,
 288               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty,
 289                          llvm_v4i32_ty], [IntrNoMem]>;
 290   def int_x86_sse2_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd128">,
 291               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty,
 292                          llvm_v8i16_ty], [IntrNoMem]>;
 293   def int_x86_sse2_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb128">,
 294               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 295                          llvm_v16i8_ty], [IntrNoMem]>;
 296   def int_x86_sse2_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw128">,
 297               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 298                          llvm_v8i16_ty], [IntrNoMem]>;
 299   def int_x86_sse2_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub128">,
 300               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 301                          llvm_v16i8_ty], [IntrNoMem]>;
 302   def int_x86_sse2_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw128">,
 303               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 304                          llvm_v8i16_ty], [IntrNoMem]>;
 305   def int_x86_sse2_pminu_b : GCCBuiltin<"__builtin_ia32_pminub128">,
 306               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 307                          llvm_v16i8_ty], [IntrNoMem]>;
 308   def int_x86_sse2_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw128">,
 309               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 310                          llvm_v8i16_ty], [IntrNoMem]>;
 311   def int_x86_sse2_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw128">,
 312               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty,
 313                          llvm_v16i8_ty], [IntrNoMem]>;
 314 }
 315
 316 // Integer shift ops.
 317 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 318   def int_x86_sse2_psll_w : GCCBuiltin<"__builtin_ia32_psllw128">,
 319               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 320                          llvm_v8i16_ty], [IntrNoMem]>;
 321   def int_x86_sse2_psll_d : GCCBuiltin<"__builtin_ia32_pslld128">,
 322               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 323                          llvm_v4i32_ty], [IntrNoMem]>;
 324   def int_x86_sse2_psll_q : GCCBuiltin<"__builtin_ia32_psllq128">,
 325               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 326                          llvm_v2i64_ty], [IntrNoMem]>;
 327   def int_x86_sse2_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw128">,
 328               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 329                          llvm_v8i16_ty], [IntrNoMem]>;
 330   def int_x86_sse2_psrl_d : GCCBuiltin<"__builtin_ia32_psrld128">,
 331               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 332                          llvm_v4i32_ty], [IntrNoMem]>;
 333   def int_x86_sse2_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq128">,
 334               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 335                          llvm_v2i64_ty], [IntrNoMem]>;
 336   def int_x86_sse2_psra_w : GCCBuiltin<"__builtin_ia32_psraw128">,
 337               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 338                          llvm_v8i16_ty], [IntrNoMem]>;
 339   def int_x86_sse2_psra_d : GCCBuiltin<"__builtin_ia32_psrad128">,
 340               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 341                          llvm_v4i32_ty], [IntrNoMem]>;
 342
 343   def int_x86_sse2_pslli_w : GCCBuiltin<"__builtin_ia32_psllwi128">,
 344               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 345                          llvm_i32_ty], [IntrNoMem]>;
 346   def int_x86_sse2_pslli_d : GCCBuiltin<"__builtin_ia32_pslldi128">,
 347               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 348                          llvm_i32_ty], [IntrNoMem]>;
 349   def int_x86_sse2_pslli_q : GCCBuiltin<"__builtin_ia32_psllqi128">,
 350               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 351                          llvm_i32_ty], [IntrNoMem]>;
 352   def int_x86_sse2_psrli_w : GCCBuiltin<"__builtin_ia32_psrlwi128">,
 353               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 354                          llvm_i32_ty], [IntrNoMem]>;
 355   def int_x86_sse2_psrli_d : GCCBuiltin<"__builtin_ia32_psrldi128">,
 356               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 357                          llvm_i32_ty], [IntrNoMem]>;
 358   def int_x86_sse2_psrli_q : GCCBuiltin<"__builtin_ia32_psrlqi128">,
 359               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 360                          llvm_i32_ty], [IntrNoMem]>;
 361   def int_x86_sse2_psrai_w : GCCBuiltin<"__builtin_ia32_psrawi128">,
 362               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 363                          llvm_i32_ty], [IntrNoMem]>;
 364   def int_x86_sse2_psrai_d : GCCBuiltin<"__builtin_ia32_psradi128">,
 365               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 366                          llvm_i32_ty], [IntrNoMem]>;
 367
 368   def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
 369               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 370                          llvm_i32_ty], [IntrNoMem]>;
 371   def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
 372               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 373                          llvm_i32_ty], [IntrNoMem]>;
 374 }
 375
 376 // Integer comparison ops
 377 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 378   def int_x86_sse2_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb128">,
 379               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 380                          llvm_v16i8_ty], [IntrNoMem]>;
 381   def int_x86_sse2_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw128">,
 382               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 383                          llvm_v8i16_ty], [IntrNoMem]>;
 384   def int_x86_sse2_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd128">,
 385               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 386                          llvm_v4i32_ty], [IntrNoMem]>;
 387   def int_x86_sse2_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb128">,
 388               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 389                          llvm_v16i8_ty], [IntrNoMem]>;
 390   def int_x86_sse2_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw128">,
 391               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 392                          llvm_v8i16_ty], [IntrNoMem]>;
 393   def int_x86_sse2_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd128">,
 394               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 395                          llvm_v4i32_ty], [IntrNoMem]>;
 396 }
 397
 398 // Conversion ops
 399 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 400   def int_x86_sse2_cvtdq2pd : GCCBuiltin<"__builtin_ia32_cvtdq2pd">,
 401               Intrinsic<[llvm_v2f64_ty, llvm_v4i32_ty], [IntrNoMem]>;
 402   def int_x86_sse2_cvtdq2ps : GCCBuiltin<"__builtin_ia32_cvtdq2ps">,
 403               Intrinsic<[llvm_v4f32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 404   def int_x86_sse2_cvtpd2dq : GCCBuiltin<"__builtin_ia32_cvtpd2dq">,
 405               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 406   def int_x86_sse2_cvttpd2dq : GCCBuiltin<"__builtin_ia32_cvttpd2dq">,
 407               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 408   def int_x86_sse2_cvtpd2ps : GCCBuiltin<"__builtin_ia32_cvtpd2ps">,
 409               Intrinsic<[llvm_v4f32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 410   def int_x86_sse2_cvtps2dq : GCCBuiltin<"__builtin_ia32_cvtps2dq">,
 411               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 412   def int_x86_sse2_cvttps2dq : GCCBuiltin<"__builtin_ia32_cvttps2dq">,
 413               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 414   def int_x86_sse2_cvtps2pd : GCCBuiltin<"__builtin_ia32_cvtps2pd">,
 415               Intrinsic<[llvm_v2f64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 416   def int_x86_sse2_cvtsd2si : GCCBuiltin<"__builtin_ia32_cvtsd2si">,
 417               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 418   def int_x86_sse2_cvtsd2si64 : GCCBuiltin<"__builtin_ia32_cvtsd2si64">,
 419               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
 420   def int_x86_sse2_cvttsd2si : GCCBuiltin<"__builtin_ia32_cvttsd2si">,
 421               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 422   def int_x86_sse2_cvttsd2si64 : GCCBuiltin<"__builtin_ia32_cvttsd2si64">,
 423               Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>;
 424   def int_x86_sse2_cvtsi2sd : GCCBuiltin<"__builtin_ia32_cvtsi2sd">,
 425               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 426                          llvm_i32_ty], [IntrNoMem]>;
 427   def int_x86_sse2_cvtsi642sd : GCCBuiltin<"__builtin_ia32_cvtsi642sd">,
 428               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 429                          llvm_i64_ty], [IntrNoMem]>;
 430   def int_x86_sse2_cvtsd2ss : GCCBuiltin<"__builtin_ia32_cvtsd2ss">,
 431               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 432                          llvm_v2f64_ty], [IntrNoMem]>;
 433   def int_x86_sse2_cvtss2sd : GCCBuiltin<"__builtin_ia32_cvtss2sd">,
 434               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 435                          llvm_v4f32_ty], [IntrNoMem]>;
 436   def int_x86_sse_cvtpd2pi : GCCBuiltin<"__builtin_ia32_cvtpd2pi">,
 437               Intrinsic<[llvm_v2i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 438   def int_x86_sse_cvttpd2pi: GCCBuiltin<"__builtin_ia32_cvttpd2pi">,
 439               Intrinsic<[llvm_v2i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 440   def int_x86_sse_cvtpi2pd : GCCBuiltin<"__builtin_ia32_cvtpi2pd">,
 441               Intrinsic<[llvm_v2f64_ty, llvm_v2i32_ty], [IntrNoMem]>;
 442 }
 443
 444 // SIMD load ops
 445 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 446   def int_x86_sse2_loadu_pd : GCCBuiltin<"__builtin_ia32_loadupd">,
 447               Intrinsic<[llvm_v2f64_ty, llvm_ptr_ty], [IntrReadMem]>;
 448   def int_x86_sse2_loadu_dq : GCCBuiltin<"__builtin_ia32_loaddqu">,
 449               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 450 }
 451
 452 // SIMD store ops
 453 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 454   def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
 455               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 456                          llvm_v2f64_ty], [IntrWriteMem]>;
 457   def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">,
 458               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 459                          llvm_v16i8_ty], [IntrWriteMem]>;
 460   def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">,
 461               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 462                          llvm_v4i32_ty], [IntrWriteMem]>;
 463 }
 464
 465 // Cacheability support ops
 466 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 467   def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">,
 468               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 469                          llvm_v2i64_ty], [IntrWriteMem]>;
 470   def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">,
 471               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 472                          llvm_v2f64_ty], [IntrWriteMem]>;
 473   def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
 474               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 475                          llvm_i32_ty], [IntrWriteMem]>;
 476 }
 477
 478 // Misc.
 479 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 480   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
 481               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 482                          llvm_v8i16_ty], [IntrNoMem]>;
 483   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
 484               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 485                          llvm_v4i32_ty], [IntrNoMem]>;
 486   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
 487               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 488                          llvm_v8i16_ty], [IntrNoMem]>;
 489   def int_x86_sse2_movmsk_pd : GCCBuiltin<"__builtin_ia32_movmskpd">,
 490               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 491   def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
 492               Intrinsic<[llvm_i32_ty, llvm_v16i8_ty], [IntrNoMem]>;
 493   def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
 494               Intrinsic<[llvm_void_ty, llvm_v16i8_ty,
 495                          llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>;
 496   def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">,
 497               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 498   def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">,
 499               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 500   def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">,
 501               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 502 }
 503
 504 // Shuffles.
 505 // FIXME: Temporary workarounds since 2-wide shuffle is broken.
 506 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 507   def int_x86_sse2_movs_d : GCCBuiltin<"__builtin_ia32_movsd">,
 508               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 509                          llvm_v2f64_ty], [IntrNoMem]>;
 510   def int_x86_sse2_loadh_pd : GCCBuiltin<"__builtin_ia32_loadhpd">,
 511               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 512                          llvm_ptr_ty], [IntrReadMem]>;
 513   def int_x86_sse2_loadl_pd : GCCBuiltin<"__builtin_ia32_loadlpd">,
 514               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 515                          llvm_ptr_ty], [IntrReadMem]>;
 516   def int_x86_sse2_shuf_pd : GCCBuiltin<"__builtin_ia32_shufpd">,
 517               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 518                          llvm_v2f64_ty, llvm_i32_ty], [IntrNoMem]>;
 519   def int_x86_sse2_unpckh_pd : GCCBuiltin<"__builtin_ia32_unpckhpd">,
 520               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 521                          llvm_v2f64_ty], [IntrNoMem]>;
 522   def int_x86_sse2_unpckl_pd : GCCBuiltin<"__builtin_ia32_unpcklpd">,
 523               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 524                          llvm_v2f64_ty], [IntrNoMem]>;
 525   def int_x86_sse2_punpckh_qdq : GCCBuiltin<"__builtin_ia32_punpckhqdq128">,
 526               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 527                          llvm_v2i64_ty], [IntrNoMem]>;
 528   def int_x86_sse2_punpckl_qdq : GCCBuiltin<"__builtin_ia32_punpcklqdq128">,
 529               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 530                          llvm_v2i64_ty], [IntrNoMem]>;
 531 }
 532
 533 //===----------------------------------------------------------------------===//
 534 // SSE3
 535
 536 // Addition / subtraction ops.
 537 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 538   def int_x86_sse3_addsub_ps : GCCBuiltin<"__builtin_ia32_addsubps">,
 539               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 540                          llvm_v4f32_ty], [IntrNoMem]>;
 541   def int_x86_sse3_addsub_pd : GCCBuiltin<"__builtin_ia32_addsubpd">,
 542               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 543                          llvm_v2f64_ty], [IntrNoMem]>;
 544 }
 545
 546 // Horizontal ops.
 547 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 548   def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">,
 549               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 550                          llvm_v4f32_ty], [IntrNoMem]>;
 551   def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
 552               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 553                          llvm_v2f64_ty], [IntrNoMem]>;
 554   def int_x86_sse3_hsub_ps : GCCBuiltin<"__builtin_ia32_hsubps">,
 555               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 556                          llvm_v4f32_ty], [IntrNoMem]>;
 557   def int_x86_sse3_hsub_pd : GCCBuiltin<"__builtin_ia32_hsubpd">,
 558               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 559                          llvm_v2f64_ty], [IntrNoMem]>;
 560 }
 561
 562 // Specialized unaligned load.
 563 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 564   def int_x86_sse3_ldu_dq : GCCBuiltin<"__builtin_ia32_lddqu">,
 565               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 566 }
 567
 568 // Thread synchronization ops.
 569 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 570   def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">,
 571               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 572                          llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>;
 573   def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">,
 574               Intrinsic<[llvm_void_ty, llvm_i32_ty,
 575                          llvm_i32_ty], [IntrWriteMem]>;
 576 }
 577
 578 //===----------------------------------------------------------------------===//
 579 // SSSE3
 580
 581 // Horizontal arithmetic ops
 582 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 583   def int_x86_ssse3_phadd_w         : GCCBuiltin<"__builtin_ia32_phaddw">,
 584               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 585                          llvm_v4i16_ty], [IntrNoMem]>;
 586   def int_x86_ssse3_phadd_w_128     : GCCBuiltin<"__builtin_ia32_phaddw128">,
 587               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 588                          llvm_v8i16_ty], [IntrNoMem]>;
 589
 590   def int_x86_ssse3_phadd_d         : GCCBuiltin<"__builtin_ia32_phaddd">,
 591               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 592                          llvm_v2i32_ty], [IntrNoMem]>;
 593   def int_x86_ssse3_phadd_d_128     : GCCBuiltin<"__builtin_ia32_phaddd128">,
 594               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 595                          llvm_v4i32_ty], [IntrNoMem]>;
 596
 597   def int_x86_ssse3_phadd_sw        : GCCBuiltin<"__builtin_ia32_phaddsw">,
 598               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 599                          llvm_v4i16_ty], [IntrNoMem]>;
 600   def int_x86_ssse3_phadd_sw_128    : GCCBuiltin<"__builtin_ia32_phaddsw128">,
 601               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 602                          llvm_v4i32_ty], [IntrNoMem]>;
 603
 604   def int_x86_ssse3_phsub_w         : GCCBuiltin<"__builtin_ia32_phsubw">,
 605               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 606                          llvm_v4i16_ty], [IntrNoMem]>;
 607   def int_x86_ssse3_phsub_w_128     : GCCBuiltin<"__builtin_ia32_phsubw128">,
 608               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 609                          llvm_v8i16_ty], [IntrNoMem]>;
 610
 611   def int_x86_ssse3_phsub_d         : GCCBuiltin<"__builtin_ia32_phsubd">,
 612               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 613                          llvm_v2i32_ty], [IntrNoMem]>;
 614   def int_x86_ssse3_phsub_d_128     : GCCBuiltin<"__builtin_ia32_phsubd128">,
 615               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 616                          llvm_v4i32_ty], [IntrNoMem]>;
 617
 618   def int_x86_ssse3_phsub_sw        : GCCBuiltin<"__builtin_ia32_phsubsw">,
 619               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 620                          llvm_v4i16_ty], [IntrNoMem]>;
 621   def int_x86_ssse3_phsub_sw_128    : GCCBuiltin<"__builtin_ia32_phsubsw128">,
 622               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 623                          llvm_v8i16_ty], [IntrNoMem]>;
 624
 625   def int_x86_ssse3_pmadd_ub_sw     : GCCBuiltin<"__builtin_ia32_pmaddubsw">,
 626               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 627                          llvm_v4i16_ty], [IntrNoMem]>;
 628   def int_x86_ssse3_pmadd_ub_sw_128 : GCCBuiltin<"__builtin_ia32_pmaddubsw128">,
 629               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 630                          llvm_v8i16_ty], [IntrNoMem]>;
 631
 632   def int_x86_ssse3_pmul_hr_sw      : GCCBuiltin<"__builtin_ia32_pmulhrsw">,
 633               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 634                          llvm_v4i16_ty], [IntrNoMem]>;
 635   def int_x86_ssse3_pmul_hr_sw_128  : GCCBuiltin<"__builtin_ia32_pmulhrsw128">,
 636               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 637                          llvm_v8i16_ty], [IntrNoMem]>;
 638 }
 639
 640 // Shuffle ops
 641 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 642   def int_x86_ssse3_pshuf_b         : GCCBuiltin<"__builtin_ia32_pshufb">,
 643               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 644                          llvm_v8i8_ty], [IntrNoMem]>;
 645   def int_x86_ssse3_pshuf_b_128     : GCCBuiltin<"__builtin_ia32_pshufb128">,
 646               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 647                          llvm_v16i8_ty], [IntrNoMem]>;
 648 }
 649
 650 // Sign ops
 651 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 652   def int_x86_ssse3_psign_b         : GCCBuiltin<"__builtin_ia32_psignb">,
 653               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 654                          llvm_v8i8_ty], [IntrNoMem]>;
 655   def int_x86_ssse3_psign_b_128     : GCCBuiltin<"__builtin_ia32_psignb128">,
 656               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 657                          llvm_v16i8_ty], [IntrNoMem]>;
 658
 659   def int_x86_ssse3_psign_w         : GCCBuiltin<"__builtin_ia32_psignw">,
 660               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 661                          llvm_v4i16_ty], [IntrNoMem]>;
 662   def int_x86_ssse3_psign_w_128     : GCCBuiltin<"__builtin_ia32_psignw128">,
 663               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 664                          llvm_v8i16_ty], [IntrNoMem]>;
 665
 666   def int_x86_ssse3_psign_d         : GCCBuiltin<"__builtin_ia32_psignd">,
 667               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 668                          llvm_v2i32_ty], [IntrNoMem]>;
 669   def int_x86_ssse3_psign_d_128     : GCCBuiltin<"__builtin_ia32_psignd128">,
 670               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 671                          llvm_v4i32_ty], [IntrNoMem]>;
 672 }
 673
 674 // Absolute value ops
 675 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 676   def int_x86_ssse3_pabs_b     : GCCBuiltin<"__builtin_ia32_pabsb">,
 677               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
 678   def int_x86_ssse3_pabs_b_128 : GCCBuiltin<"__builtin_ia32_pabsb128">,
 679               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty], [IntrNoMem]>;
 680
 681   def int_x86_ssse3_pabs_w     : GCCBuiltin<"__builtin_ia32_pabsw">,
 682               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty], [IntrNoMem]>;
 683   def int_x86_ssse3_pabs_w_128 : GCCBuiltin<"__builtin_ia32_pabsw128">,
 684               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty], [IntrNoMem]>;
 685
 686   def int_x86_ssse3_pabs_d     : GCCBuiltin<"__builtin_ia32_pabsd">,
 687               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty], [IntrNoMem]>;
 688   def int_x86_ssse3_pabs_d_128 : GCCBuiltin<"__builtin_ia32_pabsd128">,
 689               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 690 }
 691
 692 // Align ops
 693 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 694   def int_x86_ssse3_palign_r        : GCCBuiltin<"__builtin_ia32_palignr">,
 695               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
 696                          llvm_v1i64_ty, llvm_i16_ty], [IntrNoMem]>;
 697   def int_x86_ssse3_palign_r_128    : GCCBuiltin<"__builtin_ia32_palignr128">,
 698               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 699                          llvm_v2i64_ty, llvm_i32_ty], [IntrNoMem]>;
 700 }
 701
 702 //===----------------------------------------------------------------------===//
 703 // SSE4.1
 704
 705 // FP rounding ops
 706 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 707   def int_x86_sse41_round_ss        : GCCBuiltin<"__builtin_ia32_roundss">,
 708               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 709                          llvm_i32_ty], [IntrNoMem]>;
 710   def int_x86_sse41_round_ps        : GCCBuiltin<"__builtin_ia32_roundps">,
 711               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 712                          llvm_i32_ty], [IntrNoMem]>;
 713   def int_x86_sse41_round_sd        : GCCBuiltin<"__builtin_ia32_roundsd">,
 714               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 715                          llvm_i32_ty], [IntrNoMem]>;
 716   def int_x86_sse41_round_pd        : GCCBuiltin<"__builtin_ia32_roundpd">,
 717               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 718                          llvm_i32_ty], [IntrNoMem]>;
 719 }
 720
 721 // Vector sign and zero extend
 722 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 723   def int_x86_sse41_pmovsxbd        : GCCBuiltin<"__builtin_ia32_pmovsxbd128">,
 724               Intrinsic<[llvm_v4i32_ty, llvm_v16i8_ty]>;
 725   def int_x86_sse41_pmovsxbq        : GCCBuiltin<"__builtin_ia32_pmovsxbq128">,
 726               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty]>;
 727   def int_x86_sse41_pmovsxbw        : GCCBuiltin<"__builtin_ia32_pmovsxbw128">,
 728               Intrinsic<[llvm_v8i16_ty, llvm_v16i8_ty]>;
 729   def int_x86_sse41_pmovsxdq        : GCCBuiltin<"__builtin_ia32_pmovsxdq128">,
 730               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty]>;
 731   def int_x86_sse41_pmovsxwd        : GCCBuiltin<"__builtin_ia32_pmovsxwd128">,
 732               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty]>;
 733   def int_x86_sse41_pmovsxwq        : GCCBuiltin<"__builtin_ia32_pmovsxwq128">,
 734               Intrinsic<[llvm_v2i64_ty, llvm_v8i16_ty]>;
 735   def int_x86_sse41_pmovzxbd        : GCCBuiltin<"__builtin_ia32_pmovzxbd128">,
 736               Intrinsic<[llvm_v4i32_ty, llvm_v16i8_ty]>;
 737   def int_x86_sse41_pmovzxbq        : GCCBuiltin<"__builtin_ia32_pmovzxbq128">,
 738               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty]>;
 739   def int_x86_sse41_pmovzxbw        : GCCBuiltin<"__builtin_ia32_pmovzxbw128">,
 740               Intrinsic<[llvm_v8i16_ty, llvm_v16i8_ty]>;
 741   def int_x86_sse41_pmovzxdq        : GCCBuiltin<"__builtin_ia32_pmovzxdq128">,
 742               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty]>;
 743   def int_x86_sse41_pmovzxwd        : GCCBuiltin<"__builtin_ia32_pmovzxwd128">,
 744               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty]>;
 745   def int_x86_sse41_pmovzxwq        : GCCBuiltin<"__builtin_ia32_pmovzxwq128">,
 746               Intrinsic<[llvm_v2i64_ty, llvm_v8i16_ty]>;
 747 }
 748
 749 // Vector min element
 750 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 751   def int_x86_sse41_phminposuw     : GCCBuiltin<"__builtin_ia32_phminposuw128">,
 752               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty]>;
 753 }
 754
 755 // Vector compare, min, max
 756 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 757   def int_x86_sse41_pcmpeqq         : GCCBuiltin<"__builtin_ia32_pcmpeqq">,
 758               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty, llvm_v2i64_ty]>;
 759   def int_x86_sse41_pmaxsb          : GCCBuiltin<"__builtin_ia32_pmaxsb128">,
 760               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty]>;
 761   def int_x86_sse41_pmaxsd          : GCCBuiltin<"__builtin_ia32_pmaxsd128">,
 762               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 763   def int_x86_sse41_pmaxud          : GCCBuiltin<"__builtin_ia32_pmaxud128">,
 764               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 765   def int_x86_sse41_pmaxuw          : GCCBuiltin<"__builtin_ia32_pmaxuw128">,
 766               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty]>;
 767   def int_x86_sse41_pminsb          : GCCBuiltin<"__builtin_ia32_pminsb128">,
 768               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty]>;
 769   def int_x86_sse41_pminsd          : GCCBuiltin<"__builtin_ia32_pminsd128">,
 770               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 771   def int_x86_sse41_pminud          : GCCBuiltin<"__builtin_ia32_pminud128">,
 772               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 773   def int_x86_sse41_pminuw          : GCCBuiltin<"__builtin_ia32_pminuw128">,
 774               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty]>;
 775 }
 776
 777 // Vector pack
 778 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 779   def int_x86_sse41_packusdw        : GCCBuiltin<"__builtin_ia32_packusdw128">,
 780               Intrinsic<[llvm_v8i16_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 781 }
 782
 783 // Vector multiply
 784 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 785   def int_x86_sse41_pmuldq          : GCCBuiltin<"__builtin_ia32_pmuldq128">,
 786               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 787   def int_x86_sse41_pmulld          : GCCBuiltin<"__builtin_ia32_pmulld128">,
 788               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_v4i32_ty]>;
 789 }
 790
 791 // Vector extract
 792 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 793   def int_x86_sse41_pextrb         :
 794               Intrinsic<[llvm_i32_ty, llvm_v16i8_ty, llvm_i32_ty]>;
 795   def int_x86_sse41_pextrd         :
 796               Intrinsic<[llvm_i32_ty, llvm_v4i32_ty, llvm_i32_ty]>;
 797   def int_x86_sse41_pextrq         :
 798               Intrinsic<[llvm_i64_ty, llvm_v2i64_ty, llvm_i32_ty]>;
 799   def int_x86_sse41_extractps      : GCCBuiltin<"__builtin_ia32_extractps128">,
 800               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
 801 }
 802
 803 // Vector insert
 804 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 805   def int_x86_sse41_pinsrb         : GCCBuiltin<"__builtin_ia32_vec_set_v16qi">,
 806           Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty, llvm_i32_ty]>;
 807   def int_x86_sse41_pinsrd         : GCCBuiltin<"__builtin_ia32_vec_set_v4si">,
 808           Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty, llvm_i32_ty, llvm_i32_ty]>;
 809   def int_x86_sse41_pinsrq         : GCCBuiltin<"__builtin_ia32_vec_set_v2di">,
 810           Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty, llvm_i64_ty, llvm_i32_ty]>;
 811   def int_x86_sse41_insertps       : GCCBuiltin<"__builtin_ia32_insertps128">,
 812           Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
 813 }
 814
 815 // Vector blend
 816 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 817   def int_x86_sse41_pblendvb         : GCCBuiltin<"__builtin_ia32_pblendvb128">,
 818         Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty]>;
 819   def int_x86_sse41_pblendw          : GCCBuiltin<"__builtin_ia32_pblendw128">,
 820         Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty, llvm_v8i16_ty, llvm_i32_ty]>;
 821   def int_x86_sse41_blendpd          : GCCBuiltin<"__builtin_ia32_blendpd">,
 822         Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty]>;
 823   def int_x86_sse41_blendps          : GCCBuiltin<"__builtin_ia32_blendps">,
 824         Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
 825   def int_x86_sse41_blendvpd         : GCCBuiltin<"__builtin_ia32_blendvpd">,
 826         Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty]>;
 827   def int_x86_sse41_blendvps         : GCCBuiltin<"__builtin_ia32_blendvps">,
 828         Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty]>;
 829 }
 830
 831 // Vector dot product
 832 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 833   def int_x86_sse41_dppd            : GCCBuiltin<"__builtin_ia32_dppd">,
 834           Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty]>;
 835   def int_x86_sse41_dpps            : GCCBuiltin<"__builtin_ia32_dpps">,
 836           Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty]>;
 837 }
 838
 839 // Vector sum of absolute differences
 840 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 841   def int_x86_sse41_mpsadbw         : GCCBuiltin<"__builtin_ia32_mpsadbw128">,
 842           Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty]>;
 843 }
 844
 845 // Vector sum of absolute differences
 846 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 847   def int_x86_sse41_movntdqa        : GCCBuiltin<"__builtin_ia32_movntdqa">,
 848           Intrinsic<[llvm_v2i64_ty, llvm_ptr_ty], [IntrReadMem]>;
 849 }
 850
 851
 852 //===----------------------------------------------------------------------===//
 853 // MMX
 854
 855 // Empty MMX state op.
 856 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 857   def int_x86_mmx_emms  : GCCBuiltin<"__builtin_ia32_emms">,
 858               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 859   def int_x86_mmx_femms : GCCBuiltin<"__builtin_ia32_femms">,
 860               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 861 }
 862
 863 // Integer arithmetic ops.
 864 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 865   // Addition
 866   def int_x86_mmx_padds_b : GCCBuiltin<"__builtin_ia32_paddsb">,
 867               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 868                          llvm_v8i8_ty], [IntrNoMem]>;
 869   def int_x86_mmx_padds_w : GCCBuiltin<"__builtin_ia32_paddsw">,
 870               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 871                          llvm_v4i16_ty], [IntrNoMem]>;
 872
 873   def int_x86_mmx_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb">,
 874               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 875                          llvm_v8i8_ty], [IntrNoMem]>;
 876   def int_x86_mmx_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw">,
 877               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 878                          llvm_v4i16_ty], [IntrNoMem]>;
 879
 880   // Subtraction
 881   def int_x86_mmx_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb">,
 882               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 883                          llvm_v8i8_ty], [IntrNoMem]>;
 884   def int_x86_mmx_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw">,
 885               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 886                          llvm_v4i16_ty], [IntrNoMem]>;
 887
 888   def int_x86_mmx_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb">,
 889               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 890                          llvm_v8i8_ty], [IntrNoMem]>;
 891   def int_x86_mmx_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw">,
 892               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 893                          llvm_v4i16_ty], [IntrNoMem]>;
 894
 895   // Multiplication
 896   def int_x86_mmx_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw">,
 897               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 898                          llvm_v4i16_ty], [IntrNoMem]>;
 899   def int_x86_mmx_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw">,
 900               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 901                          llvm_v4i16_ty], [IntrNoMem]>;
 902   def int_x86_mmx_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq">,
 903               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 904                          llvm_v2i32_ty], [IntrNoMem]>;
 905   def int_x86_mmx_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd">,
 906               Intrinsic<[llvm_v2i32_ty, llvm_v4i16_ty,
 907                          llvm_v4i16_ty], [IntrNoMem]>;
 908
 909   // Averages
 910   def int_x86_mmx_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb">,
 911               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 912                          llvm_v8i8_ty], [IntrNoMem]>;
 913   def int_x86_mmx_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw">,
 914               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 915                          llvm_v4i16_ty], [IntrNoMem]>;
 916
 917   // Maximum
 918   def int_x86_mmx_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub">,
 919               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 920                          llvm_v8i8_ty], [IntrNoMem]>;
 921   def int_x86_mmx_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw">,
 922               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 923                          llvm_v4i16_ty], [IntrNoMem]>;
 924
 925   // Minimum
 926   def int_x86_mmx_pminu_b : GCCBuiltin<"__builtin_ia32_pminub">,
 927               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 928                          llvm_v8i8_ty], [IntrNoMem]>;
 929   def int_x86_mmx_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw">,
 930               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 931                          llvm_v4i16_ty], [IntrNoMem]>;
 932
 933   // Packed sum of absolute differences
 934   def int_x86_mmx_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw">,
 935               Intrinsic<[llvm_v4i16_ty, llvm_v8i8_ty,
 936                          llvm_v8i8_ty], [IntrNoMem]>;
 937 }
 938
 939 // Integer shift ops.
 940 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 941   // Shift left logical
 942   def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">,
 943               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 944                          llvm_v1i64_ty], [IntrNoMem]>;
 945   def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">,
 946               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 947                          llvm_v1i64_ty], [IntrNoMem]>;
 948   def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">,
 949               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
 950                          llvm_v1i64_ty], [IntrNoMem]>;
 951
 952   def int_x86_mmx_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw">,
 953               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 954                          llvm_v1i64_ty], [IntrNoMem]>;
 955   def int_x86_mmx_psrl_d : GCCBuiltin<"__builtin_ia32_psrld">,
 956               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 957                          llvm_v1i64_ty], [IntrNoMem]>;
 958   def int_x86_mmx_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq">,
 959               Intrinsic<[llvm_v1i64_ty,   llvm_v1i64_ty,
 960                          llvm_v1i64_ty], [IntrNoMem]>;
 961
 962   def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">,
 963               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 964                          llvm_v1i64_ty], [IntrNoMem]>;
 965   def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
 966               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 967                          llvm_v1i64_ty], [IntrNoMem]>;
 968
 969   def int_x86_mmx_pslli_w : GCCBuiltin<"__builtin_ia32_psllwi">,
 970               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 971                          llvm_i32_ty], [IntrNoMem]>;
 972   def int_x86_mmx_pslli_d : GCCBuiltin<"__builtin_ia32_pslldi">,
 973               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 974                          llvm_i32_ty], [IntrNoMem]>;
 975   def int_x86_mmx_pslli_q : GCCBuiltin<"__builtin_ia32_psllqi">,
 976               Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
 977                          llvm_i32_ty], [IntrNoMem]>;
 978
 979   def int_x86_mmx_psrli_w : GCCBuiltin<"__builtin_ia32_psrlwi">,
 980               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 981                          llvm_i32_ty], [IntrNoMem]>;
 982   def int_x86_mmx_psrli_d : GCCBuiltin<"__builtin_ia32_psrldi">,
 983               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 984                          llvm_i32_ty], [IntrNoMem]>;
 985   def int_x86_mmx_psrli_q : GCCBuiltin<"__builtin_ia32_psrlqi">,
 986               Intrinsic<[llvm_v1i64_ty,   llvm_v1i64_ty,
 987                          llvm_i32_ty], [IntrNoMem]>;
 988
 989   def int_x86_mmx_psrai_w : GCCBuiltin<"__builtin_ia32_psrawi">,
 990               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 991                          llvm_i32_ty], [IntrNoMem]>;
 992   def int_x86_mmx_psrai_d : GCCBuiltin<"__builtin_ia32_psradi">,
 993               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 994                          llvm_i32_ty], [IntrNoMem]>;
 995 }
 996
 997 // Pack ops.
 998 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 999   def int_x86_mmx_packsswb : GCCBuiltin<"__builtin_ia32_packsswb">,
1000               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
1001                          llvm_v4i16_ty], [IntrNoMem]>;
1002   def int_x86_mmx_packssdw : GCCBuiltin<"__builtin_ia32_packssdw">,
1003               Intrinsic<[llvm_v4i16_ty, llvm_v2i32_ty,
1004                          llvm_v2i32_ty], [IntrNoMem]>;
1005   def int_x86_mmx_packuswb : GCCBuiltin<"__builtin_ia32_packuswb">,
1006               Intrinsic<[llvm_v8i8_ty, llvm_v4i16_ty,
1007                          llvm_v4i16_ty], [IntrNoMem]>;
1008 }
1009
1010 // Integer comparison ops
1011 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
1012   def int_x86_mmx_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb">,
1013               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
1014                          llvm_v8i8_ty], [IntrNoMem]>;
1015   def int_x86_mmx_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw">,
1016               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
1017                          llvm_v4i16_ty], [IntrNoMem]>;
1018   def int_x86_mmx_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd">,
1019               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
1020                          llvm_v2i32_ty], [IntrNoMem]>;
1021
1022   def int_x86_mmx_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb">,
1023               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
1024                          llvm_v8i8_ty], [IntrNoMem]>;
1025   def int_x86_mmx_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw">,
1026               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
1027                          llvm_v4i16_ty], [IntrNoMem]>;
1028   def int_x86_mmx_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd">,
1029               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
1030                          llvm_v2i32_ty], [IntrNoMem]>;
1031 }
1032
1033 // Misc.
1034 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
1035   def int_x86_mmx_maskmovq : GCCBuiltin<"__builtin_ia32_maskmovq">,
1036               Intrinsic<[llvm_void_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_ptr_ty],
1037                         [IntrWriteMem]>;
1038
1039   def int_x86_mmx_pmovmskb : GCCBuiltin<"__builtin_ia32_pmovmskb">,
1040               Intrinsic<[llvm_i32_ty, llvm_v8i8_ty], [IntrNoMem]>;
1041
1042   def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">,
1043               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
1044                          llvm_v1i64_ty], [IntrWriteMem]>;
1045 }