include/llvm/IntrinsicsX86.td

   1 //===- IntrinsicsX86.td - Defines X86 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by Chris Lattner and is distributed under the
   6 // University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the X86-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14
  15 //===----------------------------------------------------------------------===//
  16 // SSE1
  17
  18 // Arithmetic ops
  19 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  20   def int_x86_sse_add_ss : GCCBuiltin<"__builtin_ia32_addss">,
  21               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  22                          llvm_v4f32_ty], [IntrNoMem]>;
  23   def int_x86_sse_sub_ss : GCCBuiltin<"__builtin_ia32_subss">,
  24               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  25                          llvm_v4f32_ty], [IntrNoMem]>;
  26   def int_x86_sse_mul_ss : GCCBuiltin<"__builtin_ia32_mulss">,
  27               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  28                          llvm_v4f32_ty], [IntrNoMem]>;
  29   def int_x86_sse_div_ss : GCCBuiltin<"__builtin_ia32_divss">,
  30               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  31                          llvm_v4f32_ty], [IntrNoMem]>;
  32   def int_x86_sse_sqrt_ss : GCCBuiltin<"__builtin_ia32_sqrtss">,
  33               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  34                         [IntrNoMem]>;
  35   def int_x86_sse_sqrt_ps : GCCBuiltin<"__builtin_ia32_sqrtps">,
  36               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  37                         [IntrNoMem]>;
  38   def int_x86_sse_rcp_ss : GCCBuiltin<"__builtin_ia32_rcpss">,
  39               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  40                         [IntrNoMem]>;
  41   def int_x86_sse_rcp_ps : GCCBuiltin<"__builtin_ia32_rcpps">,
  42               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  43                         [IntrNoMem]>;
  44   def int_x86_sse_rsqrt_ss : GCCBuiltin<"__builtin_ia32_rsqrtss">,
  45               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  46                         [IntrNoMem]>;
  47   def int_x86_sse_rsqrt_ps : GCCBuiltin<"__builtin_ia32_rsqrtps">,
  48               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty],
  49                         [IntrNoMem]>;
  50   def int_x86_sse_min_ss : GCCBuiltin<"__builtin_ia32_minss">,
  51               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  52                          llvm_v4f32_ty], [IntrNoMem]>;
  53   def int_x86_sse_min_ps : GCCBuiltin<"__builtin_ia32_minps">,
  54               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  55                          llvm_v4f32_ty], [IntrNoMem]>;
  56   def int_x86_sse_max_ss : GCCBuiltin<"__builtin_ia32_maxss">,
  57               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  58                          llvm_v4f32_ty], [IntrNoMem]>;
  59   def int_x86_sse_max_ps : GCCBuiltin<"__builtin_ia32_maxps">,
  60               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  61                          llvm_v4f32_ty], [IntrNoMem]>;
  62 }
  63
  64 // Comparison ops
  65 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
  66   def int_x86_sse_cmp_ss :
  67               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  68                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  69   def int_x86_sse_cmp_ps :
  70               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
  71                          llvm_v4f32_ty, llvm_i8_ty], [IntrNoMem]>;
  72   def int_x86_sse_comieq_ss : GCCBuiltin<"__builtin_ia32_comieq">,
  73               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  74                          llvm_v4f32_ty], [IntrNoMem]>;
  75   def int_x86_sse_comilt_ss : GCCBuiltin<"__builtin_ia32_comilt">,
  76               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  77                          llvm_v4f32_ty], [IntrNoMem]>;
  78   def int_x86_sse_comile_ss : GCCBuiltin<"__builtin_ia32_comile">,
  79               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  80                          llvm_v4f32_ty], [IntrNoMem]>;
  81   def int_x86_sse_comigt_ss : GCCBuiltin<"__builtin_ia32_comigt">,
  82               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  83                          llvm_v4f32_ty], [IntrNoMem]>;
  84   def int_x86_sse_comige_ss : GCCBuiltin<"__builtin_ia32_comige">,
  85               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  86                          llvm_v4f32_ty], [IntrNoMem]>;
  87   def int_x86_sse_comineq_ss : GCCBuiltin<"__builtin_ia32_comineq">,
  88               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  89                          llvm_v4f32_ty], [IntrNoMem]>;
  90   def int_x86_sse_ucomieq_ss : GCCBuiltin<"__builtin_ia32_ucomieq">,
  91               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  92                          llvm_v4f32_ty], [IntrNoMem]>;
  93   def int_x86_sse_ucomilt_ss : GCCBuiltin<"__builtin_ia32_ucomilt">,
  94               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  95                          llvm_v4f32_ty], [IntrNoMem]>;
  96   def int_x86_sse_ucomile_ss : GCCBuiltin<"__builtin_ia32_ucomile">,
  97               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
  98                          llvm_v4f32_ty], [IntrNoMem]>;
  99   def int_x86_sse_ucomigt_ss : GCCBuiltin<"__builtin_ia32_ucomigt">,
 100               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 101                          llvm_v4f32_ty], [IntrNoMem]>;
 102   def int_x86_sse_ucomige_ss : GCCBuiltin<"__builtin_ia32_ucomige">,
 103               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 104                          llvm_v4f32_ty], [IntrNoMem]>;
 105   def int_x86_sse_ucomineq_ss : GCCBuiltin<"__builtin_ia32_ucomineq">,
 106               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty,
 107                          llvm_v4f32_ty], [IntrNoMem]>;
 108 }
 109
 110
 111 // Conversion ops
 112 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 113   def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">,
 114               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 115   def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">,
 116               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 117   def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">,
 118               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 119                          llvm_i32_ty], [IntrNoMem]>;
 120 }
 121
 122 // SIMD load ops
 123 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 124   def int_x86_sse_loadu_ps : GCCBuiltin<"__builtin_ia32_loadups">,
 125               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
 126 }
 127
 128 // SIMD store ops
 129 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 130   def int_x86_sse_storeu_ps : GCCBuiltin<"__builtin_ia32_storeups">,
 131               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 132                          llvm_v4f32_ty], [IntrWriteMem]>;
 133 }
 134
 135 // Cacheability support ops
 136 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 137   def int_x86_sse_movnt_ps : GCCBuiltin<"__builtin_ia32_movntps">,
 138               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 139                          llvm_v4f32_ty], [IntrWriteMem]>;
 140   def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
 141               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 142 }
 143
 144 // Control register.
 145 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 146   def int_x86_sse_stmxcsr :
 147               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 148   def int_x86_sse_ldmxcsr :
 149               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 150 }
 151
 152 // Misc.
 153 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 154   def int_x86_sse_movmsk_ps : GCCBuiltin<"__builtin_ia32_movmskps">,
 155               Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 156 }
 157
 158 //===----------------------------------------------------------------------===//
 159 // SSE2
 160
 161 // FP arithmetic ops
 162 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 163   def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">,
 164               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 165                          llvm_v2f64_ty], [IntrNoMem]>;
 166   def int_x86_sse2_sub_sd : GCCBuiltin<"__builtin_ia32_subsd">,
 167               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 168                          llvm_v2f64_ty], [IntrNoMem]>;
 169   def int_x86_sse2_mul_sd : GCCBuiltin<"__builtin_ia32_mulsd">,
 170               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 171                          llvm_v2f64_ty], [IntrNoMem]>;
 172   def int_x86_sse2_div_sd : GCCBuiltin<"__builtin_ia32_divsd">,
 173               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 174                          llvm_v2f64_ty], [IntrNoMem]>;
 175   def int_x86_sse2_sqrt_sd : GCCBuiltin<"__builtin_ia32_sqrtsd">,
 176               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 177                         [IntrNoMem]>;
 178   def int_x86_sse2_sqrt_pd : GCCBuiltin<"__builtin_ia32_sqrtpd">,
 179               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 180                         [IntrNoMem]>;
 181   def int_x86_sse2_rcp_sd : GCCBuiltin<"__builtin_ia32_rcpsd">,
 182               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 183                         [IntrNoMem]>;
 184   def int_x86_sse2_rcp_pd : GCCBuiltin<"__builtin_ia32_rcppd">,
 185               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 186                         [IntrNoMem]>;
 187   def int_x86_sse2_rsqrt_sd : GCCBuiltin<"__builtin_ia32_rsqrtsd">,
 188               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 189                         [IntrNoMem]>;
 190   def int_x86_sse2_rsqrt_pd : GCCBuiltin<"__builtin_ia32_rsqrtpd">,
 191               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty],
 192                         [IntrNoMem]>;
 193   def int_x86_sse2_min_sd : GCCBuiltin<"__builtin_ia32_minsd">,
 194               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 195                          llvm_v2f64_ty], [IntrNoMem]>;
 196   def int_x86_sse2_min_pd : GCCBuiltin<"__builtin_ia32_minpd">,
 197               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 198                          llvm_v2f64_ty], [IntrNoMem]>;
 199   def int_x86_sse2_max_sd : GCCBuiltin<"__builtin_ia32_maxsd">,
 200               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 201                          llvm_v2f64_ty], [IntrNoMem]>;
 202   def int_x86_sse2_max_pd : GCCBuiltin<"__builtin_ia32_maxpd">,
 203               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 204                          llvm_v2f64_ty], [IntrNoMem]>;
 205 }
 206
 207 // FP comparison ops
 208 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 209   def int_x86_sse2_cmp_sd :
 210               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 211                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 212   def int_x86_sse2_cmp_pd :
 213               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 214                          llvm_v2f64_ty, llvm_i8_ty], [IntrNoMem]>;
 215   def int_x86_sse2_comieq_sd : GCCBuiltin<"__builtin_ia32_comisdeq">,
 216               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 217                          llvm_v2f64_ty], [IntrNoMem]>;
 218   def int_x86_sse2_comilt_sd : GCCBuiltin<"__builtin_ia32_comisdlt">,
 219               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 220                          llvm_v2f64_ty], [IntrNoMem]>;
 221   def int_x86_sse2_comile_sd : GCCBuiltin<"__builtin_ia32_comisdle">,
 222               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 223                          llvm_v2f64_ty], [IntrNoMem]>;
 224   def int_x86_sse2_comigt_sd : GCCBuiltin<"__builtin_ia32_comisdgt">,
 225               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 226                          llvm_v2f64_ty], [IntrNoMem]>;
 227   def int_x86_sse2_comige_sd : GCCBuiltin<"__builtin_ia32_comisdge">,
 228               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 229                          llvm_v2f64_ty], [IntrNoMem]>;
 230   def int_x86_sse2_comineq_sd : GCCBuiltin<"__builtin_ia32_comisdneq">,
 231               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 232                          llvm_v2f64_ty], [IntrNoMem]>;
 233   def int_x86_sse2_ucomieq_sd : GCCBuiltin<"__builtin_ia32_ucomisdeq">,
 234               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 235                          llvm_v2f64_ty], [IntrNoMem]>;
 236   def int_x86_sse2_ucomilt_sd : GCCBuiltin<"__builtin_ia32_ucomisdlt">,
 237               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 238                          llvm_v2f64_ty], [IntrNoMem]>;
 239   def int_x86_sse2_ucomile_sd : GCCBuiltin<"__builtin_ia32_ucomisdle">,
 240               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 241                          llvm_v2f64_ty], [IntrNoMem]>;
 242   def int_x86_sse2_ucomigt_sd : GCCBuiltin<"__builtin_ia32_ucomisdgt">,
 243               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 244                          llvm_v2f64_ty], [IntrNoMem]>;
 245   def int_x86_sse2_ucomige_sd : GCCBuiltin<"__builtin_ia32_ucomisdge">,
 246               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 247                          llvm_v2f64_ty], [IntrNoMem]>;
 248   def int_x86_sse2_ucomineq_sd : GCCBuiltin<"__builtin_ia32_ucomisdneq">,
 249               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty,
 250                          llvm_v2f64_ty], [IntrNoMem]>;
 251 }
 252
 253 // Integer arithmetic ops.
 254 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 255   def int_x86_sse2_padds_b : GCCBuiltin<"__builtin_ia32_paddsb128">,
 256               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 257                          llvm_v16i8_ty], [IntrNoMem]>;
 258   def int_x86_sse2_padds_w : GCCBuiltin<"__builtin_ia32_paddsw128">,
 259               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 260                          llvm_v8i16_ty], [IntrNoMem]>;
 261   def int_x86_sse2_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb128">,
 262               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 263                          llvm_v16i8_ty], [IntrNoMem]>;
 264   def int_x86_sse2_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw128">,
 265               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 266                          llvm_v8i16_ty], [IntrNoMem]>;
 267   def int_x86_sse2_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb128">,
 268               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 269                          llvm_v16i8_ty], [IntrNoMem]>;
 270   def int_x86_sse2_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw128">,
 271               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 272                          llvm_v8i16_ty], [IntrNoMem]>;
 273   def int_x86_sse2_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb128">,
 274               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 275                          llvm_v16i8_ty], [IntrNoMem]>;
 276   def int_x86_sse2_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw128">,
 277               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 278                          llvm_v8i16_ty], [IntrNoMem]>;
 279   def int_x86_sse2_pmulhu_w : GCCBuiltin<"__builtin_ia32_pmulhuw128">,
 280               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 281                          llvm_v8i16_ty], [IntrNoMem]>;
 282   def int_x86_sse2_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw128">,
 283               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 284                          llvm_v8i16_ty], [IntrNoMem]>;
 285   def int_x86_sse2_pmulu_dq : GCCBuiltin<"__builtin_ia32_pmuludq128">,
 286               Intrinsic<[llvm_v2i64_ty, llvm_v4i32_ty,
 287                          llvm_v4i32_ty], [IntrNoMem]>;
 288   def int_x86_sse2_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd128">,
 289               Intrinsic<[llvm_v4i32_ty, llvm_v8i16_ty,
 290                          llvm_v8i16_ty], [IntrNoMem]>;
 291   def int_x86_sse2_pavg_b : GCCBuiltin<"__builtin_ia32_pavgb128">,
 292               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 293                          llvm_v16i8_ty], [IntrNoMem]>;
 294   def int_x86_sse2_pavg_w : GCCBuiltin<"__builtin_ia32_pavgw128">,
 295               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 296                          llvm_v8i16_ty], [IntrNoMem]>;
 297   def int_x86_sse2_pmaxu_b : GCCBuiltin<"__builtin_ia32_pmaxub128">,
 298               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 299                          llvm_v16i8_ty], [IntrNoMem]>;
 300   def int_x86_sse2_pmaxs_w : GCCBuiltin<"__builtin_ia32_pmaxsw128">,
 301               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 302                          llvm_v8i16_ty], [IntrNoMem]>;
 303   def int_x86_sse2_pminu_b : GCCBuiltin<"__builtin_ia32_pminub128">,
 304               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 305                          llvm_v16i8_ty], [IntrNoMem]>;
 306   def int_x86_sse2_pmins_w : GCCBuiltin<"__builtin_ia32_pminsw128">,
 307               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 308                          llvm_v8i16_ty], [IntrNoMem]>;
 309   def int_x86_sse2_psad_bw : GCCBuiltin<"__builtin_ia32_psadbw128">,
 310               Intrinsic<[llvm_v2i64_ty, llvm_v16i8_ty,
 311                          llvm_v16i8_ty], [IntrNoMem]>;
 312 }
 313
 314 // Integer shift ops.
 315 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 316   def int_x86_sse2_psll_w :
 317               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 318                          llvm_v4i32_ty], [IntrNoMem]>;
 319   def int_x86_sse2_psll_d :
 320               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 321                          llvm_v4i32_ty], [IntrNoMem]>;
 322   def int_x86_sse2_psll_q :
 323               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 324                          llvm_v4i32_ty], [IntrNoMem]>;
 325   def int_x86_sse2_psll_dq : GCCBuiltin<"__builtin_ia32_pslldqi128">,
 326               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 327                          llvm_i32_ty], [IntrNoMem]>;
 328   def int_x86_sse2_psrl_w :
 329               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 330                          llvm_v4i32_ty], [IntrNoMem]>;
 331   def int_x86_sse2_psrl_d :
 332               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 333                          llvm_v4i32_ty], [IntrNoMem]>;
 334   def int_x86_sse2_psrl_q :
 335               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 336                          llvm_v4i32_ty], [IntrNoMem]>;
 337   def int_x86_sse2_psrl_dq : GCCBuiltin<"__builtin_ia32_psrldqi128">,
 338               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 339                          llvm_i32_ty], [IntrNoMem]>;
 340   def int_x86_sse2_psra_w :
 341               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 342                          llvm_v4i32_ty], [IntrNoMem]>;
 343   def int_x86_sse2_psra_d :
 344               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 345                          llvm_v4i32_ty], [IntrNoMem]>;
 346 }
 347
 348 // Integer comparison ops
 349 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 350   def int_x86_sse2_pcmpeq_b : GCCBuiltin<"__builtin_ia32_pcmpeqb128">,
 351               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 352                          llvm_v16i8_ty], [IntrNoMem]>;
 353   def int_x86_sse2_pcmpeq_w : GCCBuiltin<"__builtin_ia32_pcmpeqw128">,
 354               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 355                          llvm_v8i16_ty], [IntrNoMem]>;
 356   def int_x86_sse2_pcmpeq_d : GCCBuiltin<"__builtin_ia32_pcmpeqd128">,
 357               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 358                          llvm_v4i32_ty], [IntrNoMem]>;
 359   def int_x86_sse2_pcmpgt_b : GCCBuiltin<"__builtin_ia32_pcmpgtb128">,
 360               Intrinsic<[llvm_v16i8_ty, llvm_v16i8_ty,
 361                          llvm_v16i8_ty], [IntrNoMem]>;
 362   def int_x86_sse2_pcmpgt_w : GCCBuiltin<"__builtin_ia32_pcmpgtw128">,
 363               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 364                          llvm_v8i16_ty], [IntrNoMem]>;
 365   def int_x86_sse2_pcmpgt_d : GCCBuiltin<"__builtin_ia32_pcmpgtd128">,
 366               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 367                          llvm_v4i32_ty], [IntrNoMem]>;
 368 }
 369
 370 // Conversion ops
 371 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 372   def int_x86_sse2_cvtdq2pd : GCCBuiltin<"__builtin_ia32_cvtdq2pd">,
 373               Intrinsic<[llvm_v2f64_ty, llvm_v4i32_ty], [IntrNoMem]>;
 374   def int_x86_sse2_cvtdq2ps : GCCBuiltin<"__builtin_ia32_cvtdq2ps">,
 375               Intrinsic<[llvm_v4f32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 376   def int_x86_sse2_cvtpd2dq : GCCBuiltin<"__builtin_ia32_cvtpd2dq">,
 377               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 378   def int_x86_sse2_cvttpd2dq : GCCBuiltin<"__builtin_ia32_cvttpd2dq">,
 379               Intrinsic<[llvm_v4i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 380   def int_x86_sse2_cvtpd2ps : GCCBuiltin<"__builtin_ia32_cvtpd2ps">,
 381               Intrinsic<[llvm_v4f32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 382   def int_x86_sse2_cvtps2dq : GCCBuiltin<"__builtin_ia32_cvtps2dq">,
 383               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 384   def int_x86_sse2_cvttps2dq : GCCBuiltin<"__builtin_ia32_cvttps2dq">,
 385               Intrinsic<[llvm_v4i32_ty, llvm_v4f32_ty], [IntrNoMem]>;
 386   def int_x86_sse2_cvtps2pd : GCCBuiltin<"__builtin_ia32_cvtps2pd">,
 387               Intrinsic<[llvm_v2f64_ty, llvm_v4f32_ty], [IntrNoMem]>;
 388   def int_x86_sse2_cvtsd2si : GCCBuiltin<"__builtin_ia32_cvtsd2si">,
 389               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 390   def int_x86_sse2_cvttsd2si : GCCBuiltin<"__builtin_ia32_cvttsd2si">,
 391               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 392   def int_x86_sse2_cvtsi2sd : GCCBuiltin<"__builtin_ia32_cvtsi2sd">,
 393               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 394                          llvm_i32_ty], [IntrNoMem]>;
 395   def int_x86_sse2_cvtsd2ss : GCCBuiltin<"__builtin_ia32_cvtsd2ss">,
 396               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 397                          llvm_v2f64_ty], [IntrNoMem]>;
 398   def int_x86_sse2_cvtss2sd : GCCBuiltin<"__builtin_ia32_cvtss2sd">,
 399               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 400                          llvm_v4f32_ty], [IntrNoMem]>;
 401 }
 402
 403 // SIMD load ops
 404 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 405   def int_x86_sse2_loadu_pd : GCCBuiltin<"__builtin_ia32_loadupd">,
 406               Intrinsic<[llvm_v2f64_ty, llvm_ptr_ty], [IntrReadMem]>;
 407   def int_x86_sse2_loadu_dq : GCCBuiltin<"__builtin_ia32_loaddqu">,
 408               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 409 }
 410
 411 // SIMD store ops
 412 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 413   def int_x86_sse2_storeu_pd : GCCBuiltin<"__builtin_ia32_storeupd">,
 414               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 415                          llvm_v2f64_ty], [IntrWriteMem]>;
 416   def int_x86_sse2_storeu_dq : GCCBuiltin<"__builtin_ia32_storedqu">,
 417               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 418                          llvm_v16i8_ty], [IntrWriteMem]>;
 419   def int_x86_sse2_storel_dq : GCCBuiltin<"__builtin_ia32_storelv4si">,
 420               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 421                          llvm_v4i32_ty], [IntrWriteMem]>;
 422 }
 423
 424 // Cacheability support ops
 425 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 426   def int_x86_sse2_movnt_dq : GCCBuiltin<"__builtin_ia32_movntdq">,
 427               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 428                          llvm_v2i64_ty], [IntrWriteMem]>;
 429   def int_x86_sse2_movnt_pd : GCCBuiltin<"__builtin_ia32_movntpd">,
 430               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 431                          llvm_v2f64_ty], [IntrWriteMem]>;
 432   def int_x86_sse2_movnt_i : GCCBuiltin<"__builtin_ia32_movnti">,
 433               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 434                          llvm_i32_ty], [IntrWriteMem]>;
 435 }
 436
 437 // Misc.
 438 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 439   def int_x86_sse2_packsswb_128 : GCCBuiltin<"__builtin_ia32_packsswb128">,
 440               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 441                          llvm_v8i16_ty], [IntrNoMem]>;
 442   def int_x86_sse2_packssdw_128 : GCCBuiltin<"__builtin_ia32_packssdw128">,
 443               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
 444                          llvm_v4i32_ty], [IntrNoMem]>;
 445   def int_x86_sse2_packuswb_128 : GCCBuiltin<"__builtin_ia32_packuswb128">,
 446               Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
 447                          llvm_v8i16_ty], [IntrNoMem]>;
 448   def int_x86_sse2_movl_dq : GCCBuiltin<"__builtin_ia32_movqv4si">,
 449               Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty], [IntrNoMem]>;
 450   def int_x86_sse2_movmsk_pd : GCCBuiltin<"__builtin_ia32_movmskpd">,
 451               Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>;
 452   def int_x86_sse2_pmovmskb_128 : GCCBuiltin<"__builtin_ia32_pmovmskb128">,
 453               Intrinsic<[llvm_i32_ty, llvm_v16i8_ty], [IntrNoMem]>;
 454   def int_x86_sse2_maskmov_dqu : GCCBuiltin<"__builtin_ia32_maskmovdqu">,
 455               Intrinsic<[llvm_void_ty, llvm_v16i8_ty,
 456                          llvm_v16i8_ty, llvm_ptr_ty], [IntrWriteMem]>;
 457   def int_x86_sse2_clflush : GCCBuiltin<"__builtin_ia32_clflush">,
 458               Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>;
 459   def int_x86_sse2_lfence : GCCBuiltin<"__builtin_ia32_lfence">,
 460               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 461   def int_x86_sse2_mfence : GCCBuiltin<"__builtin_ia32_mfence">,
 462               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 463 }
 464
 465 // Shuffles.
 466 // FIXME: Temporary workarounds since 2-wide shuffle is broken.
 467 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 468   def int_x86_sse2_movs_d : GCCBuiltin<"__builtin_ia32_movsd">,
 469               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 470                          llvm_v2f64_ty], [IntrNoMem]>;
 471   def int_x86_sse2_loadh_pd : GCCBuiltin<"__builtin_ia32_loadhpd">,
 472               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 473                          llvm_ptr_ty], [IntrReadMem]>;
 474   def int_x86_sse2_loadl_pd : GCCBuiltin<"__builtin_ia32_loadlpd">,
 475               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 476                          llvm_ptr_ty], [IntrReadMem]>;
 477   def int_x86_sse2_shuf_pd : GCCBuiltin<"__builtin_ia32_shufpd">,
 478               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 479                          llvm_v2f64_ty, llvm_i32_ty], [IntrNoMem]>;
 480   def int_x86_sse2_unpckh_pd : GCCBuiltin<"__builtin_ia32_unpckhpd">,
 481               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 482                          llvm_v2f64_ty], [IntrNoMem]>;
 483   def int_x86_sse2_unpckl_pd : GCCBuiltin<"__builtin_ia32_unpcklpd">,
 484               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 485                          llvm_v2f64_ty], [IntrNoMem]>;
 486   def int_x86_sse2_punpckh_qdq : GCCBuiltin<"__builtin_ia32_punpckhqdq128">,
 487               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 488                          llvm_v2i64_ty], [IntrNoMem]>;
 489   def int_x86_sse2_punpckl_qdq : GCCBuiltin<"__builtin_ia32_punpcklqdq128">,
 490               Intrinsic<[llvm_v2i64_ty, llvm_v2i64_ty,
 491                          llvm_v2i64_ty], [IntrNoMem]>;
 492 }
 493
 494 //===----------------------------------------------------------------------===//
 495 // SSE3
 496
 497 // Addition / subtraction ops.
 498 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 499   def int_x86_sse3_addsub_ps : GCCBuiltin<"__builtin_ia32_addsubps">,
 500               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 501                          llvm_v4f32_ty], [IntrNoMem]>;
 502   def int_x86_sse3_addsub_pd : GCCBuiltin<"__builtin_ia32_addsubpd">,
 503               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 504                          llvm_v2f64_ty], [IntrNoMem]>;
 505 }
 506
 507 // Horizontal ops.
 508 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 509   def int_x86_sse3_hadd_ps : GCCBuiltin<"__builtin_ia32_haddps">,
 510               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 511                          llvm_v4f32_ty], [IntrNoMem]>;
 512   def int_x86_sse3_hadd_pd : GCCBuiltin<"__builtin_ia32_haddpd">,
 513               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 514                          llvm_v2f64_ty], [IntrNoMem]>;
 515   def int_x86_sse3_hsub_ps : GCCBuiltin<"__builtin_ia32_hsubps">,
 516               Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty,
 517                          llvm_v4f32_ty], [IntrNoMem]>;
 518   def int_x86_sse3_hsub_pd : GCCBuiltin<"__builtin_ia32_hsubpd">,
 519               Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty,
 520                          llvm_v2f64_ty], [IntrNoMem]>;
 521 }
 522
 523 // Specialized unaligned load.
 524 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 525   def int_x86_sse3_ldu_dq : GCCBuiltin<"__builtin_ia32_lddqu">,
 526               Intrinsic<[llvm_v16i8_ty, llvm_ptr_ty], [IntrReadMem]>;
 527 }
 528
 529 // Thread synchronization ops.
 530 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 531   def int_x86_sse3_monitor : GCCBuiltin<"__builtin_ia32_monitor">,
 532               Intrinsic<[llvm_void_ty, llvm_ptr_ty,
 533                          llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>;
 534   def int_x86_sse3_mwait : GCCBuiltin<"__builtin_ia32_mwait">,
 535               Intrinsic<[llvm_void_ty, llvm_i32_ty,
 536                          llvm_i32_ty], [IntrWriteMem]>;
 537 }
 538
 539 //===----------------------------------------------------------------------===//
 540 // MMX
 541
 542 // Empty MMX state op.
 543 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 544   def int_x86_mmx_emms : GCCBuiltin<"__builtin_ia32_emms">,
 545               Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
 546 }
 547
 548 // Integer arithmetic ops.
 549 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 550   // Addition
 551   def int_x86_mmx_padds_b : GCCBuiltin<"__builtin_ia32_paddsb">,
 552               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 553                          llvm_v8i8_ty], [IntrNoMem]>;
 554   def int_x86_mmx_padds_w : GCCBuiltin<"__builtin_ia32_paddsw">,
 555               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 556                          llvm_v4i16_ty], [IntrNoMem]>;
 557
 558   def int_x86_mmx_paddus_b : GCCBuiltin<"__builtin_ia32_paddusb">,
 559               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 560                          llvm_v8i8_ty], [IntrNoMem]>;
 561   def int_x86_mmx_paddus_w : GCCBuiltin<"__builtin_ia32_paddusw">,
 562               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 563                          llvm_v4i16_ty], [IntrNoMem]>;
 564
 565   // Subtraction
 566   def int_x86_mmx_psubs_b : GCCBuiltin<"__builtin_ia32_psubsb">,
 567               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 568                          llvm_v8i8_ty], [IntrNoMem]>;
 569   def int_x86_mmx_psubs_w : GCCBuiltin<"__builtin_ia32_psubsw">,
 570               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 571                          llvm_v4i16_ty], [IntrNoMem]>;
 572
 573   def int_x86_mmx_psubus_b : GCCBuiltin<"__builtin_ia32_psubusb">,
 574               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 575                          llvm_v8i8_ty], [IntrNoMem]>;
 576   def int_x86_mmx_psubus_w : GCCBuiltin<"__builtin_ia32_psubusw">,
 577               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 578                          llvm_v4i16_ty], [IntrNoMem]>;
 579
 580   // Multiplication
 581   def int_x86_mmx_pmulh_w : GCCBuiltin<"__builtin_ia32_pmulhw">,
 582               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 583                          llvm_v4i16_ty], [IntrNoMem]>;
 584   def int_x86_mmx_pmadd_wd : GCCBuiltin<"__builtin_ia32_pmaddwd">,
 585               Intrinsic<[llvm_v2i32_ty, llvm_v4i16_ty,
 586                          llvm_v4i16_ty], [IntrNoMem]>;
 587 }
 588
 589 // Integer shift ops.
 590 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
 591   // Shift left logical
 592   def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">,
 593               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 594                          llvm_v2i32_ty], [IntrNoMem]>;
 595   def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">,
 596               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 597                          llvm_v2i32_ty], [IntrNoMem]>;
 598   def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">,
 599               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 600                          llvm_v2i32_ty], [IntrNoMem]>;
 601
 602   def int_x86_mmx_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw">,
 603               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 604                          llvm_v2i32_ty], [IntrNoMem]>;
 605   def int_x86_mmx_psrl_d : GCCBuiltin<"__builtin_ia32_psrld">,
 606               Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
 607                          llvm_v2i32_ty], [IntrNoMem]>;
 608   def int_x86_mmx_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq">,
 609               Intrinsic<[llvm_v2i32_ty,   llvm_v2i32_ty,
 610                          llvm_v2i32_ty], [IntrNoMem]>;
 611
 612   def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">,
 613               Intrinsic<[llvm_v8i8_ty, llvm_v8i8_ty,
 614                          llvm_v2i32_ty], [IntrNoMem]>;
 615   def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
 616               Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
 617                          llvm_v2i32_ty], [IntrNoMem]>;
 618 }