include/llvm/IR/IntrinsicsAArch64.td

   1 //===- IntrinsicsAArch64.td - Defines AArch64 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the AArch64-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 //===----------------------------------------------------------------------===//
  15 // Advanced SIMD (NEON)
  16
  17 let TargetPrefix = "aarch64" in {  // All intrinsics start with "llvm.aarch64.".
  18
  19 // Vector Absolute Compare (Floating Point)
  20 def int_aarch64_neon_vacgeq :
  21   Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
  22 def int_aarch64_neon_vacgtq :
  23   Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
  24
  25 // Vector saturating accumulate
  26 def int_aarch64_neon_suqadd : Neon_2Arg_Intrinsic;
  27 def int_aarch64_neon_usqadd : Neon_2Arg_Intrinsic;
  28
  29 // Vector Bitwise reverse
  30 def int_aarch64_neon_rbit : Neon_1Arg_Intrinsic;
  31
  32 // Vector extract and narrow
  33 def int_aarch64_neon_xtn :
  34   Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
  35
  36 // Vector floating-point convert
  37 def int_aarch64_neon_frintn : Neon_1Arg_Intrinsic;
  38 def int_aarch64_neon_fsqrt : Neon_1Arg_Intrinsic;
  39 def int_aarch64_neon_fcvtxn :
  40   Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
  41 def int_aarch64_neon_fcvtns :
  42   Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
  43 def int_aarch64_neon_fcvtnu :
  44   Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
  45 def int_aarch64_neon_fcvtps :
  46   Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
  47 def int_aarch64_neon_fcvtpu :
  48   Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
  49 def int_aarch64_neon_fcvtms :
  50   Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
  51 def int_aarch64_neon_fcvtmu :
  52   Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
  53 def int_aarch64_neon_fcvtas :
  54   Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
  55 def int_aarch64_neon_fcvtau :
  56   Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
  57
  58 // Vector maxNum (Floating Point)
  59 def int_aarch64_neon_vmaxnm : Neon_2Arg_Intrinsic;
  60
  61 // Vector minNum (Floating Point)
  62 def int_aarch64_neon_vminnm : Neon_2Arg_Intrinsic;
  63
  64 // Vector Pairwise maxNum (Floating Point)
  65 def int_aarch64_neon_vpmaxnm : Neon_2Arg_Intrinsic;
  66
  67 // Vector Pairwise minNum (Floating Point)
  68 def int_aarch64_neon_vpminnm : Neon_2Arg_Intrinsic;
  69
  70 // Vector Multiply Extended and Scalar Multiply Extended (Floating Point)
  71 def int_aarch64_neon_vmulx  :
  72   Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, LLVMMatchType<0>]>;
  73
  74 class Neon_N2V_Intrinsic
  75   : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, llvm_i32_ty],
  76               [IntrNoMem]>;
  77 class Neon_N3V_Intrinsic
  78   : Intrinsic<[llvm_anyvector_ty],
  79               [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty],
  80               [IntrNoMem]>;
  81 class Neon_N2V_Narrow_Intrinsic
  82   : Intrinsic<[llvm_anyvector_ty],
  83               [LLVMExtendedElementVectorType<0>, llvm_i32_ty],
  84               [IntrNoMem]>;
  85
  86 // Vector rounding shift right by immediate (Signed)
  87 def int_aarch64_neon_vsrshr : Neon_N2V_Intrinsic;
  88 def int_aarch64_neon_vurshr : Neon_N2V_Intrinsic;
  89 def int_aarch64_neon_vsqshlu : Neon_N2V_Intrinsic;
  90
  91 def int_aarch64_neon_vsri : Neon_N3V_Intrinsic;
  92 def int_aarch64_neon_vsli : Neon_N3V_Intrinsic;
  93
  94 def int_aarch64_neon_vsqshrun : Neon_N2V_Narrow_Intrinsic;
  95 def int_aarch64_neon_vrshrn : Neon_N2V_Narrow_Intrinsic;
  96 def int_aarch64_neon_vsqrshrun : Neon_N2V_Narrow_Intrinsic;
  97 def int_aarch64_neon_vsqshrn : Neon_N2V_Narrow_Intrinsic;
  98 def int_aarch64_neon_vuqshrn : Neon_N2V_Narrow_Intrinsic;
  99 def int_aarch64_neon_vsqrshrn : Neon_N2V_Narrow_Intrinsic;
 100 def int_aarch64_neon_vuqrshrn : Neon_N2V_Narrow_Intrinsic;
 101
 102 // Vector across
 103 class Neon_Across_Intrinsic
 104   : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
 105
 106 class Neon_2Arg_Across_Float_Intrinsic
 107   : Intrinsic<[llvm_anyvector_ty], [llvm_v4f32_ty], [IntrNoMem]>;
 108
 109 def int_aarch64_neon_saddlv : Neon_Across_Intrinsic;
 110 def int_aarch64_neon_uaddlv : Neon_Across_Intrinsic;
 111 def int_aarch64_neon_smaxv  : Neon_Across_Intrinsic;
 112 def int_aarch64_neon_umaxv  : Neon_Across_Intrinsic;
 113 def int_aarch64_neon_sminv  : Neon_Across_Intrinsic;
 114 def int_aarch64_neon_uminv  : Neon_Across_Intrinsic;
 115 def int_aarch64_neon_vaddv  : Neon_Across_Intrinsic;
 116 def int_aarch64_neon_vmaxv  : Neon_Across_Intrinsic;
 117 def int_aarch64_neon_vminv  : Neon_Across_Intrinsic;
 118 def int_aarch64_neon_vmaxnmv : Neon_Across_Intrinsic;
 119 def int_aarch64_neon_vminnmv : Neon_Across_Intrinsic;
 120
 121 // Vector Table Lookup.
 122 def int_aarch64_neon_vtbl1 :
 123   Intrinsic<[llvm_anyvector_ty],
 124             [llvm_anyvector_ty, LLVMMatchType<0>], [IntrNoMem]>;
 125
 126 def int_aarch64_neon_vtbl2 :
 127   Intrinsic<[llvm_anyvector_ty],
 128             [llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<0>],
 129             [IntrNoMem]>;
 130
 131 def int_aarch64_neon_vtbl3 :
 132   Intrinsic<[llvm_anyvector_ty],
 133             [llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
 134             LLVMMatchType<0>], [IntrNoMem]>;
 135
 136 def int_aarch64_neon_vtbl4 :
 137   Intrinsic<[llvm_anyvector_ty],
 138             [llvm_anyvector_ty, LLVMMatchType<1>, LLVMMatchType<1>,
 139             LLVMMatchType<1>, LLVMMatchType<0>], [IntrNoMem]>;
 140
 141 // Vector Table Extension.
 142 // Some elements of the destination vector may not be updated, so the original
 143 // value of that vector is passed as the first argument.  The next 1-4
 144 // arguments after that are the table.
 145 def int_aarch64_neon_vtbx1 :
 146   Intrinsic<[llvm_anyvector_ty],
 147             [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<0>],
 148             [IntrNoMem]>;
 149
 150 def int_aarch64_neon_vtbx2 :
 151   Intrinsic<[llvm_anyvector_ty],
 152             [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<1>,
 153             LLVMMatchType<0>], [IntrNoMem]>;
 154
 155 def int_aarch64_neon_vtbx3 :
 156   Intrinsic<[llvm_anyvector_ty],
 157             [LLVMMatchType<0>, llvm_anyvector_ty, LLVMMatchType<1>,
 158             LLVMMatchType<1>, LLVMMatchType<0>], [IntrNoMem]>;
 159
 160 def int_aarch64_neon_vtbx4 :
 161   Intrinsic<[llvm_anyvector_ty],
 162             [LLVMMatchType<0>, llvm_anyvector_ty,  LLVMMatchType<1>,
 163             LLVMMatchType<1>,  LLVMMatchType<1>, LLVMMatchType<0>],
 164             [IntrNoMem]>;
 165
 166 // Vector Load/store
 167 def int_aarch64_neon_vld1x2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
 168                                         [llvm_ptr_ty, llvm_i32_ty],
 169                                         [IntrReadArgMem]>;
 170 def int_aarch64_neon_vld1x3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
 171                                          LLVMMatchType<0>],
 172                                         [llvm_ptr_ty, llvm_i32_ty],
 173                                         [IntrReadArgMem]>;
 174 def int_aarch64_neon_vld1x4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
 175                                          LLVMMatchType<0>, LLVMMatchType<0>],
 176                                         [llvm_ptr_ty, llvm_i32_ty],
 177                                         [IntrReadArgMem]>;
 178
 179 def int_aarch64_neon_vst1x2 : Intrinsic<[],
 180                                         [llvm_ptr_ty, llvm_anyvector_ty,
 181                                          LLVMMatchType<0>, llvm_i32_ty],
 182                                         [IntrReadWriteArgMem]>;
 183 def int_aarch64_neon_vst1x3 : Intrinsic<[],
 184                                         [llvm_ptr_ty, llvm_anyvector_ty,
 185                                          LLVMMatchType<0>, LLVMMatchType<0>,
 186                                          llvm_i32_ty], [IntrReadWriteArgMem]>;
 187 def int_aarch64_neon_vst1x4 : Intrinsic<[],
 188                                         [llvm_ptr_ty, llvm_anyvector_ty,
 189                                          LLVMMatchType<0>, LLVMMatchType<0>,
 190                                          LLVMMatchType<0>, llvm_i32_ty],
 191                                         [IntrReadWriteArgMem]>;
 192
 193 // Scalar Add
 194 def int_aarch64_neon_vaddds :
 195   Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
 196 def int_aarch64_neon_vadddu :
 197   Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
 198
 199
 200 // Scalar Sub
 201 def int_aarch64_neon_vsubds :
 202   Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
 203 def int_aarch64_neon_vsubdu :
 204   Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
 205
 206
 207 // Scalar Shift
 208 // Scalar Shift Left
 209 def int_aarch64_neon_vshlds :
 210   Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
 211 def int_aarch64_neon_vshldu :
 212   Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
 213
 214 // Scalar Saturating Shift Left
 215 def int_aarch64_neon_vqshls : Neon_2Arg_Intrinsic;
 216 def int_aarch64_neon_vqshlu : Neon_2Arg_Intrinsic;
 217
 218 // Scalar Shift Rouding Left
 219 def int_aarch64_neon_vrshlds :
 220   Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
 221 def int_aarch64_neon_vrshldu :
 222   Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
 223
 224 // Scalar Saturating Rounding Shift Left
 225 def int_aarch64_neon_vqrshls : Neon_2Arg_Intrinsic;
 226 def int_aarch64_neon_vqrshlu : Neon_2Arg_Intrinsic;
 227
 228 // Scalar Reduce Pairwise Add.
 229 def int_aarch64_neon_vpadd :
 230   Intrinsic<[llvm_v1i64_ty], [llvm_v2i64_ty],[IntrNoMem]>;
 231 def int_aarch64_neon_vpfadd :
 232   Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
 233 def int_aarch64_neon_vpfaddq :
 234   Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
 235
 236 // Scalar Reduce Pairwise Floating Point Max/Min.
 237 def int_aarch64_neon_vpmax :
 238   Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
 239 def int_aarch64_neon_vpmaxq :
 240   Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
 241 def int_aarch64_neon_vpmin :
 242   Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
 243 def int_aarch64_neon_vpminq :
 244   Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
 245
 246 // Scalar Reduce Pairwise Floating Point Maxnm/Minnm.
 247 def int_aarch64_neon_vpfmaxnm :
 248   Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
 249 def int_aarch64_neon_vpfmaxnmq :
 250   Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
 251 def int_aarch64_neon_vpfminnm :
 252   Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
 253 def int_aarch64_neon_vpfminnmq :
 254   Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
 255
 256 // Scalar Signed Integer Convert To Floating-point
 257 def int_aarch64_neon_vcvtf32_s32 :
 258   Intrinsic<[llvm_float_ty], [llvm_v1i32_ty], [IntrNoMem]>;
 259 def int_aarch64_neon_vcvtf64_s64 :
 260   Intrinsic<[llvm_double_ty], [llvm_v1i64_ty], [IntrNoMem]>;
 261
 262 // Scalar Unsigned Integer Convert To Floating-point
 263 def int_aarch64_neon_vcvtf32_u32 :
 264   Intrinsic<[llvm_float_ty], [llvm_v1i32_ty], [IntrNoMem]>;
 265 def int_aarch64_neon_vcvtf64_u64 :
 266   Intrinsic<[llvm_double_ty], [llvm_v1i64_ty], [IntrNoMem]>;
 267
 268 // Scalar Floating-point Reciprocal Exponent
 269 def int_aarch64_neon_vrecpx : Neon_1Arg_Intrinsic;
 270
 271 class Neon_Cmp_Intrinsic
 272   : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty, llvm_anyvector_ty],
 273               [IntrNoMem]>;
 274
 275 // Scalar Compare Equal
 276 def int_aarch64_neon_vceq : Neon_Cmp_Intrinsic;
 277
 278 // Scalar Compare Greater-Than or Equal
 279 def int_aarch64_neon_vcge : Neon_Cmp_Intrinsic;
 280 def int_aarch64_neon_vchs : Neon_Cmp_Intrinsic;
 281
 282 // Scalar Compare Less-Than or Equal
 283 def int_aarch64_neon_vclez : Neon_Cmp_Intrinsic;
 284
 285 // Scalar Compare Less-Than
 286 def int_aarch64_neon_vcltz : Neon_Cmp_Intrinsic;
 287
 288 // Scalar Compare Greater-Than
 289 def int_aarch64_neon_vcgt : Neon_Cmp_Intrinsic;
 290 def int_aarch64_neon_vchi : Neon_Cmp_Intrinsic;
 291
 292 // Scalar Compare Bitwise Test Bits
 293 def int_aarch64_neon_vtstd : Neon_Cmp_Intrinsic;
 294
 295 // Scalar Floating-point Absolute Compare Greater Than Or Equal
 296 def int_aarch64_neon_vcage : Neon_Cmp_Intrinsic;
 297
 298 // Scalar Floating-point Absolute Compare Greater Than
 299 def int_aarch64_neon_vcagt : Neon_Cmp_Intrinsic;
 300
 301 // Scalar Signed Saturating Accumulated of Unsigned Value
 302 def int_aarch64_neon_vuqadd : Neon_2Arg_Intrinsic;
 303
 304 // Scalar Unsigned Saturating Accumulated of Signed Value
 305 def int_aarch64_neon_vsqadd : Neon_2Arg_Intrinsic;
 306
 307 // Scalar Absolute Value
 308 def int_aarch64_neon_vabs :
 309   Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
 310
 311 // Scalar Negate Value
 312 def int_aarch64_neon_vneg :
 313   Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
 314
 315 // Signed Saturating Doubling Multiply-Add Long
 316 def int_aarch64_neon_vqdmlal : Neon_3Arg_Long_Intrinsic;
 317
 318 // Signed Saturating Doubling Multiply-Subtract Long
 319 def int_aarch64_neon_vqdmlsl : Neon_3Arg_Long_Intrinsic;
 320
 321 class Neon_2Arg_ShiftImm_Intrinsic
 322   : Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>;
 323
 324 class Neon_3Arg_ShiftImm_Intrinsic
 325   : Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty, llvm_i32_ty],
 326               [IntrNoMem]>;
 327
 328 // Scalar Shift Right (Immediate)
 329 def int_aarch64_neon_vshrds_n : Neon_2Arg_ShiftImm_Intrinsic;
 330 def int_aarch64_neon_vshrdu_n : Neon_2Arg_ShiftImm_Intrinsic;
 331
 332 // Scalar Shift Right and Accumulate (Immediate)
 333 def int_aarch64_neon_vsrads_n : Neon_3Arg_ShiftImm_Intrinsic;
 334 def int_aarch64_neon_vsradu_n : Neon_3Arg_ShiftImm_Intrinsic;
 335
 336 // Scalar Rounding Shift Right and Accumulate (Immediate)
 337 def int_aarch64_neon_vrsrads_n : Neon_3Arg_ShiftImm_Intrinsic;
 338 def int_aarch64_neon_vrsradu_n : Neon_3Arg_ShiftImm_Intrinsic;
 339
 340 // Scalar Shift Left (Immediate)
 341 def int_aarch64_neon_vshld_n : Neon_2Arg_ShiftImm_Intrinsic;
 342
 343 // Scalar Saturating Shift Left (Immediate)
 344 def int_aarch64_neon_vqshls_n : Neon_N2V_Intrinsic;
 345 def int_aarch64_neon_vqshlu_n : Neon_N2V_Intrinsic;
 346
 347 // Scalar Signed Saturating Shift Left Unsigned (Immediate)
 348 def int_aarch64_neon_vqshlus_n : Neon_N2V_Intrinsic;
 349
 350 // Scalar Signed Fixed-point Convert To Floating-Point (Immediate)
 351 def int_aarch64_neon_vcvtf32_n_s32 :
 352   Intrinsic<[llvm_float_ty], [llvm_v1i32_ty, llvm_i32_ty], [IntrNoMem]>;
 353 def int_aarch64_neon_vcvtf64_n_s64 :
 354   Intrinsic<[llvm_double_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>;
 355
 356 // Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate)
 357 def int_aarch64_neon_vcvtf32_n_u32 :
 358   Intrinsic<[llvm_float_ty], [llvm_v1i32_ty, llvm_i32_ty], [IntrNoMem]>;
 359 def int_aarch64_neon_vcvtf64_n_u64 :
 360   Intrinsic<[llvm_double_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>;
 361
 362 // Scalar Floating-point Convert To Signed Fixed-point (Immediate)
 363 def int_aarch64_neon_vcvts_n_s32_f32 :
 364   Intrinsic<[llvm_v1i32_ty], [llvm_v1f32_ty, llvm_i32_ty], [IntrNoMem]>;
 365 def int_aarch64_neon_vcvtd_n_s64_f64 :
 366   Intrinsic<[llvm_v1i64_ty], [llvm_v1f64_ty, llvm_i32_ty], [IntrNoMem]>;
 367
 368 // Scalar Floating-point Convert To Unsigned Fixed-point (Immediate)
 369 def int_aarch64_neon_vcvts_n_u32_f32 :
 370   Intrinsic<[llvm_v1i32_ty], [llvm_v1f32_ty, llvm_i32_ty], [IntrNoMem]>;
 371 def int_aarch64_neon_vcvtd_n_u64_f64 :
 372   Intrinsic<[llvm_v1i64_ty], [llvm_v1f64_ty, llvm_i32_ty], [IntrNoMem]>;
 373
 374 class Neon_SHA_Intrinsic
 375   : Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v1i32_ty, llvm_v4i32_ty],
 376               [IntrNoMem]>;
 377
 378 def int_aarch64_neon_sha1c : Neon_SHA_Intrinsic;
 379 def int_aarch64_neon_sha1m : Neon_SHA_Intrinsic;
 380 def int_aarch64_neon_sha1p : Neon_SHA_Intrinsic;
 381 }