include/llvm/IR/IntrinsicsAArch64.td

   1 //===- IntrinsicsAArch64.td - Defines AArch64 intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the AArch64-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 //===----------------------------------------------------------------------===//
  15 // Advanced SIMD (NEON)
  16
  17 let TargetPrefix = "aarch64" in {  // All intrinsics start with "llvm.aarch64.".
  18
  19 // Vector Absolute Compare (Floating Point)
  20 def int_aarch64_neon_vacgeq : Intrinsic<[llvm_v2i64_ty],
  21                                     [llvm_v2f64_ty, llvm_v2f64_ty],
  22                                     [IntrNoMem]>;
  23 def int_aarch64_neon_vacgtq : Intrinsic<[llvm_v2i64_ty],
  24                                     [llvm_v2f64_ty, llvm_v2f64_ty],
  25                                     [IntrNoMem]>;
  26
  27 // Vector maxNum (Floating Point)
  28 def int_aarch64_neon_vmaxnm : Neon_2Arg_Intrinsic;
  29
  30 // Vector minNum (Floating Point)
  31 def int_aarch64_neon_vminnm : Neon_2Arg_Intrinsic;
  32
  33 // Vector Pairwise maxNum (Floating Point)
  34 def int_aarch64_neon_vpmaxnm : Neon_2Arg_Intrinsic;
  35
  36 // Vector Pairwise minNum (Floating Point)
  37 def int_aarch64_neon_vpminnm : Neon_2Arg_Intrinsic;
  38
  39 // Vector Multiply Extended (Floating Point)
  40 def int_aarch64_neon_vmulx : Neon_2Arg_Intrinsic;
  41
  42 class Neon_N2V_Intrinsic
  43   : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, llvm_i32_ty],
  44               [IntrNoMem]>;
  45 class Neon_N3V_Intrinsic
  46   : Intrinsic<[llvm_anyvector_ty],
  47               [LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty],
  48               [IntrNoMem]>;
  49 class Neon_N2V_Narrow_Intrinsic
  50   : Intrinsic<[llvm_anyvector_ty],
  51               [LLVMExtendedElementVectorType<0>, llvm_i32_ty],
  52               [IntrNoMem]>;
  53
  54 // Vector rounding shift right by immediate (Signed)
  55 def int_aarch64_neon_vsrshr : Neon_N2V_Intrinsic;
  56 def int_aarch64_neon_vurshr : Neon_N2V_Intrinsic;
  57 def int_aarch64_neon_vsqshlu : Neon_N2V_Intrinsic;
  58
  59 def int_aarch64_neon_vsri : Neon_N3V_Intrinsic;
  60 def int_aarch64_neon_vsli : Neon_N3V_Intrinsic;
  61
  62 def int_aarch64_neon_vsqshrun : Neon_N2V_Narrow_Intrinsic;
  63 def int_aarch64_neon_vrshrn : Neon_N2V_Narrow_Intrinsic;
  64 def int_aarch64_neon_vsqrshrun : Neon_N2V_Narrow_Intrinsic;
  65 def int_aarch64_neon_vsqshrn : Neon_N2V_Narrow_Intrinsic;
  66 def int_aarch64_neon_vuqshrn : Neon_N2V_Narrow_Intrinsic;
  67 def int_aarch64_neon_vsqrshrn : Neon_N2V_Narrow_Intrinsic;
  68 def int_aarch64_neon_vuqrshrn : Neon_N2V_Narrow_Intrinsic;
  69 }