1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
18 #include "llvm/Pass.h"
19 #include "llvm/Target/TargetMachine.h"
25 class MachineFunctionPass;
28 class TargetRegisterClass;
34 /// Target-Independent Code Generator Pass Configuration Options.
36 /// This is an ImmutablePass solely for the purpose of exposing CodeGen options
37 /// to the internals of other CodeGen passes.
38 class TargetPassConfig : public ImmutablePass {
42 bool Initialized; // Flagged after all passes are configured.
44 // Target Pass Options
49 TargetPassConfig(TargetMachine *tm, PassManagerBase &pm);
53 virtual ~TargetPassConfig();
57 /// Get the right type of TargetMachine for this target.
58 template<typename TMC> TMC &getTM() const {
59 return *static_cast<TMC*>(TM);
62 const TargetLowering *getTargetLowering() const {
63 return TM->getTargetLowering();
66 void setInitialized() { Initialized = true; }
68 CodeGenOpt::Level getOptLevel() const { return TM->getOptLevel(); }
70 void setDisableVerify(bool disable) { DisableVerify = disable; }
72 /// Add common target configurable passes that perform LLVM IR to IR
73 /// transforms following machine independent optimization.
74 virtual void addIRPasses();
76 /// Add common passes that perform LLVM IR to IR transforms in preparation for
77 /// instruction selection.
78 virtual void addISelPrepare();
80 /// addInstSelector - This method should install an instruction selector pass,
81 /// which converts from LLVM code to machine instructions.
82 virtual bool addInstSelector() {
86 /// Add the complete, standard set of LLVM CodeGen passes.
87 /// Fully developed targets will not generally override this.
88 virtual void addMachinePasses();
90 // Helper to verify the analysis is really immutable.
91 void setOpt(bool &Opt, bool Val);
93 /// Methods with trivial inline returns are convenient points in the common
94 /// codegen pass pipeline where targets may insert passes. Methods with
95 /// out-of-line standard implementations are major CodeGen stages called by
96 /// addMachinePasses. Some targets may override major stages when inserting
97 /// passes is insufficient, but maintaining overriden stages is more work.
100 /// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
101 /// passes (which are run just before instruction selector).
102 virtual bool addPreISel() {
106 /// addPreRegAlloc - This method may be implemented by targets that want to
107 /// run passes immediately before register allocation. This should return
108 /// true if -print-machineinstrs should print after these passes.
109 virtual bool addPreRegAlloc() {
113 /// addPostRegAlloc - This method may be implemented by targets that want
114 /// to run passes after register allocation but before prolog-epilog
115 /// insertion. This should return true if -print-machineinstrs should print
116 /// after these passes.
117 virtual bool addPostRegAlloc() {
121 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
122 /// on this target. User flag overrides.
123 virtual bool getEnableTailMergeDefault() const { return true; }
125 /// addPreSched2 - This method may be implemented by targets that want to
126 /// run passes after prolog-epilog insertion and before the second instruction
127 /// scheduling pass. This should return true if -print-machineinstrs should
128 /// print after these passes.
129 virtual bool addPreSched2() {
133 /// addPreEmitPass - This pass may be implemented by targets that want to run
134 /// passes immediately before machine code is emitted. This should return
135 /// true if -print-machineinstrs should print out the code after the passes.
136 virtual bool addPreEmitPass() {
140 /// Utilities for targets to add passes to the pass manager.
143 /// Add a target-independent CodeGen pass at this point in the pipeline.
144 void addPass(char &ID);
146 /// printNoVerify - Add a pass to dump the machine function, if debugging is
149 void printNoVerify(const char *Banner) const;
151 /// printAndVerify - Add a pass to dump then verify the machine function, if
152 /// those steps are enabled.
154 void printAndVerify(const char *Banner) const;
158 /// List of target independent CodeGen pass IDs.
160 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
161 /// work well with unreachable basic blocks (what live ranges make sense for a
162 /// block that cannot be reached?). As such, a code generator should either
163 /// not instruction select unreachable blocks, or run this pass as its
164 /// last LLVM modifying pass to clean up blocks that are not reachable from
166 FunctionPass *createUnreachableBlockEliminationPass();
168 /// MachineFunctionPrinter pass - This pass prints out the machine function to
169 /// the given stream as a debugging tool.
170 MachineFunctionPass *
171 createMachineFunctionPrinterPass(raw_ostream &OS,
172 const std::string &Banner ="");
174 /// MachineLoopInfo pass - This pass is a loop analysis pass.
176 extern char &MachineLoopInfoID;
178 /// MachineLoopRanges pass - This pass is an on-demand loop coverage
181 extern char &MachineLoopRangesID;
183 /// MachineDominators pass - This pass is a machine dominators analysis pass.
185 extern char &MachineDominatorsID;
187 /// EdgeBundles analysis - Bundle machine CFG edges.
189 extern char &EdgeBundlesID;
191 /// PHIElimination pass - This pass eliminates machine instruction PHI nodes
192 /// by inserting copy instructions. This destroys SSA information, but is the
193 /// desired input for some register allocators. This pass is "required" by
194 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
196 extern char &PHIEliminationID;
198 /// StrongPHIElimination pass - This pass eliminates machine instruction PHI
199 /// nodes by inserting copy instructions. This destroys SSA information, but
200 /// is the desired input for some register allocators. This pass is
201 /// "required" by these register allocator like this:
202 /// AU.addRequiredID(PHIEliminationID);
203 /// This pass is still in development
204 extern char &StrongPHIEliminationID;
206 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
207 extern char &LiveStacksID;
209 /// TwoAddressInstruction pass - This pass reduces two-address instructions to
210 /// use two operands. This destroys SSA information but it is desired by
211 /// register allocators.
212 extern char &TwoAddressInstructionPassID;
214 /// RegisteCoalescer pass - This pass merges live ranges to eliminate copies.
215 extern char &RegisterCoalescerPassID;
217 /// MachineScheduler pass - This pass schedules machine instructions.
218 extern char &MachineSchedulerID;
220 /// SpillPlacement analysis. Suggest optimal placement of spill code between
223 extern char &SpillPlacementID;
225 /// UnreachableMachineBlockElimination pass - This pass removes unreachable
226 /// machine basic blocks.
227 extern char &UnreachableMachineBlockElimID;
229 /// DeadMachineInstructionElim pass - This pass removes dead machine
232 FunctionPass *createDeadMachineInstructionElimPass();
234 /// Creates a register allocator as the user specified on the command line, or
235 /// picks one that matches OptLevel.
237 FunctionPass *createRegisterAllocator(CodeGenOpt::Level OptLevel);
239 /// FastRegisterAllocation Pass - This pass register allocates as fast as
240 /// possible. It is best suited for debug code where live ranges are short.
242 FunctionPass *createFastRegisterAllocator();
244 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
245 /// register allocator using the basic regalloc framework.
247 FunctionPass *createBasicRegisterAllocator();
249 /// Greedy register allocation pass - This pass implements a global register
250 /// allocator for optimized builds.
252 FunctionPass *createGreedyRegisterAllocator();
254 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
255 /// Quadratic Prograaming (PBQP) based register allocator.
257 FunctionPass *createDefaultPBQPRegisterAllocator();
259 /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
260 /// and eliminates abstract frame references.
262 FunctionPass *createPrologEpilogCodeInserter();
264 /// ExpandPostRAPseudos Pass - This pass expands pseudo instructions after
265 /// register allocation.
267 FunctionPass *createExpandPostRAPseudosPass();
269 /// createPostRAScheduler - This pass performs post register allocation
271 FunctionPass *createPostRAScheduler(CodeGenOpt::Level OptLevel);
273 /// BranchFolding Pass - This pass performs machine code CFG based
274 /// optimizations to delete branches to branches, eliminate branches to
275 /// successor blocks (creating fall throughs), and eliminating branches over
277 FunctionPass *createBranchFoldingPass(bool DefaultEnableTailMerge);
279 /// TailDuplicate Pass - Duplicate blocks with unconditional branches
280 /// into tails of their predecessors.
281 FunctionPass *createTailDuplicatePass();
283 /// IfConverter Pass - This pass performs machine code if conversion.
284 FunctionPass *createIfConverterPass();
286 /// MachineBlockPlacement Pass - This pass places basic blocks based on branch
288 FunctionPass *createMachineBlockPlacementPass();
290 /// MachineBlockPlacementStats Pass - This pass collects statistics about the
291 /// basic block placement using branch probabilities and block frequency
293 FunctionPass *createMachineBlockPlacementStatsPass();
295 /// Code Placement Pass - This pass optimize code placement and aligns loop
296 /// headers to target specific alignment boundary.
297 FunctionPass *createCodePlacementOptPass();
299 /// IntrinsicLowering Pass - Performs target-independent LLVM IR
300 /// transformations for highly portable strategies.
301 FunctionPass *createGCLoweringPass();
303 /// MachineCodeAnalysis Pass - Target-independent pass to mark safe points in
304 /// machine code. Must be added very late during code generation, just prior
305 /// to output, and importantly after all CFG transformations (such as branch
307 FunctionPass *createGCMachineCodeAnalysisPass();
309 /// Deleter Pass - Releases GC metadata.
311 FunctionPass *createGCInfoDeleter();
313 /// Creates a pass to print GC metadata.
315 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
317 /// createMachineCSEPass - This pass performs global CSE on machine
319 FunctionPass *createMachineCSEPass();
321 /// createMachineLICMPass - This pass performs LICM on machine instructions.
323 FunctionPass *createMachineLICMPass(bool PreRegAlloc = true);
325 /// createMachineSinkingPass - This pass performs sinking on machine
327 FunctionPass *createMachineSinkingPass();
329 /// createMachineCopyPropagationPass - This pass performs copy propagation on
330 /// machine instructions.
331 FunctionPass *createMachineCopyPropagationPass();
333 /// createPeepholeOptimizerPass - This pass performs peephole optimizations -
334 /// like extension and comparison eliminations.
335 FunctionPass *createPeepholeOptimizerPass();
337 /// createOptimizePHIsPass - This pass optimizes machine instruction PHIs
338 /// to take advantage of opportunities created during DAG legalization.
339 FunctionPass *createOptimizePHIsPass();
341 /// createStackSlotColoringPass - This pass performs stack slot coloring.
342 FunctionPass *createStackSlotColoringPass(bool);
344 /// createStackProtectorPass - This pass adds stack protectors to functions.
345 FunctionPass *createStackProtectorPass(const TargetLowering *tli);
347 /// createMachineVerifierPass - This pass verifies cenerated machine code
348 /// instructions for correctness.
349 FunctionPass *createMachineVerifierPass(const char *Banner = 0);
351 /// createDwarfEHPass - This pass mulches exception handling code into a form
352 /// adapted to code generation. Required if using dwarf exception handling.
353 FunctionPass *createDwarfEHPass(const TargetMachine *tm);
355 /// createSjLjEHPass - This pass adapts exception handling code to use
356 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
357 FunctionPass *createSjLjEHPass(const TargetLowering *tli);
359 /// createLocalStackSlotAllocationPass - This pass assigns local frame
360 /// indices to stack slots relative to one another and allocates
361 /// base registers to access them when it is estimated by the target to
362 /// be out of range of normal frame pointer or stack pointer index
364 FunctionPass *createLocalStackSlotAllocationPass();
366 /// createExpandISelPseudosPass - This pass expands pseudo-instructions.
368 FunctionPass *createExpandISelPseudosPass();
370 /// createExecutionDependencyFixPass - This pass fixes execution time
371 /// problems with dependent instructions, such as switching execution
372 /// domains to match.
374 /// The pass will examine instructions using and defining registers in RC.
376 FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
378 /// createUnpackMachineBundles - This pass unpack machine instruction bundles.
380 FunctionPass *createUnpackMachineBundlesPass();
382 /// createFinalizeMachineBundles - This pass finalize machine instruction
383 /// bundles (created earlier, e.g. during pre-RA scheduling).
385 FunctionPass *createFinalizeMachineBundlesPass();
387 } // End llvm namespace