1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
18 #include "llvm/Pass.h"
19 #include "llvm/Target/TargetMachine.h"
25 class MachineFunctionPass;
28 class TargetRegisterClass;
34 /// Target-Independent Code Generator Pass Configuration Options.
36 /// This is an ImmutablePass solely for the purpose of exposing CodeGen options
37 /// to the internals of other CodeGen passes.
38 class TargetPassConfig : public ImmutablePass {
42 bool Initialized; // Flagged after all passes are configured.
44 // Target Pass Options
45 // Targets provide a default setting, user flags override.
49 /// Default setting for -enable-tail-merge on this target.
53 TargetPassConfig(TargetMachine *tm, PassManagerBase &pm);
57 virtual ~TargetPassConfig();
61 /// Get the right type of TargetMachine for this target.
62 template<typename TMC> TMC &getTM() const {
63 return *static_cast<TMC*>(TM);
66 const TargetLowering *getTargetLowering() const {
67 return TM->getTargetLowering();
70 void setInitialized() { Initialized = true; }
72 CodeGenOpt::Level getOptLevel() const { return TM->getOptLevel(); }
74 void setDisableVerify(bool Disable) { setOpt(DisableVerify, Disable); }
76 bool getEnableTailMerge() const { return EnableTailMerge; }
77 void setEnableTailMerge(bool Enable) { setOpt(EnableTailMerge, Enable); }
79 /// Add common target configurable passes that perform LLVM IR to IR
80 /// transforms following machine independent optimization.
81 virtual void addIRPasses();
83 /// Add common passes that perform LLVM IR to IR transforms in preparation for
84 /// instruction selection.
85 virtual void addISelPrepare();
87 /// addInstSelector - This method should install an instruction selector pass,
88 /// which converts from LLVM code to machine instructions.
89 virtual bool addInstSelector() {
93 /// Add the complete, standard set of LLVM CodeGen passes.
94 /// Fully developed targets will not generally override this.
95 virtual void addMachinePasses();
98 // Helper to verify the analysis is really immutable.
99 void setOpt(bool &Opt, bool Val);
101 /// Methods with trivial inline returns are convenient points in the common
102 /// codegen pass pipeline where targets may insert passes. Methods with
103 /// out-of-line standard implementations are major CodeGen stages called by
104 /// addMachinePasses. Some targets may override major stages when inserting
105 /// passes is insufficient, but maintaining overriden stages is more work.
108 /// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
109 /// passes (which are run just before instruction selector).
110 virtual bool addPreISel() {
114 /// addPreRegAlloc - This method may be implemented by targets that want to
115 /// run passes immediately before register allocation. This should return
116 /// true if -print-machineinstrs should print after these passes.
117 virtual bool addPreRegAlloc() {
121 /// addPostRegAlloc - This method may be implemented by targets that want
122 /// to run passes after register allocation but before prolog-epilog
123 /// insertion. This should return true if -print-machineinstrs should print
124 /// after these passes.
125 virtual bool addPostRegAlloc() {
129 /// addPreSched2 - This method may be implemented by targets that want to
130 /// run passes after prolog-epilog insertion and before the second instruction
131 /// scheduling pass. This should return true if -print-machineinstrs should
132 /// print after these passes.
133 virtual bool addPreSched2() {
137 /// addPreEmitPass - This pass may be implemented by targets that want to run
138 /// passes immediately before machine code is emitted. This should return
139 /// true if -print-machineinstrs should print out the code after the passes.
140 virtual bool addPreEmitPass() {
144 /// Utilities for targets to add passes to the pass manager.
147 /// Add a target-independent CodeGen pass at this point in the pipeline.
148 void addPass(char &ID);
150 /// printNoVerify - Add a pass to dump the machine function, if debugging is
153 void printNoVerify(const char *Banner) const;
155 /// printAndVerify - Add a pass to dump then verify the machine function, if
156 /// those steps are enabled.
158 void printAndVerify(const char *Banner) const;
162 /// List of target independent CodeGen pass IDs.
164 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
165 /// work well with unreachable basic blocks (what live ranges make sense for a
166 /// block that cannot be reached?). As such, a code generator should either
167 /// not instruction select unreachable blocks, or run this pass as its
168 /// last LLVM modifying pass to clean up blocks that are not reachable from
170 FunctionPass *createUnreachableBlockEliminationPass();
172 /// MachineFunctionPrinter pass - This pass prints out the machine function to
173 /// the given stream as a debugging tool.
174 MachineFunctionPass *
175 createMachineFunctionPrinterPass(raw_ostream &OS,
176 const std::string &Banner ="");
178 /// MachineLoopInfo pass - This pass is a loop analysis pass.
180 extern char &MachineLoopInfoID;
182 /// MachineLoopRanges pass - This pass is an on-demand loop coverage
185 extern char &MachineLoopRangesID;
187 /// MachineDominators pass - This pass is a machine dominators analysis pass.
189 extern char &MachineDominatorsID;
191 /// EdgeBundles analysis - Bundle machine CFG edges.
193 extern char &EdgeBundlesID;
195 /// PHIElimination pass - This pass eliminates machine instruction PHI nodes
196 /// by inserting copy instructions. This destroys SSA information, but is the
197 /// desired input for some register allocators. This pass is "required" by
198 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
200 extern char &PHIEliminationID;
202 /// StrongPHIElimination pass - This pass eliminates machine instruction PHI
203 /// nodes by inserting copy instructions. This destroys SSA information, but
204 /// is the desired input for some register allocators. This pass is
205 /// "required" by these register allocator like this:
206 /// AU.addRequiredID(PHIEliminationID);
207 /// This pass is still in development
208 extern char &StrongPHIEliminationID;
210 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
211 extern char &LiveStacksID;
213 /// TwoAddressInstruction pass - This pass reduces two-address instructions to
214 /// use two operands. This destroys SSA information but it is desired by
215 /// register allocators.
216 extern char &TwoAddressInstructionPassID;
218 /// RegisteCoalescer pass - This pass merges live ranges to eliminate copies.
219 extern char &RegisterCoalescerPassID;
221 /// MachineScheduler pass - This pass schedules machine instructions.
222 extern char &MachineSchedulerID;
224 /// SpillPlacement analysis. Suggest optimal placement of spill code between
227 extern char &SpillPlacementID;
229 /// UnreachableMachineBlockElimination pass - This pass removes unreachable
230 /// machine basic blocks.
231 extern char &UnreachableMachineBlockElimID;
233 /// DeadMachineInstructionElim pass - This pass removes dead machine
236 FunctionPass *createDeadMachineInstructionElimPass();
238 /// Creates a register allocator as the user specified on the command line, or
239 /// picks one that matches OptLevel.
241 FunctionPass *createRegisterAllocator(CodeGenOpt::Level OptLevel);
243 /// FastRegisterAllocation Pass - This pass register allocates as fast as
244 /// possible. It is best suited for debug code where live ranges are short.
246 FunctionPass *createFastRegisterAllocator();
248 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
249 /// register allocator using the basic regalloc framework.
251 FunctionPass *createBasicRegisterAllocator();
253 /// Greedy register allocation pass - This pass implements a global register
254 /// allocator for optimized builds.
256 FunctionPass *createGreedyRegisterAllocator();
258 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
259 /// Quadratic Prograaming (PBQP) based register allocator.
261 FunctionPass *createDefaultPBQPRegisterAllocator();
263 /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
264 /// and eliminates abstract frame references.
266 FunctionPass *createPrologEpilogCodeInserter();
268 /// ExpandPostRAPseudos Pass - This pass expands pseudo instructions after
269 /// register allocation.
271 FunctionPass *createExpandPostRAPseudosPass();
273 /// createPostRAScheduler - This pass performs post register allocation
275 FunctionPass *createPostRAScheduler();
277 /// BranchFolding Pass - This pass performs machine code CFG based
278 /// optimizations to delete branches to branches, eliminate branches to
279 /// successor blocks (creating fall throughs), and eliminating branches over
281 extern char &BranchFolderPassID;
283 /// TailDuplicate Pass - Duplicate blocks with unconditional branches
284 /// into tails of their predecessors.
285 FunctionPass *createTailDuplicatePass();
287 /// IfConverter Pass - This pass performs machine code if conversion.
288 FunctionPass *createIfConverterPass();
290 /// MachineBlockPlacement Pass - This pass places basic blocks based on branch
292 FunctionPass *createMachineBlockPlacementPass();
294 /// MachineBlockPlacementStats Pass - This pass collects statistics about the
295 /// basic block placement using branch probabilities and block frequency
297 FunctionPass *createMachineBlockPlacementStatsPass();
299 /// Code Placement Pass - This pass optimize code placement and aligns loop
300 /// headers to target specific alignment boundary.
301 FunctionPass *createCodePlacementOptPass();
303 /// IntrinsicLowering Pass - Performs target-independent LLVM IR
304 /// transformations for highly portable strategies.
305 FunctionPass *createGCLoweringPass();
307 /// MachineCodeAnalysis Pass - Target-independent pass to mark safe points in
308 /// machine code. Must be added very late during code generation, just prior
309 /// to output, and importantly after all CFG transformations (such as branch
311 FunctionPass *createGCMachineCodeAnalysisPass();
313 /// Deleter Pass - Releases GC metadata.
315 FunctionPass *createGCInfoDeleter();
317 /// Creates a pass to print GC metadata.
319 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
321 /// createMachineCSEPass - This pass performs global CSE on machine
323 FunctionPass *createMachineCSEPass();
325 /// createMachineLICMPass - This pass performs LICM on machine instructions.
327 FunctionPass *createMachineLICMPass();
329 /// createMachineSinkingPass - This pass performs sinking on machine
331 FunctionPass *createMachineSinkingPass();
333 /// createMachineCopyPropagationPass - This pass performs copy propagation on
334 /// machine instructions.
335 FunctionPass *createMachineCopyPropagationPass();
337 /// createPeepholeOptimizerPass - This pass performs peephole optimizations -
338 /// like extension and comparison eliminations.
339 FunctionPass *createPeepholeOptimizerPass();
341 /// createOptimizePHIsPass - This pass optimizes machine instruction PHIs
342 /// to take advantage of opportunities created during DAG legalization.
343 FunctionPass *createOptimizePHIsPass();
345 /// createStackSlotColoringPass - This pass performs stack slot coloring.
346 FunctionPass *createStackSlotColoringPass();
348 /// createStackProtectorPass - This pass adds stack protectors to functions.
349 FunctionPass *createStackProtectorPass(const TargetLowering *tli);
351 /// createMachineVerifierPass - This pass verifies cenerated machine code
352 /// instructions for correctness.
353 FunctionPass *createMachineVerifierPass(const char *Banner = 0);
355 /// createDwarfEHPass - This pass mulches exception handling code into a form
356 /// adapted to code generation. Required if using dwarf exception handling.
357 FunctionPass *createDwarfEHPass(const TargetMachine *tm);
359 /// createSjLjEHPass - This pass adapts exception handling code to use
360 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
361 FunctionPass *createSjLjEHPass(const TargetLowering *tli);
363 /// createLocalStackSlotAllocationPass - This pass assigns local frame
364 /// indices to stack slots relative to one another and allocates
365 /// base registers to access them when it is estimated by the target to
366 /// be out of range of normal frame pointer or stack pointer index
368 FunctionPass *createLocalStackSlotAllocationPass();
370 /// createExpandISelPseudosPass - This pass expands pseudo-instructions.
372 FunctionPass *createExpandISelPseudosPass();
374 /// createExecutionDependencyFixPass - This pass fixes execution time
375 /// problems with dependent instructions, such as switching execution
376 /// domains to match.
378 /// The pass will examine instructions using and defining registers in RC.
380 FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
382 /// createUnpackMachineBundles - This pass unpack machine instruction bundles.
384 FunctionPass *createUnpackMachineBundlesPass();
386 /// createFinalizeMachineBundles - This pass finalize machine instruction
387 /// bundles (created earlier, e.g. during pre-RA scheduling).
389 FunctionPass *createFinalizeMachineBundlesPass();
391 } // End llvm namespace