1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
18 #include "llvm/Target/TargetMachine.h"
24 class MachineFunctionPass;
27 class TargetRegisterClass;
33 /// Target-Independent Code Generator Pass Configuration Options.
35 /// FIXME: Why are we passing the DisableVerify flags around instead of setting
36 /// an options in the target machine, like all the other driver options?
37 class TargetPassConfig {
44 TargetPassConfig(TargetMachine *tm, PassManagerBase &pm,
45 bool DisableVerifyFlag)
46 : TM(tm), PM(pm), DisableVerify(DisableVerifyFlag) {}
48 virtual ~TargetPassConfig() {}
50 /// Get the right type of TargetMachine for this target.
51 template<typename TMC> TMC &getTM() const {
52 return *static_cast<TMC*>(TM);
55 CodeGenOpt::Level getOptLevel() const { return TM->getOptLevel(); }
57 const TargetLowering *getTargetLowering() const { return TM->getTargetLowering(); }
59 /// Add the complete, standard set of LLVM CodeGen passes.
60 /// Fully developed targets will not generally override this.
61 virtual bool addCodeGenPasses(MCContext *&OutContext);
64 /// Convenient points in the common codegen pass pipeline for inserting
65 /// passes, and major CodeGen stages that some targets may override.
68 /// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
69 /// passes (which are run just before instruction selector).
70 virtual bool addPreISel() {
74 /// addInstSelector - This method should install an instruction selector pass,
75 /// which converts from LLVM code to machine instructions.
76 virtual bool addInstSelector() {
80 /// addPreRegAlloc - This method may be implemented by targets that want to
81 /// run passes immediately before register allocation. This should return
82 /// true if -print-machineinstrs should print after these passes.
83 virtual bool addPreRegAlloc() {
87 /// addPostRegAlloc - This method may be implemented by targets that want
88 /// to run passes after register allocation but before prolog-epilog
89 /// insertion. This should return true if -print-machineinstrs should print
90 /// after these passes.
91 virtual bool addPostRegAlloc() {
95 /// getEnableTailMergeDefault - the default setting for -enable-tail-merge
96 /// on this target. User flag overrides.
97 virtual bool getEnableTailMergeDefault() const { return true; }
99 /// addPreSched2 - This method may be implemented by targets that want to
100 /// run passes after prolog-epilog insertion and before the second instruction
101 /// scheduling pass. This should return true if -print-machineinstrs should
102 /// print after these passes.
103 virtual bool addPreSched2() {
107 /// addPreEmitPass - This pass may be implemented by targets that want to run
108 /// passes immediately before machine code is emitted. This should return
109 /// true if -print-machineinstrs should print out the code after the passes.
110 virtual bool addPreEmitPass() {
114 /// Utilities for targets to add passes to the pass manager.
117 /// Add a target-independent CodeGen pass at this point in the pipeline.
118 void addCommonPass(char &ID);
120 /// printNoVerify - Add a pass to dump the machine function, if debugging is
123 void printNoVerify(const char *Banner) const;
125 /// printAndVerify - Add a pass to dump then verify the machine function, if
126 /// those steps are enabled.
128 void printAndVerify(const char *Banner) const;
132 /// List of target independent CodeGen pass IDs.
134 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
135 /// work well with unreachable basic blocks (what live ranges make sense for a
136 /// block that cannot be reached?). As such, a code generator should either
137 /// not instruction select unreachable blocks, or run this pass as its
138 /// last LLVM modifying pass to clean up blocks that are not reachable from
140 FunctionPass *createUnreachableBlockEliminationPass();
142 /// MachineFunctionPrinter pass - This pass prints out the machine function to
143 /// the given stream as a debugging tool.
144 MachineFunctionPass *
145 createMachineFunctionPrinterPass(raw_ostream &OS,
146 const std::string &Banner ="");
148 /// MachineLoopInfo pass - This pass is a loop analysis pass.
150 extern char &MachineLoopInfoID;
152 /// MachineLoopRanges pass - This pass is an on-demand loop coverage
155 extern char &MachineLoopRangesID;
157 /// MachineDominators pass - This pass is a machine dominators analysis pass.
159 extern char &MachineDominatorsID;
161 /// EdgeBundles analysis - Bundle machine CFG edges.
163 extern char &EdgeBundlesID;
165 /// PHIElimination pass - This pass eliminates machine instruction PHI nodes
166 /// by inserting copy instructions. This destroys SSA information, but is the
167 /// desired input for some register allocators. This pass is "required" by
168 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
170 extern char &PHIEliminationID;
172 /// StrongPHIElimination pass - This pass eliminates machine instruction PHI
173 /// nodes by inserting copy instructions. This destroys SSA information, but
174 /// is the desired input for some register allocators. This pass is
175 /// "required" by these register allocator like this:
176 /// AU.addRequiredID(PHIEliminationID);
177 /// This pass is still in development
178 extern char &StrongPHIEliminationID;
180 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
181 extern char &LiveStacksID;
183 /// TwoAddressInstruction pass - This pass reduces two-address instructions to
184 /// use two operands. This destroys SSA information but it is desired by
185 /// register allocators.
186 extern char &TwoAddressInstructionPassID;
188 /// RegisteCoalescer pass - This pass merges live ranges to eliminate copies.
189 extern char &RegisterCoalescerPassID;
191 /// MachineScheduler pass - This pass schedules machine instructions.
192 extern char &MachineSchedulerID;
194 /// SpillPlacement analysis. Suggest optimal placement of spill code between
197 extern char &SpillPlacementID;
199 /// UnreachableMachineBlockElimination pass - This pass removes unreachable
200 /// machine basic blocks.
201 extern char &UnreachableMachineBlockElimID;
203 /// DeadMachineInstructionElim pass - This pass removes dead machine
206 FunctionPass *createDeadMachineInstructionElimPass();
208 /// Creates a register allocator as the user specified on the command line, or
209 /// picks one that matches OptLevel.
211 FunctionPass *createRegisterAllocator(CodeGenOpt::Level OptLevel);
213 /// FastRegisterAllocation Pass - This pass register allocates as fast as
214 /// possible. It is best suited for debug code where live ranges are short.
216 FunctionPass *createFastRegisterAllocator();
218 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
219 /// register allocator using the basic regalloc framework.
221 FunctionPass *createBasicRegisterAllocator();
223 /// Greedy register allocation pass - This pass implements a global register
224 /// allocator for optimized builds.
226 FunctionPass *createGreedyRegisterAllocator();
228 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
229 /// Quadratic Prograaming (PBQP) based register allocator.
231 FunctionPass *createDefaultPBQPRegisterAllocator();
233 /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
234 /// and eliminates abstract frame references.
236 FunctionPass *createPrologEpilogCodeInserter();
238 /// ExpandPostRAPseudos Pass - This pass expands pseudo instructions after
239 /// register allocation.
241 FunctionPass *createExpandPostRAPseudosPass();
243 /// createPostRAScheduler - This pass performs post register allocation
245 FunctionPass *createPostRAScheduler(CodeGenOpt::Level OptLevel);
247 /// BranchFolding Pass - This pass performs machine code CFG based
248 /// optimizations to delete branches to branches, eliminate branches to
249 /// successor blocks (creating fall throughs), and eliminating branches over
251 FunctionPass *createBranchFoldingPass(bool DefaultEnableTailMerge);
253 /// TailDuplicate Pass - Duplicate blocks with unconditional branches
254 /// into tails of their predecessors.
255 FunctionPass *createTailDuplicatePass(bool PreRegAlloc = false);
257 /// IfConverter Pass - This pass performs machine code if conversion.
258 FunctionPass *createIfConverterPass();
260 /// MachineBlockPlacement Pass - This pass places basic blocks based on branch
262 FunctionPass *createMachineBlockPlacementPass();
264 /// MachineBlockPlacementStats Pass - This pass collects statistics about the
265 /// basic block placement using branch probabilities and block frequency
267 FunctionPass *createMachineBlockPlacementStatsPass();
269 /// Code Placement Pass - This pass optimize code placement and aligns loop
270 /// headers to target specific alignment boundary.
271 FunctionPass *createCodePlacementOptPass();
273 /// IntrinsicLowering Pass - Performs target-independent LLVM IR
274 /// transformations for highly portable strategies.
275 FunctionPass *createGCLoweringPass();
277 /// MachineCodeAnalysis Pass - Target-independent pass to mark safe points in
278 /// machine code. Must be added very late during code generation, just prior
279 /// to output, and importantly after all CFG transformations (such as branch
281 FunctionPass *createGCMachineCodeAnalysisPass();
283 /// Deleter Pass - Releases GC metadata.
285 FunctionPass *createGCInfoDeleter();
287 /// Creates a pass to print GC metadata.
289 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
291 /// createMachineCSEPass - This pass performs global CSE on machine
293 FunctionPass *createMachineCSEPass();
295 /// createMachineLICMPass - This pass performs LICM on machine instructions.
297 FunctionPass *createMachineLICMPass(bool PreRegAlloc = true);
299 /// createMachineSinkingPass - This pass performs sinking on machine
301 FunctionPass *createMachineSinkingPass();
303 /// createMachineCopyPropagationPass - This pass performs copy propagation on
304 /// machine instructions.
305 FunctionPass *createMachineCopyPropagationPass();
307 /// createPeepholeOptimizerPass - This pass performs peephole optimizations -
308 /// like extension and comparison eliminations.
309 FunctionPass *createPeepholeOptimizerPass();
311 /// createOptimizePHIsPass - This pass optimizes machine instruction PHIs
312 /// to take advantage of opportunities created during DAG legalization.
313 FunctionPass *createOptimizePHIsPass();
315 /// createStackSlotColoringPass - This pass performs stack slot coloring.
316 FunctionPass *createStackSlotColoringPass(bool);
318 /// createStackProtectorPass - This pass adds stack protectors to functions.
319 FunctionPass *createStackProtectorPass(const TargetLowering *tli);
321 /// createMachineVerifierPass - This pass verifies cenerated machine code
322 /// instructions for correctness.
323 FunctionPass *createMachineVerifierPass(const char *Banner = 0);
325 /// createDwarfEHPass - This pass mulches exception handling code into a form
326 /// adapted to code generation. Required if using dwarf exception handling.
327 FunctionPass *createDwarfEHPass(const TargetMachine *tm);
329 /// createSjLjEHPass - This pass adapts exception handling code to use
330 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
331 FunctionPass *createSjLjEHPass(const TargetLowering *tli);
333 /// createLocalStackSlotAllocationPass - This pass assigns local frame
334 /// indices to stack slots relative to one another and allocates
335 /// base registers to access them when it is estimated by the target to
336 /// be out of range of normal frame pointer or stack pointer index
338 FunctionPass *createLocalStackSlotAllocationPass();
340 /// createExpandISelPseudosPass - This pass expands pseudo-instructions.
342 FunctionPass *createExpandISelPseudosPass();
344 /// createExecutionDependencyFixPass - This pass fixes execution time
345 /// problems with dependent instructions, such as switching execution
346 /// domains to match.
348 /// The pass will examine instructions using and defining registers in RC.
350 FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
352 /// createUnpackMachineBundles - This pass unpack machine instruction bundles.
354 FunctionPass *createUnpackMachineBundlesPass();
356 /// createFinalizeMachineBundles - This pass finalize machine instruction
357 /// bundles (created earlier, e.g. during pre-RA scheduling).
359 FunctionPass *createFinalizeMachineBundlesPass();
361 } // End llvm namespace